📄 iobuf.v
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// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/unisims/IOBUF.v,v 1.9 2007/05/23 21:43:39 patrickp Exp $///////////////////////////////////////////////////////////////////////////////// Copyright (c) 1995/2004 Xilinx, Inc.// All Right Reserved.///////////////////////////////////////////////////////////////////////////////// ____ ____// / /\/ /// /___/ \ / Vendor : Xilinx// \ \ \/ Version : 10.1// \ \ Description : Xilinx Functional Simulation Library Component// / / Bi-Directional Buffer// /___/ /\ Filename : IOBUF.v// \ \ / \ Timestamp : Thu Mar 25 16:42:37 PST 2004// \___\/\___\//// Revision:// 03/23/04 - Initial version.// 02/22/06 - CR#226003 - Added integer, real parameter type// 05/23/07 - Changed timescale to 1 ps / 1 ps.// 05/23/07 - Added wire declaration for internal signals.`timescale 1 ps / 1 psmodule IOBUF (O, IO, I, T); parameter CAPACITANCE = "DONT_CARE"; parameter integer DRIVE = 12; parameter IBUF_DELAY_VALUE = "0"; parameter IFD_DELAY_VALUE = "AUTO"; parameter IOSTANDARD = "DEFAULT"; parameter SLEW = "SLOW"; output O; inout IO; input I, T; wire ts; tri0 GTS = glbl.GTS; or O1 (ts, GTS, T); bufif0 T1 (IO, I, ts); buf B1 (O, IO); initial begin case (CAPACITANCE) "LOW", "NORMAL", "DONT_CARE" : ; default : begin $display("Attribute Syntax Error : The attribute CAPACITANCE on IOBUF instance %m is set to %s. Legal values for this attribute are DONT_CARE, LOW or NORMAL.", CAPACITANCE); $finish; end endcase case (IBUF_DELAY_VALUE) "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12", "13", "14", "15", "16" : ; default : begin $display("Attribute Syntax Error : The attribute IBUF_DELAY_VALUE on IOBUF instance %m is set to %s. Legal values for this attribute are 0, 1, 2, ... or 16.", IBUF_DELAY_VALUE); $finish; end endcase case (IFD_DELAY_VALUE) "AUTO", "0", "1", "2", "3", "4", "5", "6", "7", "8" : ; default : begin $display("Attribute Syntax Error : The attribute IFD_DELAY_VALUE on IOBUF instance %m is set to %s. Legal values for this attribute are AUTO, 0, 1, 2, ... or 8.", IFD_DELAY_VALUE); $finish; end endcase end // initial begin endmodule
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