aramb36_internal.v

DDR2源代码 DDR2源代码 DDR2源代码

		    mem[count + (init_mult * 36)][count1] = INIT_24[(count * width) + count1];
		    mem[count + (init_mult * 37)][count1] = INIT_25[(count * width) + count1];
		    mem[count + (init_mult * 38)][count1] = INIT_26[(count * width) + count1];
		    mem[count + (init_mult * 39)][count1] = INIT_27[(count * width) + count1];
		    mem[count + (init_mult * 40)][count1] = INIT_28[(count * width) + count1];
		    mem[count + (init_mult * 41)][count1] = INIT_29[(count * width) + count1];
		    mem[count + (init_mult * 42)][count1] = INIT_2A[(count * width) + count1];
		    mem[count + (init_mult * 43)][count1] = INIT_2B[(count * width) + count1];
		    mem[count + (init_mult * 44)][count1] = INIT_2C[(count * width) + count1];
		    mem[count + (init_mult * 45)][count1] = INIT_2D[(count * width) + count1];
		    mem[count + (init_mult * 46)][count1] = INIT_2E[(count * width) + count1];
		    mem[count + (init_mult * 47)][count1] = INIT_2F[(count * width) + count1];
		    mem[count + (init_mult * 48)][count1] = INIT_30[(count * width) + count1];
		    mem[count + (init_mult * 49)][count1] = INIT_31[(count * width) + count1];
		    mem[count + (init_mult * 50)][count1] = INIT_32[(count * width) + count1];
		    mem[count + (init_mult * 51)][count1] = INIT_33[(count * width) + count1];
		    mem[count + (init_mult * 52)][count1] = INIT_34[(count * width) + count1];
		    mem[count + (init_mult * 53)][count1] = INIT_35[(count * width) + count1];
		    mem[count + (init_mult * 54)][count1] = INIT_36[(count * width) + count1];
		    mem[count + (init_mult * 55)][count1] = INIT_37[(count * width) + count1];
		    mem[count + (init_mult * 56)][count1] = INIT_38[(count * width) + count1];
		    mem[count + (init_mult * 57)][count1] = INIT_39[(count * width) + count1];
		    mem[count + (init_mult * 58)][count1] = INIT_3A[(count * width) + count1];
		    mem[count + (init_mult * 59)][count1] = INIT_3B[(count * width) + count1];
		    mem[count + (init_mult * 60)][count1] = INIT_3C[(count * width) + count1];
		    mem[count + (init_mult * 61)][count1] = INIT_3D[(count * width) + count1];
		    mem[count + (init_mult * 62)][count1] = INIT_3E[(count * width) + count1];
		    mem[count + (init_mult * 63)][count1] = INIT_3F[(count * width) + count1];

		    if (BRAM_SIZE == 36) begin
			mem[count + (init_mult * 64)][count1] = INIT_40[(count * width) + count1];
			mem[count + (init_mult * 65)][count1] = INIT_41[(count * width) + count1];
			mem[count + (init_mult * 66)][count1] = INIT_42[(count * width) + count1];
			mem[count + (init_mult * 67)][count1] = INIT_43[(count * width) + count1];
			mem[count + (init_mult * 68)][count1] = INIT_44[(count * width) + count1];
			mem[count + (init_mult * 69)][count1] = INIT_45[(count * width) + count1];
			mem[count + (init_mult * 70)][count1] = INIT_46[(count * width) + count1];
			mem[count + (init_mult * 71)][count1] = INIT_47[(count * width) + count1];
			mem[count + (init_mult * 72)][count1] = INIT_48[(count * width) + count1];
			mem[count + (init_mult * 73)][count1] = INIT_49[(count * width) + count1];
			mem[count + (init_mult * 74)][count1] = INIT_4A[(count * width) + count1];
			mem[count + (init_mult * 75)][count1] = INIT_4B[(count * width) + count1];
			mem[count + (init_mult * 76)][count1] = INIT_4C[(count * width) + count1];
			mem[count + (init_mult * 77)][count1] = INIT_4D[(count * width) + count1];
			mem[count + (init_mult * 78)][count1] = INIT_4E[(count * width) + count1];
			mem[count + (init_mult * 79)][count1] = INIT_4F[(count * width) + count1];
			mem[count + (init_mult * 80)][count1] = INIT_50[(count * width) + count1];
			mem[count + (init_mult * 81)][count1] = INIT_51[(count * width) + count1];
			mem[count + (init_mult * 82)][count1] = INIT_52[(count * width) + count1];
			mem[count + (init_mult * 83)][count1] = INIT_53[(count * width) + count1];
			mem[count + (init_mult * 84)][count1] = INIT_54[(count * width) + count1];
			mem[count + (init_mult * 85)][count1] = INIT_55[(count * width) + count1];
			mem[count + (init_mult * 86)][count1] = INIT_56[(count * width) + count1];
			mem[count + (init_mult * 87)][count1] = INIT_57[(count * width) + count1];
			mem[count + (init_mult * 88)][count1] = INIT_58[(count * width) + count1];
			mem[count + (init_mult * 89)][count1] = INIT_59[(count * width) + count1];
			mem[count + (init_mult * 90)][count1] = INIT_5A[(count * width) + count1];
			mem[count + (init_mult * 91)][count1] = INIT_5B[(count * width) + count1];
			mem[count + (init_mult * 92)][count1] = INIT_5C[(count * width) + count1];
			mem[count + (init_mult * 93)][count1] = INIT_5D[(count * width) + count1];
			mem[count + (init_mult * 94)][count1] = INIT_5E[(count * width) + count1];
			mem[count + (init_mult * 95)][count1] = INIT_5F[(count * width) + count1];
			mem[count + (init_mult * 96)][count1] = INIT_60[(count * width) + count1];
			mem[count + (init_mult * 97)][count1] = INIT_61[(count * width) + count1];
			mem[count + (init_mult * 98)][count1] = INIT_62[(count * width) + count1];
			mem[count + (init_mult * 99)][count1] = INIT_63[(count * width) + count1];
			mem[count + (init_mult * 100)][count1] = INIT_64[(count * width) + count1];
			mem[count + (init_mult * 101)][count1] = INIT_65[(count * width) + count1];
			mem[count + (init_mult * 102)][count1] = INIT_66[(count * width) + count1];
			mem[count + (init_mult * 103)][count1] = INIT_67[(count * width) + count1];
			mem[count + (init_mult * 104)][count1] = INIT_68[(count * width) + count1];
			mem[count + (init_mult * 105)][count1] = INIT_69[(count * width) + count1];
			mem[count + (init_mult * 106)][count1] = INIT_6A[(count * width) + count1];
			mem[count + (init_mult * 107)][count1] = INIT_6B[(count * width) + count1];
			mem[count + (init_mult * 108)][count1] = INIT_6C[(count * width) + count1];
			mem[count + (init_mult * 109)][count1] = INIT_6D[(count * width) + count1];
			mem[count + (init_mult * 110)][count1] = INIT_6E[(count * width) + count1];
			mem[count + (init_mult * 111)][count1] = INIT_6F[(count * width) + count1];
			mem[count + (init_mult * 112)][count1] = INIT_70[(count * width) + count1];
			mem[count + (init_mult * 113)][count1] = INIT_71[(count * width) + count1];
			mem[count + (init_mult * 114)][count1] = INIT_72[(count * width) + count1];
			mem[count + (init_mult * 115)][count1] = INIT_73[(count * width) + count1];
			mem[count + (init_mult * 116)][count1] = INIT_74[(count * width) + count1];
			mem[count + (init_mult * 117)][count1] = INIT_75[(count * width) + count1];
			mem[count + (init_mult * 118)][count1] = INIT_76[(count * width) + count1];
			mem[count + (init_mult * 119)][count1] = INIT_77[(count * width) + count1];
			mem[count + (init_mult * 120)][count1] = INIT_78[(count * width) + count1];
			mem[count + (init_mult * 121)][count1] = INIT_79[(count * width) + count1];
			mem[count + (init_mult * 122)][count1] = INIT_7A[(count * width) + count1];
			mem[count + (init_mult * 123)][count1] = INIT_7B[(count * width) + count1];
			mem[count + (init_mult * 124)][count1] = INIT_7C[(count * width) + count1];
			mem[count + (init_mult * 125)][count1] = INIT_7D[(count * width) + count1];
			mem[count + (init_mult * 126)][count1] = INIT_7E[(count * width) + count1];
			mem[count + (init_mult * 127)][count1] = INIT_7F[(count * width) + count1];
		    end // if (BRAM_SIZE == 36)
		end // for (count1 = 0; count1 < width; count1 = count1 + 1)
	    end // for (count = 0; count < init_mult; count = count + 1)


	    if (width >= 8) begin
	    
		initp_mult = 256/widthp;
	    
		for (countp = 0; countp < initp_mult; countp = countp + 1) begin
		    for (countp1 = 0; countp1 < widthp; countp1 = countp1 + 1) begin
			
			memp[countp][countp1]                     = INITP_00[(countp * widthp) + countp1];
			memp[countp + (initp_mult * 1)][countp1]  = INITP_01[(countp * widthp) + countp1];
			memp[countp + (initp_mult * 2)][countp1]  = INITP_02[(countp * widthp) + countp1];
			memp[countp + (initp_mult * 3)][countp1]  = INITP_03[(countp * widthp) + countp1];
			memp[countp + (initp_mult * 4)][countp1]  = INITP_04[(countp * widthp) + countp1];
			memp[countp + (initp_mult * 5)][countp1]  = INITP_05[(countp * widthp) + countp1];
			memp[countp + (initp_mult * 6)][countp1]  = INITP_06[(countp * widthp) + countp1];
			memp[countp + (initp_mult * 7)][countp1]  = INITP_07[(countp * widthp) + countp1];
			
			if (BRAM_SIZE == 36) begin
			    memp[countp + (initp_mult * 8)][countp1]  = INITP_08[(countp * widthp) + countp1];
			    memp[countp + (initp_mult * 9)][countp1]  = INITP_09[(countp * widthp) + countp1];
			    memp[countp + (initp_mult * 10)][countp1] = INITP_0A[(countp * widthp) + countp1];
			    memp[countp + (initp_mult * 11)][countp1] = INITP_0B[(countp * widthp) + countp1];
			    memp[countp + (initp_mult * 12)][countp1] = INITP_0C[(countp * widthp) + countp1];
			    memp[countp + (initp_mult * 13)][countp1] = INITP_0D[(countp * widthp) + countp1];
			    memp[countp + (initp_mult * 14)][countp1] = INITP_0E[(countp * widthp) + countp1];
			    memp[countp + (initp_mult * 15)][countp1] = INITP_0F[(countp * widthp) + countp1];
			end
		    end // for (countp1 = 0; countp1 < widthp; countp1 = countp1 + 1)
		end // for (countp = 0; countp < initp_mult; countp = countp + 1)
		
	    end // if (width >= 8)

	end // if (INIT_FILE == "NONE")
	else begin

	    $readmemh (INIT_FILE, tmp_mem);

	    case (widest_width)

		1, 2, 4 : for (i_mem = 0; i_mem <= mem_depth; i_mem = i_mem + 1)
		              mem[i_mem] = tmp_mem [i_mem];
		
		9 : for (i_mem = 0; i_mem <= mem_depth; i_mem = i_mem + 1) begin
		        mem[i_mem] = tmp_mem[i_mem][0 +: 8];
		        memp[i_mem] = tmp_mem[i_mem][8 +: 1];
	            end

		18 : for (i_mem = 0; i_mem <= mem_depth; i_mem = i_mem + 1) begin
		         mem[i_mem] = tmp_mem[i_mem][0 +: 16];
		         memp[i_mem] = tmp_mem[i_mem][16 +: 2];
	             end
	    
		36 : for (i_mem = 0; i_mem <= mem_depth; i_mem = i_mem + 1) begin
		         mem[i_mem] = tmp_mem[i_mem][0 +: 32];
		         memp[i_mem] = tmp_mem[i_mem][32 +: 4];
	             end

		72 : for (i_mem = 0; i_mem <= mem_depth; i_mem = i_mem + 1) begin
		         mem[i_mem] = tmp_mem[i_mem][0 +: 64];
		         memp[i_mem] = tmp_mem[i_mem][64 +: 8];
	             end

	    endcase // case(widest_width)

	end // else: !if(INIT_FILE == "NONE")
	

	if ((SIM_MODE != "FAST") && (SIM_MODE != "SAFE")) begin
	    $display("Attribute Syntax Error : The attribute SIM_MODE on ARAMB36_INTERNAL instance %m is set to %s.  Legal values for this attribute are FAST or SAFE.", SIM_MODE);
	    $finish;
	end
    end // initial begin
    
    
    /********************* SAFE mode **************************/
    generate if (SIM_MODE == "SAFE") begin
	  
    buf b_addra[15:0] (addra_in, ADDRA);
    buf b_addrb[15:0] (addrb_in, ADDRB);
    buf b_clka (clka_in, CLKA);
    buf b_clkb (clkb_in, CLKB);
    buf b_regclka (regclka_in, REGCLKA);
    buf b_regclkb (regclkb_in, REGCLKB);
    
    buf b_dia[63:0] (dia_in, DIA);
    buf b_dib[63:0] (dib_in, DIB);
    buf b_dipa[3:0] (dipa_in, DIPA);
    buf b_dipb[7:0] (dipb_in, DIPB);
    buf b_doa[63:0] (DOA, doa_out_out);
    buf b_dopa[7:0] (DOPA, dopa_out_out);
    buf b_dob[31:0] (DOB, dob_out_out);
    buf b_dopb[3:0] (DOPB, dopb_out_out);

    buf b_ena (ena_in, ENA);
    buf b_enb (enb_in, ENB);
    buf b_gsr (gsr_in, GSR);
    buf b_regcea (regcea_in, REGCEA);
    buf b_regceb (regceb_in, REGCEB);
    buf b_ssra (ssra_in, SSRA);
    buf b_ssrb (ssrb_in, SSRB);
    buf b_wea[7:0] (wea_in, WEA);
    buf b_web[7:0] (web_in, WEB);
    buf b_cascadeinlata (cascadeinlata_in, CASCADEINLATA);
    buf b_cascadeinlatb (cascadeinlatb_in, CASCADEINLATB);
    buf b_cascadeoutlata (CASCADEOUTLATA, doa_out[0]);
    buf b_cascadeoutlatb (CASCADEOUTLATB, dob_out[0]);
    buf b_cascadeinrega (cascadeinrega_in, CASCADEINREGA);
    buf b_cascadeinregb (cascadeinregb_in, CASCADEINREGB);
    buf b_cascadeoutrega (CASCADEOUTREGA, doa_outreg[0]);
    buf b_cascadeoutregb (CASCADEOUTREGB, dob_outreg[0]);
    buf b_sbiterr (SBITERR, sbiterr_out_out);
    buf b_dbiterr (DBITERR, dbiterr_out_out);
    buf b_eccparity[7:0] (ECCPARITY, eccparity_out);


    initial begin
	    
	case (WRITE_WIDTH_A)

	    0, 1, 2, 4, 9, 18 : ;
	    36 : begin 
		     if (BRAM_SIZE == 18 && BRAM_MODE == "TRUE_DUAL_PORT") begin
			 $display("Attribute Syntax Error : The attribute WRITE_WIDTH_A on ARAMB36_INTERNAL instance %m is set to %d.  Legal values for this attribute are 0, 1, 2, 4, 9 or 18.", WRITE_WIDTH_A);
			 $finish;
		     end
		 end
	    72 : begin
		     if (BRAM_SIZE == 18) begin
			 $display("Attribute Syntax Error : The attribute WRITE_WIDTH_A on ARAMB36_INTERNAL instance %m is set to %d.  Legal values for this attribute are 0, 1, 2, 4, 9 or 18.", WRITE_WIDTH_A);
			 $finish;
		     end
		     else if ((BRAM_SIZE == 16 || BRAM_SIZE == 36) && BRAM_MODE == "TRUE_DUAL_PORT") begin // BRAM_SIZE == 16 - Virtex 4
			 $display("Attribute Syntax Error : The attribute WRITE_WIDTH_A on ARAMB36_INTERNAL instance %m is set to %d.  Legal values for this attribute are 0, 1, 2, 4, 9, 18 or 36.", WRITE_WIDTH_A);
			 $finish;
		     end
	         end
	    default : begin
		          if (BRAM_SIZE == 18) begin
			      $display("Attribute Syntax Error : The attribute WRITE_WIDTH_A on ARAMB36_INTERNAL instance %m is set to %d.  Legal values for this attribute are 0, 1, 2, 4, 9 or 18.", WRITE_WIDTH_A);
			      $finish;
			  end
			  else if (BRAM_SIZE == 16 || BRAM_SIZE == 36) begin
			      $display("Attribute Syntax Error : The attribute WRITE_WIDTH_A on ARAMB36_INTERNAL instance %m is set to %d.  Legal values for this attribute are 0, 1, 2, 4, 9, 18 or 36.", WRITE_WIDTH_A);
			      $finish;
			  end
	               end

	endcase // case(WRITE_WIDTH_A)


    	case (WRITE_WIDTH_B)

	    0, 1, 2, 4, 9, 18 : ;