📄 f32x_usb_isr.lst
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C51 COMPILER V7.50 F32X_USB_ISR 08/23/2006 15:13:08 PAGE 1
C51 COMPILER V7.50, COMPILATION OF MODULE F32X_USB_ISR
OBJECT MODULE PLACED IN F32x_USB_ISR.OBJ
COMPILER INVOKED BY: D:\keil\C51\BIN\c51.exe F32x_USB_ISR.c DB OE
line level source
1 //-----------------------------------------------------------------------------
2 // F32x_USB_ISR.c
3 //-----------------------------------------------------------------------------
4 // Copyright 2005 Silicon Laboratories, Inc.
5 // http://www.silabs.com
6 //
7 // Program Description:
8 //
9 // Source file for USB firmware. Includes top level ISR with Setup,
10 // and Endpoint data handlers. Also includes routine for USB suspend,
11 // reset, and procedural stall.
12 //
13 //
14 // How To Test: See Readme.txt
15 //
16 //
17 // FID: 32X000023
18 // Target: C8051F32x
19 // Tool chain: Keil C51 7.50 / Keil EVAL C51
20 // Silicon Laboratories IDE version 2.6
21 // Command Line: See Readme.txt
22 // Project Name: F32x_USB_Interrupt
23 //
24 //
25 // Release 1.3
26 // -All changes by GP
27 // -22 NOV 2005
28 // -Changed revision number to match project revision
29 // -Modified file to fit new formatting guidelines
30 // -Changed file name from USB_ISR.c
31 // -Removed extraneous code that was commented out
32 // -Added USB Suspend code
33 //
34 // Release 1.0
35 // -Initial Revision (DM)
36 // -08 NOV 2002
37 //
38
39 //-----------------------------------------------------------------------------
40 // Includes
41 //-----------------------------------------------------------------------------
42
43 #include "c8051F320.h"
44 #include "F32x_USB_Register.h"
45 #include "F32x_USB_Main.h"
46 #include "F32x_USB_Descriptor.h"
47
48 //-----------------------------------------------------------------------------
49 // Global Externs
50 //-----------------------------------------------------------------------------
51
52 extern idata BYTE OUT_PACKET[];
53 extern idata BYTE IN_PACKET[];
54
55 //-----------------------------------------------------------------------------
C51 COMPILER V7.50 F32X_USB_ISR 08/23/2006 15:13:08 PAGE 2
56 // Global Variables
57 //-----------------------------------------------------------------------------
58
59 BYTE USB_State; // Holds the current USB State
60 // def. in F32x_USB_Main.h
61
62 setup_buffer Setup; // Buffer for current device request
63
64 unsigned int DataSize; // Size of data to return
65 unsigned int DataSent; // Amount of data sent so far
66 BYTE* DataPtr; // Pointer to data to return
67
68 // Holds the status for each endpoint
69 BYTE Ep_Status[3] = {EP_IDLE, EP_IDLE, EP_IDLE};
70
71
72 //-----------------------------------------------------------------------------
73 // Interrupt Service Routines
74 //-----------------------------------------------------------------------------
75
76 //-----------------------------------------------------------------------------
77 // Usb_ISR
78 //-----------------------------------------------------------------------------
79 //
80 // Called after any USB type interrupt, this handler determines which type
81 // of interrupt occurred, and calls the specific routine to handle it.
82 //
83 //-----------------------------------------------------------------------------
84 void Usb_ISR(void) interrupt 8 // Top-level USB ISR
85 {
86 1 BYTE bCommon, bIn, bOut;
87 1 POLL_READ_BYTE(CMINT, bCommon); // Read all interrupt registers
88 1 POLL_READ_BYTE(IN1INT, bIn); // this read also clears the register
89 1 POLL_READ_BYTE(OUT1INT, bOut);
90 1 {
91 2 if (bCommon & rbRSUINT) // Handle Resume interrupt
92 2 {
93 3 Usb_Resume();
94 3 }
95 2 if (bCommon & rbRSTINT) // Handle Reset interrupt
96 2 {
97 3 Usb_Reset();
98 3 }
99 2 if (bIn & rbEP0) // Handle Setup packet received
100 2 { // or packet transmitted if Endpoint 0
101 3 Handle_Setup(); // is transmit mode
102 3 }
103 2 if (bIn & rbIN1) // Handle In Packet sent, put new data
104 2 { // on endpoint 1 fifo
105 3 Handle_In1();
106 3 }
107 2 if (bOut & rbOUT2) // Handle Out packet received, take data
108 2 { // off endpoint 2 fifo
109 3 Handle_Out2();
110 3 }
111 2 if (bCommon & rbSUSINT) // Handle Suspend interrupt
112 2 {
113 3 Usb_Suspend();
114 3 }
115 2 }
116 1 }
117
C51 COMPILER V7.50 F32X_USB_ISR 08/23/2006 15:13:08 PAGE 3
118 //-----------------------------------------------------------------------------
119 // Support Routines for ISR
120 //-----------------------------------------------------------------------------
121
122 //-----------------------------------------------------------------------------
123 // Usb_Reset
124 //-----------------------------------------------------------------------------
125 //
126 // Return Value : None
127 // Parameters : None
128 //
129 // - Set state to default
130 // - Clear Usb Inhibit bit
131 //
132 //-----------------------------------------------------------------------------
133
134 void Usb_Reset(void)
135 {
136 1 USB_State = DEV_DEFAULT; // Set device state to default
137 1
138 1 POLL_WRITE_BYTE(POWER, 0x01); // Clear usb inhibit bit to enable USB
139 1 // suspend detection
140 1
141 1 Ep_Status[0] = EP_IDLE; // Set default Endpoint Status
142 1 Ep_Status[1] = EP_HALT;
143 1 Ep_Status[2] = EP_HALT;
144 1 }
145
146 //-----------------------------------------------------------------------------
147 // Handle_Setup
148 //-----------------------------------------------------------------------------
149 //
150 // Return Value : None
151 // Parameters : None
152 //
153 // - Decode Incoming Setup requests
154 // - Load data packets on fifo while in transmit mode
155 //
156 //-----------------------------------------------------------------------------
157
158 void Handle_Setup(void)
159 {
160 1 BYTE ControlReg,TempReg; // Temporary storage for EP control
161 1 // register
162 1
163 1 POLL_WRITE_BYTE(INDEX, 0); // Set Index to Endpoint Zero
164 1 POLL_READ_BYTE(E0CSR, ControlReg); // Read control register
165 1
166 1 if (Ep_Status[0] == EP_ADDRESS) // Handle Status Phase of Set Address
167 1 // command
168 1 {
169 2 POLL_WRITE_BYTE(FADDR, Setup.wValue.c[LSB]);
170 2 Ep_Status[0] = EP_IDLE;
171 2 }
172 1
173 1 if (ControlReg & rbSTSTL) // If last packet was a sent stall, reset
174 1 { // STSTL bit and return EP0 to idle state
175 2 POLL_WRITE_BYTE(E0CSR, 0);
176 2 Ep_Status[0] = EP_IDLE;
177 2 return;
178 2 }
179 1
C51 COMPILER V7.50 F32X_USB_ISR 08/23/2006 15:13:08 PAGE 4
180 1 if (ControlReg & rbSUEND) // If last setup transaction was ended
181 1 { // prematurely then set
182 2 POLL_WRITE_BYTE(E0CSR, rbDATAEND);
183 2 POLL_WRITE_BYTE(E0CSR, rbSSUEND); // Serviced Setup End bit and return EP0
184 2 Ep_Status[0] = EP_IDLE; // to idle state
185 2 }
186 1
187 1 if (Ep_Status[0] == EP_IDLE) // If Endpoint 0 is in idle mode
188 1 {
189 2 if (ControlReg & rbOPRDY) // Make sure that EP 0 has an Out Packet ready from host
190 2 { // although if EP0 is idle, this should always be the case
191 3 Fifo_Read(FIFO_EP0, 8, (BYTE *)&Setup);
192 3 // Get Setup Packet off of Fifo, it is currently Big-Endian
193 3
194 3 // Compiler Specific - these next three statements swap the
195 3 // bytes of the setup packet words to Big Endian so they
196 3 // can be compared to other 16-bit values elsewhere properly
197 3 Setup.wValue.i = Setup.wValue.c[MSB] + 256*Setup.wValue.c[LSB];
198 3 Setup.wIndex.i = Setup.wIndex.c[MSB] + 256*Setup.wIndex.c[LSB];
199 3 Setup.wLength.i = Setup.wLength.c[MSB] + 256*Setup.wLength.c[LSB];
200 3
201 3
202 3 switch(Setup.bRequest) // Call correct subroutine to handle each kind of
203 3 { // standard request
204 4 case GET_STATUS:
205 4 Get_Status();
206 4 break;
207 4 case CLEAR_FEATURE:
208 4 Clear_Feature();
209 4 break;
210 4 case SET_FEATURE:
211 4 Set_Feature();
212 4 break;
213 4 case SET_ADDRESS:
214 4 Set_Address();
215 4 break;
216 4 case GET_DESCRIPTOR:
217 4 Get_Descriptor();
218 4 break;
219 4 case GET_CONFIGURATION:
220 4 Get_Configuration();
221 4 break;
222 4 case SET_CONFIGURATION:
223 4 Set_Configuration();
224 4 break;
225 4 case GET_INTERFACE:
226 4 Get_Interface();
227 4 break;
228 4 case SET_INTERFACE:
229 4 Set_Interface();
230 4 break;
231 4 default:
232 4 Force_Stall(); // Send stall to host if invalid request
233 4 break;
234 4 }
235 3 }
236 2 }
237 1
238 1 if (Ep_Status[0] == EP_TX) // See if the endpoint has data to transmit to host
239 1 {
240 2 if (!(ControlReg & rbINPRDY)) // Make sure you don't overwrite last packet
241 2 {
C51 COMPILER V7.50 F32X_USB_ISR 08/23/2006 15:13:08 PAGE 5
242 3 // Endpoint 0 transmit mode
243 3
244 3 POLL_READ_BYTE(E0CSR, ControlReg);
245 3 // Read control register
246 3
247 3 if ((!(ControlReg & rbSUEND)) || (!(ControlReg & rbOPRDY)))
248 3 // Check to see if Setup End or Out Packet received, if so
249 3 // do not put any new data on FIFO
250 3 {
251 4 TempReg = rbINPRDY; // Add In Packet ready flag to E0CSR bitmask
252 4
253 4 // Break Data into multiple packets if larger than Max Packet
254 4 if (DataSize >= EP0_PACKET_SIZE)
255 4 {
256 5 Fifo_Write(FIFO_EP0, EP0_PACKET_SIZE, (BYTE *)DataPtr);// Put Data on Fifo
257 5 DataPtr += EP0_PACKET_SIZE; // Advance data pointer
258 5 DataSize -= EP0_PACKET_SIZE; // Decrement data size
259 5 DataSent += EP0_PACKET_SIZE; // Increment data sent counter
260 5 }
261 4 else // If data is less than Max Packet size or zero
262 4 {
263 5 Fifo_Write(FIFO_EP0, DataSize, (BYTE *)DataPtr); // Put Data on Fifo
264 5 TempReg |= rbDATAEND; // Add Data End bit to bitmask
265 5 Ep_Status[0] = EP_IDLE; // Return EP 0 to idle state
266 5 }
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