📄 stm8s_tim1.c
字号:
/**
* @brief Configures the TIM1 Channel 2 polarity.
* @param[in] TIM1_OCPolarity specifies the OC2 Polarity.
* This parameter can be one of the following values:
* - TIM1_OCPOLARITY_LOW: Output Compare active low
* - TIM1_OCPOLARITY_HIGH: Output Compare active high
* @retval None
* @par Required preconditions:
* None
*/
void TIM1_OC2PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity)
{
/* Check the parameters */
assert_param(IS_TIM1_OC_POLARITY_OK(TIM1_OCPolarity));
/* Set or Reset the CC2P Bit */
if (TIM1_OCPolarity != TIM1_OCPOLARITY_HIGH)
{
TIM1->CCER1 |= TIM1_CCER1_CC2P;
}
else
{
TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC2P);
}
}
/**
* @brief Configures the TIM1 Channel 2N polarity.
* @param[in] TIM1_OCNPolarity specifies the OC2N Polarity.
* This parameter can be one of the following values:
* - TIM1_OCNPOLARITY_LOW: Output Compare active low
* - TIM1_OCNPOLARITY_HIGH: Output Compare active high
* @retval None
* @par Required preconditions:
* None
*/
void TIM1_OC2NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity)
{
/* Check the parameters */
assert_param(IS_TIM1_OCN_POLARITY_OK(TIM1_OCNPolarity));
/* Set or Reset the CC3P Bit */
if (TIM1_OCNPolarity != TIM1_OCNPOLARITY_HIGH)
{
TIM1->CCER1 |= TIM1_CCER1_CC2NP;
}
else
{
TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC2NP);
}
}
/**
* @brief Configures the TIM1 Channel 3 polarity.
* @param[in] TIM1_OCPolarity specifies the OC3 Polarity.
* This parameter can be one of the following values:
* - TIM1_OCPOLARITY_LOW: Output Compare active low
* - TIM1_OCPOLARITY_HIGH: Output Compare active high
* @retval None
* @par Required preconditions:
* None
*/
void TIM1_OC3PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity)
{
/* Check the parameters */
assert_param(IS_TIM1_OC_POLARITY_OK(TIM1_OCPolarity));
/* Set or Reset the CC3P Bit */
if (TIM1_OCPolarity != TIM1_OCPOLARITY_HIGH)
{
TIM1->CCER2 |= TIM1_CCER2_CC3P;
}
else
{
TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC3P);
}
}
/**
* @brief Configures the TIM1 Channel 3N polarity.
* @param[in] TIM1_OCNPolarity specifies the OC3N Polarity.
* This parameter can be one of the following values:
* - TIM1_OCNPOLARITY_LOW: Output Compare active low
* - TIM1_OCNPOLARITY_HIGH: Output Compare active high
* @retval None
* @par Required preconditions:
* None
*/
void TIM1_OC3NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity)
{
/* Check the parameters */
assert_param(IS_TIM1_OCN_POLARITY_OK(TIM1_OCNPolarity));
/* Set or Reset the CC3P Bit */
if (TIM1_OCNPolarity != TIM1_OCNPOLARITY_HIGH)
{
TIM1->CCER2 |= TIM1_CCER2_CC3NP;
}
else
{
TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC3NP);
}
}
/**
* @brief Configures the TIM1 Channel 4 polarity.
* @param[in] TIM1_OCPolarity specifies the OC4 Polarity.
* This parameter can be one of the following values:
* - TIM1_OCPOLARITY_LOW: Output Compare active low
* - TIM1_OCPOLARITY_HIGH: Output Compare active high
* @retval None
* @par Required preconditions:
* None
*/
void TIM1_OC4PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity)
{
/* Check the parameters */
assert_param(IS_TIM1_OC_POLARITY_OK(TIM1_OCPolarity));
/* Set or Reset the CC4P Bit */
if (TIM1_OCPolarity != TIM1_OCPOLARITY_HIGH)
{
TIM1->CCER2 |= TIM1_CCER2_CC4P;
}
else
{
TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC4P);
}
}
/**
* @brief Enables or disables the TIM1 Capture Compare Channel x (x=1,..,4).
* @param[in] TIM1_Channel specifies the TIM1 Channel.
* This parameter can be one of the following values:
* - TIM1_CHANNEL_1: TIM1 Channel1
* - TIM1_CHANNEL_2: TIM1 Channel2
* - TIM1_CHANNEL_3: TIM1 Channel3
* - TIM1_CHANNEL_4: TIM1 Channel4
* @param[in] NewState specifies the TIM1 Channel CCxE bit new state.
* This parameter can be: ENABLE or DISABLE.
* @retval None
* @par Required preconditions:
* None
*/
void TIM1_CCxCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_TIM1_CHANNEL_OK(TIM1_Channel));
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (TIM1_Channel == TIM1_CHANNEL_1)
{
/* Set or Reset the CC1E Bit */
if (NewState != DISABLE)
{
TIM1->CCER1 |= TIM1_CCER1_CC1E;
}
else
{
TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC1E);
}
}
else if (TIM1_Channel == TIM1_CHANNEL_2)
{
/* Set or Reset the CC2E Bit */
if (NewState != DISABLE)
{
TIM1->CCER1 |= TIM1_CCER1_CC2E;
}
else
{
TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC2E);
}
}
else if (TIM1_Channel == TIM1_CHANNEL_3)
{
/* Set or Reset the CC3E Bit */
if (NewState != DISABLE)
{
TIM1->CCER2 |= TIM1_CCER2_CC3E;
}
else
{
TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC3E);
}
}
else
{
/* Set or Reset the CC4E Bit */
if (NewState != DISABLE)
{
TIM1->CCER2 |= TIM1_CCER2_CC4E;
}
else
{
TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC4E);
}
}
}
/**
* @brief Enables or disables the TIM1 Capture Compare Channel xN (xN=1,..,3).
* @param[in] TIM1_Channel specifies the TIM1 Channel.
* This parameter can be one of the following values:
* - TIM1_CHANNEL_1: TIM1 Channel1
* - TIM1_CHANNEL_2: TIM1 Channel2
* - TIM1_CHANNEL_3: TIM1 Channel3
* @param[in] NewState specifies the TIM1 Channel CCxNE bit new state.
* This parameter can be: ENABLE or DISABLE.
* @retval None
* @par Required preconditions:
* None
*/
void TIM1_CCxNCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_TIM1_COMPLEMENTARY_CHANNEL_OK(TIM1_Channel));
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (TIM1_Channel == TIM1_CHANNEL_1)
{
/* Set or Reset the CC1NE Bit */
if (NewState != DISABLE)
{
TIM1->CCER1 |= TIM1_CCER1_CC1NE;
}
else
{
TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC1NE);
}
}
else if (TIM1_Channel == TIM1_CHANNEL_2)
{
/* Set or Reset the CC2NE Bit */
if (NewState != DISABLE)
{
TIM1->CCER1 |= TIM1_CCER1_CC2NE;
}
else
{
TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC2NE);
}
}
else
{
/* Set or Reset the CC3NE Bit */
if (NewState != DISABLE)
{
TIM1->CCER2 |= TIM1_CCER2_CC3NE;
}
else
{
TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC3NE);
}
}
}
/**
* @brief Selects the TIM1 Ouput Compare Mode. This function disables the
* selected channel before changing the Ouput Compare Mode. User has to
* enable this channel using TIM1_CCxCmd and TIM1_CCxNCmd functions.
* @param[in] TIM1_Channel specifies the TIM1 Channel.
* This parameter can be one of the following values:
* - TIM1_CHANNEL_1: TIM1 Channel1
* - TIM1_CHANNEL_2: TIM1 Channel2
* - TIM1_CHANNEL_3: TIM1 Channel3
* - TIM1_CHANNEL_4: TIM1 Channel4
* @param[in] TIM1_OCMode specifies the TIM1 Output Compare Mode.
* This paramter can be one of the following values:
* - TIM1_OCMODE_TIMING
* - TIM1_OCMODE_ACTIVE
* - TIM1_OCMODE_TOGGLE
* - TIM1_OCMODE_PWM1
* - TIM1_OCMODE_PWM2
* - TIM1_FORCEDACTION_ACTIVE
* - TIM1_FORCEDACTION_INACTIVE
* @retval None
* @par Required preconditions:
* None
*/
void TIM1_SelectOCxM(TIM1_Channel_TypeDef TIM1_Channel, TIM1_OCMode_TypeDef TIM1_OCMode)
{
/* Check the parameters */
assert_param(IS_TIM1_CHANNEL_OK(TIM1_Channel));
assert_param(IS_TIM1_OCM_OK(TIM1_OCMode));
if (TIM1_Channel == TIM1_CHANNEL_1)
{
/* Disable the Channel 1: Reset the CCE Bit */
TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC1E);
/* Reset the Output Compare Bits & Set the Output Compare Mode */
TIM1->CCMR1 = (u8)((TIM1->CCMR1 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_OCMode);
}
else if (TIM1_Channel == TIM1_CHANNEL_2)
{
/* Disable the Channel 2: Reset the CCE Bit */
TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC2E);
/* Reset the Output Compare Bits & Set the Output Compare Mode */
TIM1->CCMR2 = (u8)((TIM1->CCMR2 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_OCMode);
}
else if (TIM1_Channel == TIM1_CHANNEL_3)
{
/* Disable the Channel 3: Reset the CCE Bit */
TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC3E);
/* Reset the Output Compare Bits & Set the Output Compare Mode */
TIM1->CCMR3 = (u8)((TIM1->CCMR3 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_OCMode);
}
else
{
/* Disable the Channel 4: Reset the CCE Bit */
TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC4E);
/* Reset the Output Compare Bits & Set the Output Compare Mode */
TIM1->CCMR4 = (u8)((TIM1->CCMR4 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_OCMode);
}
}
/**
* @brief Sets the TIM1 Counter Register value.
* @param[in] Counter specifies the Counter register new value.
* This parameter is between 0x0000 and 0xFFFF.
* @retval None
* @par Required preconditions:
* None
*/
void TIM1_SetCounter(u16 Counter)
{
/* Set the Counter Register value */
TIM1->CNTRH = (u8)(Counter >> 8);
TIM1->CNTRL = (u8)(Counter);
}
/**
* @brief Sets the TIM1 Autoreload Register value.
* @param[in] Autoreload specifies the Autoreload register new value.
* This parameter is between 0x0000 and 0xFFFF.
* @retval None
* @par Required preconditions:
* None
*/
void TIM1_SetAutoreload(u16 Autoreload)
{
/* Set the Autoreload Register value */
TIM1->ARRH = (u8)(Autoreload >> 8);
TIM1->ARRL = (u8)(Autoreload);
}
/**
* @brief Sets the TIM1 Capture Compare1 Register value.
* @param[in] Compare1 specifies the Capture Compare1 register new value.
* This parameter is between 0x0000 and 0xFFFF.
* @retval None
* @par Required preconditions:
* None
*/
void TIM1_SetCompare1(u16 Compare1)
{
/* Set the Capture Compare1 Register value */
TIM1->CCR1H = (u8)(Compare1 >> 8);
TIM1->CCR1L = (u8)(Compare1);
}
/**
* @brief Sets the TIM1 Capture Compare2 Register value.
* @param[in] Compare2 specifies the Capture Compare2 regi
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -