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📄 e1000_main.c

📁 Click is a modular router toolkit. To use it you ll need to know how to compile and install the sof
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e1000_update_mng_vlan(struct e1000_adapter *adapter){	struct net_device *netdev = adapter->netdev;	uint16_t vid = adapter->hw.mng_cookie.vlan_id;	uint16_t old_vid = adapter->mng_vlan_id;	if (adapter->vlgrp) {		if (!adapter->vlgrp->vlan_devices[vid]) {			if (adapter->hw.mng_cookie.status &				E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {				e1000_vlan_rx_add_vid(netdev, vid);				adapter->mng_vlan_id = vid;			} else				adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;			if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&					(vid != old_vid) &&					!adapter->vlgrp->vlan_devices[old_vid])				e1000_vlan_rx_kill_vid(netdev, old_vid);		} else			adapter->mng_vlan_id = vid;	}}#endif/** * e1000_release_hw_control - release control of the h/w to f/w * @adapter: address of board private structure * * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit. * For ASF and Pass Through versions of f/w this means that the * driver is no longer loaded. For AMT version (only with 82573) i * of the f/w this means that the network i/f is closed. * **/static voide1000_release_hw_control(struct e1000_adapter *adapter){	uint32_t ctrl_ext;	uint32_t swsm;	uint32_t extcnf;	/* Let firmware taken over control of h/w */	switch (adapter->hw.mac_type) {	case e1000_82571:	case e1000_82572:	case e1000_80003es2lan:		ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);		E1000_WRITE_REG(&adapter->hw, CTRL_EXT,				ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);		break;	case e1000_82573:		swsm = E1000_READ_REG(&adapter->hw, SWSM);		E1000_WRITE_REG(&adapter->hw, SWSM,				swsm & ~E1000_SWSM_DRV_LOAD);	case e1000_ich8lan:		extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);		E1000_WRITE_REG(&adapter->hw, CTRL_EXT,				extcnf & ~E1000_CTRL_EXT_DRV_LOAD);		break;	default:		break;	}}/** * e1000_get_hw_control - get control of the h/w from f/w * @adapter: address of board private structure * * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit. * For ASF and Pass Through versions of f/w this means that * the driver is loaded. For AMT version (only with 82573) * of the f/w this means that the network i/f is open. * **/static voide1000_get_hw_control(struct e1000_adapter *adapter){	uint32_t ctrl_ext;	uint32_t swsm;	uint32_t extcnf;	/* Let firmware know the driver has taken over */	switch (adapter->hw.mac_type) {	case e1000_82571:	case e1000_82572:	case e1000_80003es2lan:		ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);		E1000_WRITE_REG(&adapter->hw, CTRL_EXT,				ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);		break;	case e1000_82573:		swsm = E1000_READ_REG(&adapter->hw, SWSM);		E1000_WRITE_REG(&adapter->hw, SWSM,				swsm | E1000_SWSM_DRV_LOAD);		break;	case e1000_ich8lan:		extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);		E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,				extcnf | E1000_EXTCNF_CTRL_SWFLAG);		break;	default:		break;	}}static voide1000_init_manageability(struct e1000_adapter *adapter){	if (adapter->en_mng_pt) {		uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);		uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);		/* disable hardware interception of ARP */		manc &= ~(E1000_MANC_ARP_EN);		/* enable receiving management packets to the host */		/* this will probably generate destination unreachable messages		 * from the host OS, but the packets will be handled on SMBUS */		if (adapter->hw.mac_type >= e1000_82571) {			manc |= E1000_MANC_EN_MNG2HOST;#define E1000_MNG2HOST_PORT_623 (1 << 5)#define E1000_MNG2HOST_PORT_664 (1 << 6)			manc2h |= E1000_MNG2HOST_PORT_623;			manc2h |= E1000_MNG2HOST_PORT_664;			E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);		}		E1000_WRITE_REG(&adapter->hw, MANC, manc);	}}static voide1000_release_manageability(struct e1000_adapter *adapter){	if (adapter->en_mng_pt) {		uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);		/* re-enable hardware interception of ARP */		manc |= E1000_MANC_ARP_EN;		if (adapter->hw.mac_type >= e1000_82571)			manc &= ~E1000_MANC_EN_MNG2HOST;		/* don't explicitly have to mess with MANC2H since		 * MANC has an enable disable that gates MANC2H */		/* XXX stop the hardware watchdog ? */		E1000_WRITE_REG(&adapter->hw, MANC, manc);	}}inte1000_up(struct e1000_adapter *adapter){	struct net_device *netdev = adapter->netdev;	int i;	/* hardware has been reset, we need to reload some things */	e1000_set_multi(netdev);#ifdef NETIF_F_HW_VLAN_TX	e1000_restore_vlan(adapter);#endif	e1000_init_manageability(adapter);	e1000_configure_tx(adapter);	e1000_setup_rctl(adapter);	e1000_configure_rx(adapter);	/* call E1000_DESC_UNUSED which always leaves	 * at least 1 descriptor unused to make sure	 * next_to_use != next_to_clean */	for (i = 0; i < adapter->num_rx_queues; i++) {		struct e1000_rx_ring *ring = &adapter->rx_ring[i];		adapter->alloc_rx_buf(adapter, ring,		                      E1000_DESC_UNUSED(ring));	}	adapter->tx_queue_len = netdev->tx_queue_len;#ifdef CONFIG_E1000_NAPI	netif_poll_enable(netdev);#endif	e1000_irq_enable(adapter);	clear_bit(__E1000_DOWN, &adapter->flags);	/* fire a link change interrupt to start the watchdog */	E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);	return 0;}/** * e1000_power_up_phy - restore link in case the phy was powered down * @adapter: address of board private structure * * The phy may be powered down to save power and turn off link when the * driver is unloaded and wake on lan is not enabled (among others) * *** this routine MUST be followed by a call to e1000_reset *** * **/void e1000_power_up_phy(struct e1000_adapter *adapter){	uint16_t mii_reg = 0;	/* Just clear the power down bit to wake the phy back up */	if (adapter->hw.media_type == e1000_media_type_copper) {		/* according to the manual, the phy will retain its		 * settings across a power-down/up cycle */		e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);		mii_reg &= ~MII_CR_POWER_DOWN;		e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);	}}static void e1000_power_down_phy(struct e1000_adapter *adapter){	/* Power down the PHY so no link is implied when interface is down *	 * The PHY cannot be powered down if any of the following is TRUE *	 * (a) WoL is enabled	 * (b) AMT is active	 * (c) SoL/IDER session is active */	if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&	   adapter->hw.media_type == e1000_media_type_copper) {		uint16_t mii_reg = 0;		switch (adapter->hw.mac_type) {		case e1000_82540:		case e1000_82545:		case e1000_82545_rev_3:		case e1000_82546:		case e1000_82546_rev_3:		case e1000_82541:		case e1000_82541_rev_2:		case e1000_82547:		case e1000_82547_rev_2:			if (E1000_READ_REG(&adapter->hw, MANC) &			    E1000_MANC_SMBUS_EN)				goto out;			break;		case e1000_82571:		case e1000_82572:		case e1000_82573:		case e1000_80003es2lan:		case e1000_ich8lan:			if (e1000_check_mng_mode(&adapter->hw) ||			    e1000_check_phy_reset_block(&adapter->hw))				goto out;			break;		default:			goto out;		}		e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);		mii_reg |= MII_CR_POWER_DOWN;		e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);		mdelay(1);	}out:	return;}voide1000_down(struct e1000_adapter *adapter){	struct net_device *netdev = adapter->netdev;	/* signal that we're down so the interrupt handler does not	 * reschedule our watchdog timer */	set_bit(__E1000_DOWN, &adapter->flags);	e1000_irq_disable(adapter);	del_timer_sync(&adapter->tx_fifo_stall_timer);	del_timer_sync(&adapter->watchdog_timer);	del_timer_sync(&adapter->phy_info_timer);#ifdef CONFIG_E1000_NAPI	netif_poll_disable(netdev);#endif	netdev->tx_queue_len = adapter->tx_queue_len;	adapter->link_speed = 0;	adapter->link_duplex = 0;	netif_carrier_off(netdev);	netif_stop_queue(netdev);	e1000_reset(adapter);	e1000_clean_all_tx_rings(adapter);	e1000_clean_all_rx_rings(adapter);}voide1000_reinit_locked(struct e1000_adapter *adapter){	WARN_ON(in_interrupt());	while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))		msleep(1);	e1000_down(adapter);	e1000_up(adapter);	clear_bit(__E1000_RESETTING, &adapter->flags);}voide1000_reset(struct e1000_adapter *adapter){	uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;	uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;	boolean_t legacy_pba_adjust = FALSE;	/* Repartition Pba for greater than 9k mtu	 * To take effect CTRL.RST is required.	 */	switch (adapter->hw.mac_type) {	case e1000_82542_rev2_0:	case e1000_82542_rev2_1:	case e1000_82543:	case e1000_82544:	case e1000_82540:	case e1000_82541:	case e1000_82541_rev_2:		legacy_pba_adjust = TRUE;		pba = E1000_PBA_48K;		break;	case e1000_82545:	case e1000_82545_rev_3:	case e1000_82546:	case e1000_82546_rev_3:		pba = E1000_PBA_48K;		break;	case e1000_82547:	case e1000_82547_rev_2:		legacy_pba_adjust = TRUE;		pba = E1000_PBA_30K;		break;	case e1000_82571:	case e1000_82572:	case e1000_80003es2lan:		pba = E1000_PBA_38K;		break;	case e1000_82573:#define E1000_PBA_20K 0x0014		pba = E1000_PBA_20K;		break;	case e1000_ich8lan:		pba = E1000_PBA_8K;	case e1000_undefined:	case e1000_num_macs:		break;	}	if (legacy_pba_adjust == TRUE) {		if (adapter->netdev->mtu > E1000_RXBUFFER_8192)			pba -= 8; /* allocate more FIFO for Tx */		if (adapter->hw.mac_type == e1000_82547) {			adapter->tx_fifo_head = 0;			adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;			adapter->tx_fifo_size =				(E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;			atomic_set(&adapter->tx_fifo_stall, 0);		}	} else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {		/* adjust PBA for jumbo frames */		E1000_WRITE_REG(&adapter->hw, PBA, pba);		/* To maintain wire speed transmits, the Tx FIFO should be		 * large enough to accomodate two full transmit packets,		 * rounded up to the next 1KB and expressed in KB.  Likewise,		 * the Rx FIFO should be large enough to accomodate at least		 * one full receive packet and is similarly rounded up and		 * expressed in KB. */		pba = E1000_READ_REG(&adapter->hw, PBA);		/* upper 16 bits has Tx packet buffer allocation size in KB */		tx_space = pba >> 16;		/* lower 16 bits has Rx packet buffer allocation size in KB */		pba &= 0xffff;		/* don't include ethernet FCS because hardware appends/strips */		min_tx_space =		min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE + 				VLAN_TAG_SIZE;		min_tx_space *= 2;		E1000_ROUNDUP(min_tx_space, 1024);		min_tx_space >>= 10;		E1000_ROUNDUP(min_rx_space, 1024);		min_rx_space >>= 10;		/* If current Tx allocation is less than the min Tx FIFO size,		 * and the min Tx FIFO size is less than the current Rx FIFO		 * allocation, take space away from current Rx allocation */		if (tx_space < min_tx_space &&		    ((min_tx_space - tx_space) < pba)) {			pba = pba - (min_tx_space - tx_space);			/* PCI/PCIx hardware has PBA alignment constraints */			switch (adapter->hw.mac_type) {			case e1000_82545 ... e1000_82546_rev_3:				pba &= ~(E1000_PBA_8K - 1);				break;			default:				break;			}			/* if short on rx space, rx wins and must trump tx			 * adjustment or use Early Receive if available */			if (pba < min_rx_space) {				switch (adapter->hw.mac_type) {				case e1000_82573:					/* ERT enabled in e1000_configure_rx */					break;				default:					pba = min_rx_space;					break;				}			}		}	}	E1000_WRITE_REG(&adapter->hw, PBA, pba);	/* flow control settings */	/* Set the FC high water mark to 90% of the FIFO size.	 * Required to clear last 3 LSB */	fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;	/* We can't use 90% on small FIFOs because the remainder	 * would be less than 1 full frame.  In this case, we size	 * it to allow at least a full frame above the high water	 *  mark. */	if (pba < E1000_PBA_16K)		fc_high_water_mark = (pba * 1024) - 1600;	adapter->hw.fc_high_water = fc_high_water_mark;	adapter->hw.fc_low_water = fc_high_water_mark - 8;	if (adapter->hw.mac_type == e1000_80003es2lan)		adapter->hw.fc_pause_time = 0xFFFF;	else		adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;	adapter->hw.fc_send_xon = 1;	adapter->hw.fc = adapter->hw.original_fc;

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