📄 csl_sdrchal_270.h
字号:
#define _SDRC_SDBUFD7L_AOI(AND,OR,INV) _REG_AOI(_SDRC_SDBUFD7L_ADDR,AND,OR,INV)/*------------------------------------------------------------------------------** Register Macros for SDRC SDBUFD7H register :* * * *---------------------------------------------------------------------------------*/#define _SDRC_SDBUFD7H_GET() _REG_GET(_SDRC_SDBUFD7H_ADDR)#define _SDRC_SDBUFD7H_SET(Val) _REG_SET(_SDRC_SDBUFD7H_ADDR, Val)#define _SDRC_SDBUFD7H_AOI(AND,OR,INV) _REG_AOI(_SDRC_SDBUFD7H_ADDR,AND,OR,INV)/*------------------------------------------------------------------------------** Register Macros for SDRC SDBUFAD1 register :* * * *---------------------------------------------------------------------------------*/#define _SDRC_SDBUFAD1_GET() _REG_GET(_SDRC_SDBUFAD1_ADDR)#define _SDRC_SDBUFAD1_SET(Val) _REG_SET(_SDRC_SDBUFAD1_ADDR, Val)#define _SDRC_SDBUFAD1_AOI(AND,OR,INV) _REG_AOI(_SDRC_SDBUFAD1_ADDR,AND,OR,INV)#define _SDRC_SDBUFAD1_FGET(Field) _FIELD_GET(_SDRC_SDBUFAD1_ADDR, _SDRC_SDBUFAD1_##Field##)#define _SDRC_SDBUFAD1_FSET(Field, Val) _FIELD_SET(_SDRC_SDBUFAD1_ADDR, _SDRC_SDBUFAD1_##Field##, Val)#define _SDRC_SDBUFAD1_FAOI(Field, AND, OR, INV) _FIELD_AOI(_SDRC_SDBUFAD1_ADDR, _SDRC_SDBUFAD1_##Field##, AND, OR, INV)#define _SDRC_SDBUFAD1_AAI_SHIFT (8)#define _SDRC_SDBUFAD1_AAI_MK(n) (((Uint16)(n) & 0x0001u) << _SDRC_SDBUFAD1_AAI_SHIFT)#define _SDRC_SDBUFAD1_AAI_MASK (_SDRC_SDBUFAD1_AAI_MK(0x0001u))#define _SDRC_SDBUFAD1_AAI_CLR (~(_SDRC_SDBUFAD1_AAI_MASK))#define _SDRC_SDBUFAD1_SDAH_SHIFT (0)#define _SDRC_SDBUFAD1_SDAH_MK(n) ((Uint16)(n) & 0x003fu) #define _SDRC_SDBUFAD1_SDAH_MASK (_SDRC_SDBUFAD1_SDAH_MK(0x003fu))#define _SDRC_SDBUFAD1_SDAH_CLR (~(_SDRC_SDBUFAD1_SDAH_MASK))/*------------------------------------------------------------------------------** Register Macros for SDRC SDBUFAD2 register :* * * *---------------------------------------------------------------------------------*/#define _SDRC_SDBUFAD2_GET() _REG_GET(_SDRC_SDBUFAD2_ADDR)#define _SDRC_SDBUFAD2_SET(Val) _REG_SET(_SDRC_SDBUFAD2_ADDR, Val)#define _SDRC_SDBUFAD2_AOI(AND,OR,INV) _REG_AOI(_SDRC_SDBUFAD2_ADDR,AND,OR,INV)/*------------------------------------------------------------------------------** Register Macros for SDRC SDBUFCTL register :* * * *---------------------------------------------------------------------------------*/#define _SDRC_SDBUFCTL_GET() _REG_GET(_SDRC_SDBUFCTL_ADDR)#define _SDRC_SDBUFCTL_SET(Val) _REG_SET(_SDRC_SDBUFCTL_ADDR, Val)#define _SDRC_SDBUFCTL_AOI(AND,OR,INV) _REG_AOI(_SDRC_SDBUFCTL_ADDR,AND,OR,INV)#define _SDRC_SDBUFCTL_FGET(Field) _FIELD_GET(_SDRC_SDBUFCTL_ADDR, _SDRC_SDBUFCTL_##Field##)#define _SDRC_SDBUFCTL_FSET(Field, Val) _FIELD_SET(_SDRC_SDBUFCTL_ADDR, _SDRC_SDBUFCTL_##Field##, Val)#define _SDRC_SDBUFCTL_FAOI(Field, AND, OR, INV) _FIELD_AOI(_SDRC_SDBUFCTL_ADDR, _SDRC_SDBUFCTL_##Field##, AND, OR, INV)#define _SDRC_SDBUFCTL_PTSEL_SHIFT (4)#define _SDRC_SDBUFCTL_PTSEL_MK(n) (((Uint16)(n) & 0x0003u) << _SDRC_SDBUFCTL_PTSEL_SHIFT)#define _SDRC_SDBUFCTL_PTSEL_MASK (_SDRC_SDBUFCTL_PTSEL_MK(0x0003u))#define _SDRC_SDBUFCTL_PTSEL_CLR (~(_SDRC_SDBUFCTL_PTSEL_MASK))#define _SDRC_SDBUFCTL_BUFC_SHIFT (3)#define _SDRC_SDBUFCTL_BUFC_MK(n) (((Uint16)(n) & 0x0001u) << _SDRC_SDBUFCTL_BUFC_SHIFT)#define _SDRC_SDBUFCTL_BUFC_MASK (_SDRC_SDBUFCTL_BUFC_MK(0x0001u))#define _SDRC_SDBUFCTL_BUFC_CLR (~(_SDRC_SDBUFCTL_BUFC_MASK))#define _SDRC_SDBUFCTL_WM_SHIFT (2)#define _SDRC_SDBUFCTL_WM_MK(n) (((Uint16)(n) & 0x0001u) << _SDRC_SDBUFCTL_WM_SHIFT)#define _SDRC_SDBUFCTL_WM_MASK (_SDRC_SDBUFCTL_WM_MK(0x0001u))#define _SDRC_SDBUFCTL_WM_CLR (~(_SDRC_SDBUFCTL_WM_MASK))#define _SDRC_SDBUFCTL_WA_SHIFT (1)#define _SDRC_SDBUFCTL_WA_MK(n) (((Uint16)(n) & 0x0001u) << _SDRC_SDBUFCTL_WA_SHIFT)#define _SDRC_SDBUFCTL_WA_MASK (_SDRC_SDBUFCTL_WA_MK(0x0001u))#define _SDRC_SDBUFCTL_WA_CLR (~(_SDRC_SDBUFCTL_WA_MASK))#define _SDRC_SDBUFCTL_RSD_SHIFT (0)#define _SDRC_SDBUFCTL_RSD_MK(n) ((Uint16)(n) & 0x0001u) #define _SDRC_SDBUFCTL_RSD_MASK (_SDRC_SDBUFCTL_RSD_MK(0x0001u))#define _SDRC_SDBUFCTL_RSD_CLR (~(_SDRC_SDBUFCTL_RSD_MASK))/*------------------------------------------------------------------------------** Register Macros for SDRC SDMODE register :* * * *---------------------------------------------------------------------------------*/#define _SDRC_SDMODE_GET() _REG_GET(_SDRC_SDMODE_ADDR)#define _SDRC_SDMODE_SET(Val) _REG_SET(_SDRC_SDMODE_ADDR, Val)#define _SDRC_SDMODE_AOI(AND,OR,INV) _REG_AOI(_SDRC_SDMODE_ADDR,AND,OR,INV)#define _SDRC_SDMODE_FGET(Field) _FIELD_GET(_SDRC_SDMODE_ADDR, _SDRC_SDMODE_##Field##)#define _SDRC_SDMODE_FSET(Field, Val) _FIELD_SET(_SDRC_SDMODE_ADDR, _SDRC_SDMODE_##Field##, Val)#define _SDRC_SDMODE_FAOI(Field, AND, OR, INV) _FIELD_AOI(_SDRC_SDMODE_ADDR, _SDRC_SDMODE_##Field##, AND, OR, INV)#define _SDRC_SDMODE_TRDL_SHIFT (15)#define _SDRC_SDMODE_TRDL_MK(n) (((Uint16)(n) & 0x0001u) << _SDRC_SDMODE_TRDL_SHIFT)#define _SDRC_SDMODE_TRDL_MASK (_SDRC_SDMODE_TRDL_MK(0x0001u))#define _SDRC_SDMODE_TRDL_CLR (~(_SDRC_SDMODE_TRDL_MASK))#define _SDRC_SDMODE_SDBW_SHIFT (14)#define _SDRC_SDMODE_SDBW_MK(n) (((Uint16)(n) & 0x0001u) << _SDRC_SDMODE_SDBW_SHIFT)#define _SDRC_SDMODE_SDBW_MASK (_SDRC_SDMODE_SDBW_MK(0x0001u))#define _SDRC_SDMODE_SDBW_CLR (~(_SDRC_SDMODE_SDBW_MASK))#define _SDRC_SDMODE_TRCD_SHIFT (13)#define _SDRC_SDMODE_TRCD_MK(n) (((Uint16)(n) & 0x0001u) << _SDRC_SDMODE_TRCD_SHIFT)#define _SDRC_SDMODE_TRCD_MASK (_SDRC_SDMODE_TRCD_MK(0x0001u))#define _SDRC_SDMODE_TRCD_CLR (~(_SDRC_SDMODE_TRCD_MASK))#define _SDRC_SDMODE_BNS_SHIFT (12)#define _SDRC_SDMODE_BNS_MK(n) (((Uint16)(n) & 0x0001u) << _SDRC_SDMODE_BNS_SHIFT)#define _SDRC_SDMODE_BNS_MASK (_SDRC_SDMODE_BNS_MK(0x0001u))#define _SDRC_SDMODE_BNS_CLR (~(_SDRC_SDMODE_BNS_MASK))#define _SDRC_SDMODE_CASL_SHIFT (10)#define _SDRC_SDMODE_CASL_MK(n) (((Uint16)(n) & 0x0001u) << _SDRC_SDMODE_CASL_SHIFT)#define _SDRC_SDMODE_CASL_MASK (_SDRC_SDMODE_CASL_MK(0x0001u))#define _SDRC_SDMODE_CASL_CLR (~(_SDRC_SDMODE_CASL_MASK))#define _SDRC_SDMODE_MEMT_SHIFT (8)#define _SDRC_SDMODE_MEMT_MK(n) (((Uint16)(n) & 0x0003u) << _SDRC_SDMODE_MEMT_SHIFT)#define _SDRC_SDMODE_MEMT_MASK (_SDRC_SDMODE_MEMT_MK(0x0003u))#define _SDRC_SDMODE_MEMT_CLR (~(_SDRC_SDMODE_MEMT_MASK))#define _SDRC_SDMODE_DQMC_SHIFT (7)#define _SDRC_SDMODE_DQMC_MK(n) (((Uint16)(n) & 0x0001u) << _SDRC_SDMODE_DQMC_SHIFT)#define _SDRC_SDMODE_DQMC_MASK (_SDRC_SDMODE_DQMC_MK(0x0001u))#define _SDRC_SDMODE_DQMC_CLR (~(_SDRC_SDMODE_DQMC_MASK))#define _SDRC_SDMODE_APO_SHIFT (6)#define _SDRC_SDMODE_APO_MK(n) (((Uint16)(n) & 0x0001u) << _SDRC_SDMODE_APO_SHIFT)#define _SDRC_SDMODE_APO_MASK (_SDRC_SDMODE_APO_MK(0x0001u))#define _SDRC_SDMODE_APO_CLR (~(_SDRC_SDMODE_APO_MASK))#define _SDRC_SDMODE_SDCTL_SHIFT (0)#define _SDRC_SDMODE_SDCTL_MK(n) ((Uint16)(n) & 0x003fu) #define _SDRC_SDMODE_SDCTL_MASK (_SDRC_SDMODE_SDCTL_MK(0x003fu))#define _SDRC_SDMODE_SDCTL_CLR (~(_SDRC_SDMODE_SDCTL_MASK))/*------------------------------------------------------------------------------** Register Macros for SDRC REFCTL register :* * * *---------------------------------------------------------------------------------*/#define _SDRC_REFCTL_GET() _REG_GET(_SDRC_REFCTL_ADDR)#define _SDRC_REFCTL_SET(Val) _REG_SET(_SDRC_REFCTL_ADDR, Val)#define _SDRC_REFCTL_AOI(AND,OR,INV) _REG_AOI(_SDRC_REFCTL_ADDR,AND,OR,INV)#define _SDRC_REFCTL_FGET(Field) _FIELD_GET(_SDRC_REFCTL_ADDR, _SDRC_REFCTL_##Field##)#define _SDRC_REFCTL_FSET(Field, Val) _FIELD_SET(_SDRC_REFCTL_ADDR, _SDRC_REFCTL_##Field##, Val)#define _SDRC_REFCTL_FAOI(Field, AND, OR, INV) _FIELD_AOI(_SDRC_REFCTL_ADDR, _SDRC_REFCTL_##Field##, AND, OR, INV)#define _SDRC_REFCTL_SDMA1_SHIFT (13)#define _SDRC_REFCTL_SDMA1_MK(n) (((Uint16)(n) & 0x0007u) << _SDRC_REFCTL_SDMA1_SHIFT)#define _SDRC_REFCTL_SDMA1_MASK (_SDRC_REFCTL_SDMA1_MK(0x0007u))#define _SDRC_REFCTL_SDMA1_CLR (~(_SDRC_REFCTL_SDMA1_MASK))#define _SDRC_REFCTL_SDMA2_SHIFT (10)#define _SDRC_REFCTL_SDMA2_MK(n) (((Uint16)(n) & 0x0007u) << _SDRC_REFCTL_SDMA2_SHIFT)#define _SDRC_REFCTL_SDMA2_MASK (_SDRC_REFCTL_SDMA2_MK(0x0007u))#define _SDRC_REFCTL_SDMA2_CLR (~(_SDRC_REFCTL_SDMA2_MASK))#define _SDRC_REFCTL_REFEN_SHIFT (8)#define _SDRC_REFCTL_REFEN_MK(n) (((Uint16)(n) & 0x0001u) << _SDRC_REFCTL_REFEN_SHIFT)#define _SDRC_REFCTL_REFEN_MASK (_SDRC_REFCTL_REFEN_MK(0x0001u))#define _SDRC_REFCTL_REFEN_CLR (~(_SDRC_REFCTL_REFEN_MASK))#define _SDRC_REFCTL_REFC_SHIFT (0)#define _SDRC_REFCTL_REFC_MK(n) ((Uint16)(n) & 0x00ffu) #define _SDRC_REFCTL_REFC_MASK (_SDRC_REFCTL_REFC_MK(0x00ffu))#define _SDRC_REFCTL_REFC_CLR (~(_SDRC_REFCTL_REFC_MASK))/*------------------------------------------------------------------------------** Register Macros for SDRC SDPRTY1 register :* * * *---------------------------------------------------------------------------------*/#define _SDRC_SDPRTY1_GET() _REG_GET(_SDRC_SDPRTY1_ADDR)#define _SDRC_SDPRTY1_SET(Val) _REG_SET(_SDRC_SDPRTY1_ADDR, Val)#define _SDRC_SDPRTY1_AOI(AND,OR,INV) _REG_AOI(_SDRC_SDPRTY1_ADDR,AND,OR,INV)#define _SDRC_SDPRTY1_FGET(Field) _FIELD_GET(_SDRC_SDPRTY1_ADDR, _SDRC_SDPRTY1_##Field##)#define _SDRC_SDPRTY1_FSET(Field, Val) _FIELD_SET(_SDRC_SDPRTY1_ADDR, _SDRC_SDPRTY1_##Field##, Val)#define _SDRC_SDPRTY1_FAOI(Field, AND, OR, INV) _FIELD_AOI(_SDRC_SDPRTY1_ADDR, _SDRC_SDPRTY1_##Field##, AND, OR, INV)#define _SDRC_SDPRTY1_CCDC_SHIFT (0)#define _SDRC_SDPRTY1_CCDC_MK(n) ((Uint16)(n) & 0x03ffu) #define _SDRC_SDPRTY1_CCDC_MASK (_SDRC_SDPRTY1_CCDC_MK(0x03ffu))#define _SDRC_SDPRTY1_CCDC_CLR (~(_SDRC_SDPRTY1_CCDC_MASK))/*------------------------------------------------------------------------------** Register Macros for SDRC SDPRTY2 register :* * * *---------------------------------------------------------------------------------*/#define _SDRC_SDPRTY2_GET() _REG_GET(_SDRC_SDPRTY2_ADDR)
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -