📄 csl_tmr0hal_270.h
字号:
/* * Copyright 2001 by Texas Instruments Incorporated. * All rights reserved. Property of Texas Instruments Incorporated. * Restricted rights to use, duplicate or disclose this code are * granted through contract. *//******************************************************************************\* Copyright (C) 2001 Texas Instruments Incorporated.* All Rights Reserved*------------------------------------------------------------------------------* MODULE.NAME... TMR0 - HAL configuration module* FILENAME...... /vobs/DSC_RTOS/arm/project/dm270/include/csl/csl_tmr0hal_270.h* PROJECT....... ARM Chip Support Library* COMPONENT..... HAL* IMPORTS....... *------------------------------------------------------------------------------* HISTORY:* CREATED: 12/06/2001 *------------------------------------------------------------------------------* DESCRIPTION: (CHIP memory mapped register definitions)***\******************************************************************************//*-----------------------------------------------------------------------------------** Register Macros for TMR0:*------------------------------------------------------------------------------------*//*------------------------------------------------------------------------------** Register Macros for TMR0 TMMD0 register :* * * *---------------------------------------------------------------------------------*/#define _TMR0_TMMD0_GET() _REG_GET(_TMR0_TMMD0_ADDR)#define _TMR0_TMMD0_SET(Val) _REG_SET(_TMR0_TMMD0_ADDR, Val)#define _TMR0_TMMD0_AOI(AND,OR,INV) _REG_AOI(_TMR0_TMMD0_ADDR,AND,OR,INV)#define _TMR0_TMMD0_FGET(Field) _FIELD_GET(_TMR0_TMMD0_ADDR, _TMR0_TMMD0_##Field##)#define _TMR0_TMMD0_FSET(Field, Val) _FIELD_SET(_TMR0_TMMD0_ADDR, _TMR0_TMMD0_##Field##, Val)#define _TMR0_TMMD0_FAOI(Field, AND, OR, INV) _FIELD_AOI(_TMR0_TMMD0_ADDR, _TMR0_TMMD0_##Field##, AND, OR, INV)#define _TMR0_TMMD0_TEST_SHIFT (2)#define _TMR0_TMMD0_TEST_MK(n) (((Uint16)(n) & 0x003fu) << _TMR0_TMMD0_TEST_SHIFT)#define _TMR0_TMMD0_TEST_MASK (_TMR0_TMMD0_TEST_MK(0x003fu))#define _TMR0_TMMD0_TEST_CLR (~(_TMR0_TMMD0_TEST_MASK))#define _TMR0_TMMD0_MODE_SHIFT (0)#define _TMR0_TMMD0_MODE_MK(n) ((Uint16)(n) & 0x0003u) #define _TMR0_TMMD0_MODE_MASK (_TMR0_TMMD0_MODE_MK(0x0003u))#define _TMR0_TMMD0_MODE_CLR (~(_TMR0_TMMD0_MODE_MASK))/*------------------------------------------------------------------------------** Register Macros for TMR0 TMRSV0 register :* * * *---------------------------------------------------------------------------------*/#define _TMR0_TMRSV0_GET() _REG_GET(_TMR0_TMRSV0_ADDR)#define _TMR0_TMRSV0_SET(Val) _REG_SET(_TMR0_TMRSV0_ADDR, Val)#define _TMR0_TMRSV0_AOI(AND,OR,INV) _REG_AOI(_TMR0_TMRSV0_ADDR,AND,OR,INV)/*------------------------------------------------------------------------------** Register Macros for TMR0 TMPRSCL0 register :* * * *---------------------------------------------------------------------------------*/#define _TMR0_TMPRSCL0_GET() _REG_GET(_TMR0_TMPRSCL0_ADDR)#define _TMR0_TMPRSCL0_SET(Val) _REG_SET(_TMR0_TMPRSCL0_ADDR, Val)#define _TMR0_TMPRSCL0_AOI(AND,OR,INV) _REG_AOI(_TMR0_TMPRSCL0_ADDR,AND,OR,INV)#define _TMR0_TMPRSCL0_FGET(Field) _FIELD_GET(_TMR0_TMPRSCL0_ADDR, _TMR0_TMPRSCL0_##Field##)#define _TMR0_TMPRSCL0_FSET(Field, Val) _FIELD_SET(_TMR0_TMPRSCL0_ADDR, _TMR0_TMPRSCL0_##Field##, Val)#define _TMR0_TMPRSCL0_FAOI(Field, AND, OR, INV) _FIELD_AOI(_TMR0_TMPRSCL0_ADDR, _TMR0_TMPRSCL0_##Field##, AND, OR, INV)#define _TMR0_TMPRSCL0_PRSCL_SHIFT (0)#define _TMR0_TMPRSCL0_PRSCL_MK(n) ((Uint16)(n) & 0x03ffu) #define _TMR0_TMPRSCL0_PRSCL_MASK (_TMR0_TMPRSCL0_PRSCL_MK(0x03ffu))#define _TMR0_TMPRSCL0_PRSCL_CLR (~(_TMR0_TMPRSCL0_PRSCL_MASK))/*------------------------------------------------------------------------------** Register Macros for TMR0 TMDIV0 register :* * * *---------------------------------------------------------------------------------*/#define _TMR0_TMDIV0_GET() _REG_GET(_TMR0_TMDIV0_ADDR)#define _TMR0_TMDIV0_SET(Val) _REG_SET(_TMR0_TMDIV0_ADDR, Val)#define _TMR0_TMDIV0_AOI(AND,OR,INV) _REG_AOI(_TMR0_TMDIV0_ADDR,AND,OR,INV)/*------------------------------------------------------------------------------** Register Macros for TMR0 TMTRG0 register :* * * *---------------------------------------------------------------------------------*/#define _TMR0_TMTRG0_GET() _REG_GET(_TMR0_TMTRG0_ADDR)#define _TMR0_TMTRG0_SET(Val) _REG_SET(_TMR0_TMTRG0_ADDR, Val)#define _TMR0_TMTRG0_AOI(AND,OR,INV) _REG_AOI(_TMR0_TMTRG0_ADDR,AND,OR,INV)#define _TMR0_TMTRG0_FGET(Field) _FIELD_GET(_TMR0_TMTRG0_ADDR, _TMR0_TMTRG0_##Field##)#define _TMR0_TMTRG0_FSET(Field, Val) _FIELD_SET(_TMR0_TMTRG0_ADDR, _TMR0_TMTRG0_##Field##, Val)#define _TMR0_TMTRG0_FAOI(Field, AND, OR, INV) _FIELD_AOI(_TMR0_TMTRG0_ADDR, _TMR0_TMTRG0_##Field##, AND, OR, INV)#define _TMR0_TMTRG0_TRG_SHIFT (0)#define _TMR0_TMTRG0_TRG_MK(n) ((Uint16)(n) & 0x0001u) #define _TMR0_TMTRG0_TRG_MASK (_TMR0_TMTRG0_TRG_MK(0x0001u))#define _TMR0_TMTRG0_TRG_CLR (~(_TMR0_TMTRG0_TRG_MASK))/*------------------------------------------------------------------------------** Register Macros for TMR0 TMCNT0 register :* * * *---------------------------------------------------------------------------------*/#define _TMR0_TMCNT0_GET() _REG_GET(_TMR0_TMCNT0_ADDR)#define _TMR0_TMCNT0_SET(Val) _REG_SET(_TMR0_TMCNT0_ADDR, Val)#define _TMR0_TMCNT0_AOI(AND,OR,INV) _REG_AOI(_TMR0_TMCNT0_ADDR,AND,OR,INV)⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -