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📄 csl_tmr2hal_270.h

📁 dm270 source code
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/*    *  Copyright 2001 by Texas Instruments Incorporated. *  All rights reserved. Property of Texas Instruments Incorporated. *  Restricted rights to use, duplicate or disclose this code are *  granted through contract. *//******************************************************************************\*           Copyright (C) 2001 Texas Instruments Incorporated.*                           All Rights Reserved*------------------------------------------------------------------------------* MODULE.NAME... TMR2 - HAL configuration module* FILENAME...... /vobs/DSC_RTOS/arm/project/dm270/include/csl/csl_tmr2hal_270.h* PROJECT....... ARM Chip Support Library* COMPONENT..... HAL* IMPORTS....... *------------------------------------------------------------------------------* HISTORY:*   CREATED:       12/06/2001 *------------------------------------------------------------------------------* DESCRIPTION:  (CHIP memory mapped register definitions)***\******************************************************************************//*-----------------------------------------------------------------------------------** Register Macros for TMR2:*------------------------------------------------------------------------------------*//*------------------------------------------------------------------------------** Register Macros for TMR2 TMMD2 register :*                                                                                    *                                                                                    *                                                                                    *---------------------------------------------------------------------------------*/#define _TMR2_TMMD2_GET()			_REG_GET(_TMR2_TMMD2_ADDR)#define _TMR2_TMMD2_SET(Val)			_REG_SET(_TMR2_TMMD2_ADDR, Val)#define _TMR2_TMMD2_AOI(AND,OR,INV)		_REG_AOI(_TMR2_TMMD2_ADDR,AND,OR,INV)#define _TMR2_TMMD2_FGET(Field)			_FIELD_GET(_TMR2_TMMD2_ADDR, _TMR2_TMMD2_##Field##)#define _TMR2_TMMD2_FSET(Field, Val)		_FIELD_SET(_TMR2_TMMD2_ADDR, _TMR2_TMMD2_##Field##, Val)#define _TMR2_TMMD2_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_TMR2_TMMD2_ADDR, _TMR2_TMMD2_##Field##, AND, OR, INV)#define _TMR2_TMMD2_TEST_SHIFT		(2)#define _TMR2_TMMD2_TEST_MK(n)		(((Uint16)(n) & 0x003fu) << _TMR2_TMMD2_TEST_SHIFT)#define _TMR2_TMMD2_TEST_MASK			(_TMR2_TMMD2_TEST_MK(0x003fu))#define _TMR2_TMMD2_TEST_CLR			(~(_TMR2_TMMD2_TEST_MASK))#define _TMR2_TMMD2_MODE_SHIFT		(0)#define _TMR2_TMMD2_MODE_MK(n)		((Uint16)(n) & 0x0003u) #define _TMR2_TMMD2_MODE_MASK			(_TMR2_TMMD2_MODE_MK(0x0003u))#define _TMR2_TMMD2_MODE_CLR			(~(_TMR2_TMMD2_MODE_MASK))/*------------------------------------------------------------------------------** Register Macros for TMR2 TMRSV2 register :*                                                                                    *                                                                                    *                                                                                    *---------------------------------------------------------------------------------*/#define _TMR2_TMRSV2_GET()			_REG_GET(_TMR2_TMRSV2_ADDR)#define _TMR2_TMRSV2_SET(Val)			_REG_SET(_TMR2_TMRSV2_ADDR, Val)#define _TMR2_TMRSV2_AOI(AND,OR,INV)		_REG_AOI(_TMR2_TMRSV2_ADDR,AND,OR,INV)/*------------------------------------------------------------------------------** Register Macros for TMR2 TMPRSCL2 register :*                                                                                    *                                                                                    *                                                                                    *---------------------------------------------------------------------------------*/#define _TMR2_TMPRSCL2_GET()			_REG_GET(_TMR2_TMPRSCL2_ADDR)#define _TMR2_TMPRSCL2_SET(Val)			_REG_SET(_TMR2_TMPRSCL2_ADDR, Val)#define _TMR2_TMPRSCL2_AOI(AND,OR,INV)		_REG_AOI(_TMR2_TMPRSCL2_ADDR,AND,OR,INV)#define _TMR2_TMPRSCL2_FGET(Field)			_FIELD_GET(_TMR2_TMPRSCL2_ADDR, _TMR2_TMPRSCL2_##Field##)#define _TMR2_TMPRSCL2_FSET(Field, Val)		_FIELD_SET(_TMR2_TMPRSCL2_ADDR, _TMR2_TMPRSCL2_##Field##, Val)#define _TMR2_TMPRSCL2_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_TMR2_TMPRSCL2_ADDR, _TMR2_TMPRSCL2_##Field##, AND, OR, INV)#define _TMR2_TMPRSCL2_PRSCL_SHIFT		(0)#define _TMR2_TMPRSCL2_PRSCL_MK(n)		((Uint16)(n) & 0x03ffu) #define _TMR2_TMPRSCL2_PRSCL_MASK			(_TMR2_TMPRSCL2_PRSCL_MK(0x03ffu))#define _TMR2_TMPRSCL2_PRSCL_CLR			(~(_TMR2_TMPRSCL2_PRSCL_MASK))/*------------------------------------------------------------------------------** Register Macros for TMR2 TMDIV2 register :*                                                                                    *                                                                                    *                                                                                    *---------------------------------------------------------------------------------*/#define _TMR2_TMDIV2_GET()			_REG_GET(_TMR2_TMDIV2_ADDR)#define _TMR2_TMDIV2_SET(Val)			_REG_SET(_TMR2_TMDIV2_ADDR, Val)#define _TMR2_TMDIV2_AOI(AND,OR,INV)		_REG_AOI(_TMR2_TMDIV2_ADDR,AND,OR,INV)/*------------------------------------------------------------------------------** Register Macros for TMR2 TMTRG2 register :*                                                                                    *                                                                                    *                                                                                    *---------------------------------------------------------------------------------*/#define _TMR2_TMTRG2_GET()			_REG_GET(_TMR2_TMTRG2_ADDR)#define _TMR2_TMTRG2_SET(Val)			_REG_SET(_TMR2_TMTRG2_ADDR, Val)#define _TMR2_TMTRG2_AOI(AND,OR,INV)		_REG_AOI(_TMR2_TMTRG2_ADDR,AND,OR,INV)#define _TMR2_TMTRG2_FGET(Field)			_FIELD_GET(_TMR2_TMTRG2_ADDR, _TMR2_TMTRG2_##Field##)#define _TMR2_TMTRG2_FSET(Field, Val)		_FIELD_SET(_TMR2_TMTRG2_ADDR, _TMR2_TMTRG2_##Field##, Val)#define _TMR2_TMTRG2_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_TMR2_TMTRG2_ADDR, _TMR2_TMTRG2_##Field##, AND, OR, INV)#define _TMR2_TMTRG2_TRG_SHIFT		(0)#define _TMR2_TMTRG2_TRG_MK(n)		((Uint16)(n) & 0x0001u) #define _TMR2_TMTRG2_TRG_MASK			(_TMR2_TMTRG2_TRG_MK(0x0001u))#define _TMR2_TMTRG2_TRG_CLR			(~(_TMR2_TMTRG2_TRG_MASK))/*------------------------------------------------------------------------------** Register Macros for TMR2 TMCNT2 register :*                                                                                    *                                                                                    *                                                                                    *---------------------------------------------------------------------------------*/#define _TMR2_TMCNT2_GET()			_REG_GET(_TMR2_TMCNT2_ADDR)#define _TMR2_TMCNT2_SET(Val)			_REG_SET(_TMR2_TMCNT2_ADDR, Val)#define _TMR2_TMCNT2_AOI(AND,OR,INV)		_REG_AOI(_TMR2_TMCNT2_ADDR,AND,OR,INV)

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