csl_ccdchal_270.h

dm270 source code

/*------------------------------------------------------------------------------*
* Register Macros for CCDC OUTCLIP register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_OUTCLIP_GET()			_REG_GET(_CCDC_OUTCLIP_ADDR)
#define _CCDC_OUTCLIP_SET(Val)			_REG_SET(_CCDC_OUTCLIP_ADDR, Val)
#define _CCDC_OUTCLIP_AOI(AND,OR,INV)		_REG_AOI(_CCDC_OUTCLIP_ADDR,AND,OR,INV)
#define _CCDC_OUTCLIP_FGET(Field)			_FIELD_GET(_CCDC_OUTCLIP_ADDR, _CCDC_OUTCLIP_##Field##)
#define _CCDC_OUTCLIP_FSET(Field, Val)		_FIELD_SET(_CCDC_OUTCLIP_ADDR, _CCDC_OUTCLIP_##Field##, Val)
#define _CCDC_OUTCLIP_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CCDC_OUTCLIP_ADDR, _CCDC_OUTCLIP_##Field##, AND, OR, INV)

#define _CCDC_OUTCLIP_OCLIP_SHIFT		(0)
#define _CCDC_OUTCLIP_OCLIP_MK(n)		((Uint16)(n) & 0x3fffu) 
#define _CCDC_OUTCLIP_OCLIP_MASK			(_CCDC_OUTCLIP_OCLIP_MK(0x3fffu))
#define _CCDC_OUTCLIP_OCLIP_CLR			(~(_CCDC_OUTCLIP_OCLIP_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CCDC VDINT0 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_VDINT0_GET()			_REG_GET(_CCDC_VDINT0_ADDR)
#define _CCDC_VDINT0_SET(Val)			_REG_SET(_CCDC_VDINT0_ADDR, Val)
#define _CCDC_VDINT0_AOI(AND,OR,INV)		_REG_AOI(_CCDC_VDINT0_ADDR,AND,OR,INV)
#define _CCDC_VDINT0_FGET(Field)			_FIELD_GET(_CCDC_VDINT0_ADDR, _CCDC_VDINT0_##Field##)
#define _CCDC_VDINT0_FSET(Field, Val)		_FIELD_SET(_CCDC_VDINT0_ADDR, _CCDC_VDINT0_##Field##, Val)
#define _CCDC_VDINT0_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CCDC_VDINT0_ADDR, _CCDC_VDINT0_##Field##, AND, OR, INV)

#define _CCDC_VDINT0_VDINT0_SHIFT		(0)
#define _CCDC_VDINT0_VDINT0_MK(n)		((Uint16)(n) & 0x0fffu) 
#define _CCDC_VDINT0_VDINT0_MASK			(_CCDC_VDINT0_VDINT0_MK(0x0fffu))
#define _CCDC_VDINT0_VDINT0_CLR			(~(_CCDC_VDINT0_VDINT0_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CCDC VDINT1 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_VDINT1_GET()			_REG_GET(_CCDC_VDINT1_ADDR)
#define _CCDC_VDINT1_SET(Val)			_REG_SET(_CCDC_VDINT1_ADDR, Val)
#define _CCDC_VDINT1_AOI(AND,OR,INV)		_REG_AOI(_CCDC_VDINT1_ADDR,AND,OR,INV)
#define _CCDC_VDINT1_FGET(Field)			_FIELD_GET(_CCDC_VDINT1_ADDR, _CCDC_VDINT1_##Field##)
#define _CCDC_VDINT1_FSET(Field, Val)		_FIELD_SET(_CCDC_VDINT1_ADDR, _CCDC_VDINT1_##Field##, Val)
#define _CCDC_VDINT1_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CCDC_VDINT1_ADDR, _CCDC_VDINT1_##Field##, AND, OR, INV)

#define _CCDC_VDINT1_VDINT1_SHIFT		(0)
#define _CCDC_VDINT1_VDINT1_MK(n)		((Uint16)(n) & 0x0fffu) 
#define _CCDC_VDINT1_VDINT1_MASK			(_CCDC_VDINT1_VDINT1_MK(0x0fffu))
#define _CCDC_VDINT1_VDINT1_CLR			(~(_CCDC_VDINT1_VDINT1_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CCDC SHUT register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_SHUT_GET()			_REG_GET(_CCDC_SHUT_ADDR)
#define _CCDC_SHUT_SET(Val)			_REG_SET(_CCDC_SHUT_ADDR, Val)
#define _CCDC_SHUT_AOI(AND,OR,INV)		_REG_AOI(_CCDC_SHUT_ADDR,AND,OR,INV)
#define _CCDC_SHUT_FGET(Field)			_FIELD_GET(_CCDC_SHUT_ADDR, _CCDC_SHUT_##Field##)
#define _CCDC_SHUT_FSET(Field, Val)		_FIELD_SET(_CCDC_SHUT_ADDR, _CCDC_SHUT_##Field##, Val)
#define _CCDC_SHUT_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CCDC_SHUT_ADDR, _CCDC_SHUT_##Field##, AND, OR, INV)

#define _CCDC_SHUT_CCDSHUT_SHIFT		(0)
#define _CCDC_SHUT_CCDSHUT_MK(n)		((Uint16)(n) & 0x0001u) 
#define _CCDC_SHUT_CCDSHUT_MASK			(_CCDC_SHUT_CCDSHUT_MK(0x0001u))
#define _CCDC_SHUT_CCDSHUT_CLR			(~(_CCDC_SHUT_CCDSHUT_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CCDC GAMMA register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_GAMMA_GET()			_REG_GET(_CCDC_GAMMA_ADDR)
#define _CCDC_GAMMA_SET(Val)			_REG_SET(_CCDC_GAMMA_ADDR, Val)
#define _CCDC_GAMMA_AOI(AND,OR,INV)		_REG_AOI(_CCDC_GAMMA_ADDR,AND,OR,INV)
#define _CCDC_GAMMA_FGET(Field)			_FIELD_GET(_CCDC_GAMMA_ADDR, _CCDC_GAMMA_##Field##)
#define _CCDC_GAMMA_FSET(Field, Val)		_FIELD_SET(_CCDC_GAMMA_ADDR, _CCDC_GAMMA_##Field##, Val)
#define _CCDC_GAMMA_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CCDC_GAMMA_ADDR, _CCDC_GAMMA_##Field##, AND, OR, INV)

#define _CCDC_GAMMA_GWDI_SHIFT		(2)
#define _CCDC_GAMMA_GWDI_MK(n)		(((Uint16)(n) & 0x0007u) << _CCDC_GAMMA_GWDI_SHIFT)
#define _CCDC_GAMMA_GWDI_MASK			(_CCDC_GAMMA_GWDI_MK(0x0007u))
#define _CCDC_GAMMA_GWDI_CLR			(~(_CCDC_GAMMA_GWDI_MASK))

#define _CCDC_GAMMA_H3ATBL_SHIFT		(1)
#define _CCDC_GAMMA_H3ATBL_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_GAMMA_H3ATBL_SHIFT)
#define _CCDC_GAMMA_H3ATBL_MASK			(_CCDC_GAMMA_H3ATBL_MK(0x0001u))
#define _CCDC_GAMMA_H3ATBL_CLR			(~(_CCDC_GAMMA_H3ATBL_MASK))

#define _CCDC_GAMMA_CCDTBL_SHIFT		(0)
#define _CCDC_GAMMA_CCDTBL_MK(n)		((Uint16)(n) & 0x0001u) 
#define _CCDC_GAMMA_CCDTBL_MASK			(_CCDC_GAMMA_CCDTBL_MK(0x0001u))
#define _CCDC_GAMMA_CCDTBL_CLR			(~(_CCDC_GAMMA_CCDTBL_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CCDC REC656IF register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_REC656IF_GET()			_REG_GET(_CCDC_REC656IF_ADDR)
#define _CCDC_REC656IF_SET(Val)			_REG_SET(_CCDC_REC656IF_ADDR, Val)
#define _CCDC_REC656IF_AOI(AND,OR,INV)		_REG_AOI(_CCDC_REC656IF_ADDR,AND,OR,INV)
#define _CCDC_REC656IF_FGET(Field)			_FIELD_GET(_CCDC_REC656IF_ADDR, _CCDC_REC656IF_##Field##)
#define _CCDC_REC656IF_FSET(Field, Val)		_FIELD_SET(_CCDC_REC656IF_ADDR, _CCDC_REC656IF_##Field##, Val)
#define _CCDC_REC656IF_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CCDC_REC656IF_ADDR, _CCDC_REC656IF_##Field##, AND, OR, INV)

#define _CCDC_REC656IF_ECCFVH_SHIFT		(1)
#define _CCDC_REC656IF_ECCFVH_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_REC656IF_ECCFVH_SHIFT)
#define _CCDC_REC656IF_ECCFVH_MASK			(_CCDC_REC656IF_ECCFVH_MK(0x0001u))
#define _CCDC_REC656IF_ECCFVH_CLR			(~(_CCDC_REC656IF_ECCFVH_MASK))

#define _CCDC_REC656IF_R656ON_SHIFT		(0)
#define _CCDC_REC656IF_R656ON_MK(n)		((Uint16)(n) & 0x0001u) 
#define _CCDC_REC656IF_R656ON_MASK			(_CCDC_REC656IF_R656ON_MK(0x0001u))
#define _CCDC_REC656IF_R656ON_CLR			(~(_CCDC_REC656IF_R656ON_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CCDC CCDCFG register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_CCDCFG_GET()			_REG_GET(_CCDC_CCDCFG_ADDR)
#define _CCDC_CCDCFG_SET(Val)			_REG_SET(_CCDC_CCDCFG_ADDR, Val)
#define _CCDC_CCDCFG_AOI(AND,OR,INV)		_REG_AOI(_CCDC_CCDCFG_ADDR,AND,OR,INV)
#define _CCDC_CCDCFG_FGET(Field)			_FIELD_GET(_CCDC_CCDCFG_ADDR, _CCDC_CCDCFG_##Field##)
#define _CCDC_CCDCFG_FSET(Field, Val)		_FIELD_SET(_CCDC_CCDCFG_ADDR, _CCDC_CCDCFG_##Field##, Val)
#define _CCDC_CCDCFG_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CCDC_CCDCFG_ADDR, _CCDC_CCDCFG_##Field##, AND, OR, INV)

#define _CCDC_CCDCFG_VDLC_SHIFT		(15)
#define _CCDC_CCDCFG_VDLC_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_CCDCFG_VDLC_SHIFT)
#define _CCDC_CCDCFG_VDLC_MASK			(_CCDC_CCDCFG_VDLC_MK(0x0001u))
#define _CCDC_CCDCFG_VDLC_CLR			(~(_CCDC_CCDCFG_VDLC_MASK))

#define _CCDC_CCDCFG_MSBINVO_SHIFT		(14)
#define _CCDC_CCDCFG_MSBINVO_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_CCDCFG_MSBINVO_SHIFT)
#define _CCDC_CCDCFG_MSBINVO_MASK			(_CCDC_CCDCFG_MSBINVO_MK(0x0001u))
#define _CCDC_CCDCFG_MSBINVO_CLR			(~(_CCDC_CCDCFG_MSBINVO_MASK))

#define _CCDC_CCDCFG_MSBINVI_SHIFT		(13)
#define _CCDC_CCDCFG_MSBINVI_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_CCDCFG_MSBINVI_SHIFT)
#define _CCDC_CCDCFG_MSBINVI_MASK			(_CCDC_CCDCFG_MSBINVI_MK(0x0001u))
#define _CCDC_CCDCFG_MSBINVI_CLR			(~(_CCDC_CCDCFG_MSBINVI_MASK))

#define _CCDC_CCDCFG_BSWD_SHIFT		(12)
#define _CCDC_CCDCFG_BSWD_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_CCDCFG_BSWD_SHIFT)
#define _CCDC_CCDCFG_BSWD_MASK			(_CCDC_CCDCFG_BSWD_MK(0x0001u))
#define _CCDC_CCDCFG_BSWD_CLR			(~(_CCDC_CCDCFG_BSWD_MASK))

#define _CCDC_CCDCFG_Y8POS_SHIFT		(11)
#define _CCDC_CCDCFG_Y8POS_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_CCDCFG_Y8POS_SHIFT)
#define _CCDC_CCDCFG_Y8POS_MASK			(_CCDC_CCDCFG_Y8POS_MK(0x0001u))
#define _CCDC_CCDCFG_Y8POS_CLR			(~(_CCDC_CCDCFG_Y8POS_MASK))

#define _CCDC_CCDCFG_EXTRG_SHIFT		(10)
#define _CCDC_CCDCFG_EXTRG_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_CCDCFG_EXTRG_SHIFT)
#define _CCDC_CCDCFG_EXTRG_MASK			(_CCDC_CCDCFG_EXTRG_MK(0x0001u))
#define _CCDC_CCDCFG_EXTRG_CLR			(~(_CCDC_CCDCFG_EXTRG_MASK))

#define _CCDC_CCDCFG_TRGSEL_SHIFT		(9)
#define _CCDC_CCDCFG_TRGSEL_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_CCDCFG_TRGSEL_SHIFT)
#define _CCDC_CCDCFG_TRGSEL_MASK			(_CCDC_CCDCFG_TRGSEL_MK(0x0001u))
#define _CCDC_CCDCFG_TRGSEL_CLR			(~(_CCDC_CCDCFG_TRGSEL_MASK))

#define _CCDC_CCDCFG_WENLOG_SHIFT		(8)
#define _CCDC_CCDCFG_WENLOG_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_CCDCFG_WENLOG_SHIFT)
#define _CCDC_CCDCFG_WENLOG_MASK			(_CCDC_CCDCFG_WENLOG_MK(0x0001u))
#define _CCDC_CCDCFG_WENLOG_CLR			(~(_CCDC_CCDCFG_WENLOG_MASK))

#define _CCDC_CCDCFG_FIDMD_SHIFT		(6)
#define _CCDC_CCDCFG_FIDMD_MK(n)		(((Uint16)(n) & 0x0003u) << _CCDC_CCDCFG_FIDMD_SHIFT)
#define _CCDC_CCDCFG_FIDMD_MASK			(_CCDC_CCDCFG_FIDMD_MK(0x0003u))
#define _CCDC_CCDCFG_FIDMD_CLR			(~(_CCDC_CCDCFG_FIDMD_MASK))

#define _CCDC_CCDCFG_BW656_SHIFT		(5)
#define _CCDC_CCDCFG_BW656_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_CCDCFG_BW656_SHIFT)
#define _CCDC_CCDCFG_BW656_MASK			(_CCDC_CCDCFG_BW656_MK(0x0001u))
#define _CCDC_CCDCFG_BW656_CLR			(~(_CCDC_CCDCFG_BW656_MASK))

#define _CCDC_CCDCFG_YCINSWP_SHIFT		(4)
#define _CCDC_CCDCFG_YCINSWP_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_CCDCFG_YCINSWP_SHIFT)
#define _CCDC_CCDCFG_YCINSWP_MASK			(_CCDC_CCDCFG_YCINSWP_MK(0x0001u))
#define _CCDC_CCDCFG_YCINSWP_CLR			(~(_CCDC_CCDCFG_YCINSWP_MASK))

#define _CCDC_CCDCFG_INPTRU_SHIFT		(3)
#define _CCDC_CCDCFG_INPTRU_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_CCDCFG_INPTRU_SHIFT)
#define _CCDC_CCDCFG_INPTRU_MASK			(_CCDC_CCDCFG_INPTRU_MK(0x0001u))
#define _CCDC_CCDCFG_INPTRU_CLR			(~(_CCDC_CCDCFG_INPTRU_MASK))

#define _CCDC_CCDCFG_YCPUTSWP_SHIFT		(2)
#define _CCDC_CCDCFG_YCPUTSWP_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_CCDCFG_YCPUTSWP_SHIFT)
#define _CCDC_CCDCFG_YCPUTSWP_MASK			(_CCDC_CCDCFG_YCPUTSWP_MK(0x0001u))
#define _CCDC_CCDCFG_YCPUTSWP_CLR			(~(_CCDC_CCDCFG_YCPUTSWP_MASK))

#define _CCDC_CCDCFG_IDS_SHIFT		(1)
#define _CCDC_CCDCFG_IDS_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_CCDCFG_IDS_SHIFT)
#define _CCDC_CCDCFG_IDS_MASK			(_CCDC_CCDCFG_IDS_MK(0x0001u))
#define _CCDC_CCDCFG_IDS_CLR			(~(_CCDC_CCDCFG_IDS_MASK))

#define _CCDC_CCDCFG_YCIO_SHIFT		(0)
#define _CCDC_CCDCFG_YCIO_MK(n)		((Uint16)(n) & 0x0001u) 
#define _CCDC_CCDCFG_YCIO_MASK			(_CCDC_CCDCFG_YCIO_MK(0x0001u))
#define _CCDC_CCDCFG_YCIO_CLR			(~(_CCDC_CCDCFG_YCIO_MASK))