csl_ccdchal_270.h

dm270 source code

/*   
 *  Copyright 2001 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 */
/******************************************************************************\
*           Copyright (C) 2001 Texas Instruments Incorporated.
*                           All Rights Reserved
*------------------------------------------------------------------------------
* MODULE.NAME... CCDC - HAL configuration module
* FILENAME...... /vobs/DSC_RTOS/arm/project/dm270/include/csl/csl_ccdchal_270.h
* PROJECT....... ARM Chip Support Library
* COMPONENT..... HAL
* IMPORTS....... 
*------------------------------------------------------------------------------
* HISTORY:
*   CREATED:       12/06/2001 
*------------------------------------------------------------------------------
* DESCRIPTION:  (CHIP memory mapped register definitions)
*
*
*
\******************************************************************************/



/*-----------------------------------------------------------------------------------*
* Register Macros for CCDC:
*------------------------------------------------------------------------------------*/


/*------------------------------------------------------------------------------*
* Register Macros for CCDC SYNCEN register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_SYNCEN_GET()			_REG_GET(_CCDC_SYNCEN_ADDR)
#define _CCDC_SYNCEN_SET(Val)			_REG_SET(_CCDC_SYNCEN_ADDR, Val)
#define _CCDC_SYNCEN_AOI(AND,OR,INV)		_REG_AOI(_CCDC_SYNCEN_ADDR,AND,OR,INV)
#define _CCDC_SYNCEN_FGET(Field)			_FIELD_GET(_CCDC_SYNCEN_ADDR, _CCDC_SYNCEN_##Field##)
#define _CCDC_SYNCEN_FSET(Field, Val)		_FIELD_SET(_CCDC_SYNCEN_ADDR, _CCDC_SYNCEN_##Field##, Val)
#define _CCDC_SYNCEN_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CCDC_SYNCEN_ADDR, _CCDC_SYNCEN_##Field##, AND, OR, INV)

#define _CCDC_SYNCEN_WEN_SHIFT		(1)
#define _CCDC_SYNCEN_WEN_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_SYNCEN_WEN_SHIFT)
#define _CCDC_SYNCEN_WEN_MASK			(_CCDC_SYNCEN_WEN_MK(0x0001u))
#define _CCDC_SYNCEN_WEN_CLR			(~(_CCDC_SYNCEN_WEN_MASK))

#define _CCDC_SYNCEN_VDHDEN_SHIFT		(0)
#define _CCDC_SYNCEN_VDHDEN_MK(n)		((Uint16)(n) & 0x0001u) 
#define _CCDC_SYNCEN_VDHDEN_MASK			(_CCDC_SYNCEN_VDHDEN_MK(0x0001u))
#define _CCDC_SYNCEN_VDHDEN_CLR			(~(_CCDC_SYNCEN_VDHDEN_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CCDC MODESET register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_MODESET_GET()			_REG_GET(_CCDC_MODESET_ADDR)
#define _CCDC_MODESET_SET(Val)			_REG_SET(_CCDC_MODESET_ADDR, Val)
#define _CCDC_MODESET_AOI(AND,OR,INV)		_REG_AOI(_CCDC_MODESET_ADDR,AND,OR,INV)
#define _CCDC_MODESET_FGET(Field)			_FIELD_GET(_CCDC_MODESET_ADDR, _CCDC_MODESET_##Field##)
#define _CCDC_MODESET_FSET(Field, Val)		_FIELD_SET(_CCDC_MODESET_ADDR, _CCDC_MODESET_##Field##, Val)
#define _CCDC_MODESET_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CCDC_MODESET_ADDR, _CCDC_MODESET_##Field##, AND, OR, INV)

#define _CCDC_MODESET_FLDSTAT_SHIFT		(15)
#define _CCDC_MODESET_FLDSTAT_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_MODESET_FLDSTAT_SHIFT)
#define _CCDC_MODESET_FLDSTAT_MASK			(_CCDC_MODESET_FLDSTAT_MK(0x0001u))
#define _CCDC_MODESET_FLDSTAT_CLR			(~(_CCDC_MODESET_FLDSTAT_MASK))

#define _CCDC_MODESET_LPF_SHIFT		(14)
#define _CCDC_MODESET_LPF_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_MODESET_LPF_SHIFT)
#define _CCDC_MODESET_LPF_MASK			(_CCDC_MODESET_LPF_MK(0x0001u))
#define _CCDC_MODESET_LPF_CLR			(~(_CCDC_MODESET_LPF_MASK))

#define _CCDC_MODESET_IMPMOD_SHIFT		(12)
#define _CCDC_MODESET_IMPMOD_MK(n)		(((Uint16)(n) & 0x0003u) << _CCDC_MODESET_IMPMOD_SHIFT)
#define _CCDC_MODESET_IMPMOD_MASK			(_CCDC_MODESET_IMPMOD_MK(0x0003u))
#define _CCDC_MODESET_IMPMOD_CLR			(~(_CCDC_MODESET_IMPMOD_MASK))

#define _CCDC_MODESET_PACK8_SHIFT		(11)
#define _CCDC_MODESET_PACK8_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_MODESET_PACK8_SHIFT)
#define _CCDC_MODESET_PACK8_MASK			(_CCDC_MODESET_PACK8_MK(0x0001u))
#define _CCDC_MODESET_PACK8_CLR			(~(_CCDC_MODESET_PACK8_MASK))

#define _CCDC_MODESET_DATSIZ_SHIFT		(8)
#define _CCDC_MODESET_DATSIZ_MK(n)		(((Uint16)(n) & 0x0007u) << _CCDC_MODESET_DATSIZ_SHIFT)
#define _CCDC_MODESET_DATSIZ_MASK			(_CCDC_MODESET_DATSIZ_MK(0x0007u))
#define _CCDC_MODESET_DATSIZ_CLR			(~(_CCDC_MODESET_DATSIZ_MASK))

#define _CCDC_MODESET_FLDMODE_SHIFT		(7)
#define _CCDC_MODESET_FLDMODE_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_MODESET_FLDMODE_SHIFT)
#define _CCDC_MODESET_FLDMODE_MASK			(_CCDC_MODESET_FLDMODE_MK(0x0001u))
#define _CCDC_MODESET_FLDMODE_CLR			(~(_CCDC_MODESET_FLDMODE_MASK))

#define _CCDC_MODESET_DATAPOL_SHIFT		(6)
#define _CCDC_MODESET_DATAPOL_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_MODESET_DATAPOL_SHIFT)
#define _CCDC_MODESET_DATAPOL_MASK			(_CCDC_MODESET_DATAPOL_MK(0x0001u))
#define _CCDC_MODESET_DATAPOL_CLR			(~(_CCDC_MODESET_DATAPOL_MASK))

#define _CCDC_MODESET_EXWEN_SHIFT		(5)
#define _CCDC_MODESET_EXWEN_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_MODESET_EXWEN_SHIFT)
#define _CCDC_MODESET_EXWEN_MASK			(_CCDC_MODESET_EXWEN_MK(0x0001u))
#define _CCDC_MODESET_EXWEN_CLR			(~(_CCDC_MODESET_EXWEN_MASK))

#define _CCDC_MODESET_FLDPOL_SHIFT		(4)
#define _CCDC_MODESET_FLDPOL_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_MODESET_FLDPOL_SHIFT)
#define _CCDC_MODESET_FLDPOL_MASK			(_CCDC_MODESET_FLDPOL_MK(0x0001u))
#define _CCDC_MODESET_FLDPOL_CLR			(~(_CCDC_MODESET_FLDPOL_MASK))

#define _CCDC_MODESET_HDPOL_SHIFT		(3)
#define _CCDC_MODESET_HDPOL_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_MODESET_HDPOL_SHIFT)
#define _CCDC_MODESET_HDPOL_MASK			(_CCDC_MODESET_HDPOL_MK(0x0001u))
#define _CCDC_MODESET_HDPOL_CLR			(~(_CCDC_MODESET_HDPOL_MASK))

#define _CCDC_MODESET_VDPOL_SHIFT		(2)
#define _CCDC_MODESET_VDPOL_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_MODESET_VDPOL_SHIFT)
#define _CCDC_MODESET_VDPOL_MASK			(_CCDC_MODESET_VDPOL_MK(0x0001u))
#define _CCDC_MODESET_VDPOL_CLR			(~(_CCDC_MODESET_VDPOL_MASK))

#define _CCDC_MODESET_FLDOUT_SHIFT		(1)
#define _CCDC_MODESET_FLDOUT_MK(n)		(((Uint16)(n) & 0x0001u) << _CCDC_MODESET_FLDOUT_SHIFT)
#define _CCDC_MODESET_FLDOUT_MASK			(_CCDC_MODESET_FLDOUT_MK(0x0001u))
#define _CCDC_MODESET_FLDOUT_CLR			(~(_CCDC_MODESET_FLDOUT_MASK))

#define _CCDC_MODESET_VDHDOUT_SHIFT		(0)
#define _CCDC_MODESET_VDHDOUT_MK(n)		((Uint16)(n) & 0x0001u) 
#define _CCDC_MODESET_VDHDOUT_MASK			(_CCDC_MODESET_VDHDOUT_MK(0x0001u))
#define _CCDC_MODESET_VDHDOUT_CLR			(~(_CCDC_MODESET_VDHDOUT_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CCDC HDWIDTH register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_HDWIDTH_GET()			_REG_GET(_CCDC_HDWIDTH_ADDR)
#define _CCDC_HDWIDTH_SET(Val)			_REG_SET(_CCDC_HDWIDTH_ADDR, Val)
#define _CCDC_HDWIDTH_AOI(AND,OR,INV)		_REG_AOI(_CCDC_HDWIDTH_ADDR,AND,OR,INV)
#define _CCDC_HDWIDTH_FGET(Field)			_FIELD_GET(_CCDC_HDWIDTH_ADDR, _CCDC_HDWIDTH_##Field##)
#define _CCDC_HDWIDTH_FSET(Field, Val)		_FIELD_SET(_CCDC_HDWIDTH_ADDR, _CCDC_HDWIDTH_##Field##, Val)
#define _CCDC_HDWIDTH_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CCDC_HDWIDTH_ADDR, _CCDC_HDWIDTH_##Field##, AND, OR, INV)

#define _CCDC_HDWIDTH_HDW_SHIFT		(0)
#define _CCDC_HDWIDTH_HDW_MK(n)		((Uint16)(n) & 0x0fffu) 
#define _CCDC_HDWIDTH_HDW_MASK			(_CCDC_HDWIDTH_HDW_MK(0x0fffu))
#define _CCDC_HDWIDTH_HDW_CLR			(~(_CCDC_HDWIDTH_HDW_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CCDC VDWIDTH register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_VDWIDTH_GET()			_REG_GET(_CCDC_VDWIDTH_ADDR)
#define _CCDC_VDWIDTH_SET(Val)			_REG_SET(_CCDC_VDWIDTH_ADDR, Val)
#define _CCDC_VDWIDTH_AOI(AND,OR,INV)		_REG_AOI(_CCDC_VDWIDTH_ADDR,AND,OR,INV)
#define _CCDC_VDWIDTH_FGET(Field)			_FIELD_GET(_CCDC_VDWIDTH_ADDR, _CCDC_VDWIDTH_##Field##)
#define _CCDC_VDWIDTH_FSET(Field, Val)		_FIELD_SET(_CCDC_VDWIDTH_ADDR, _CCDC_VDWIDTH_##Field##, Val)
#define _CCDC_VDWIDTH_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CCDC_VDWIDTH_ADDR, _CCDC_VDWIDTH_##Field##, AND, OR, INV)

#define _CCDC_VDWIDTH_VDW_SHIFT		(0)
#define _CCDC_VDWIDTH_VDW_MK(n)		((Uint16)(n) & 0x0fffu) 
#define _CCDC_VDWIDTH_VDW_MASK			(_CCDC_VDWIDTH_VDW_MK(0x0fffu))
#define _CCDC_VDWIDTH_VDW_CLR			(~(_CCDC_VDWIDTH_VDW_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CCDC PPLN register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_PPLN_GET()			_REG_GET(_CCDC_PPLN_ADDR)
#define _CCDC_PPLN_SET(Val)			_REG_SET(_CCDC_PPLN_ADDR, Val)
#define _CCDC_PPLN_AOI(AND,OR,INV)		_REG_AOI(_CCDC_PPLN_ADDR,AND,OR,INV)



/*------------------------------------------------------------------------------*
* Register Macros for CCDC LPFR register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_LPFR_GET()			_REG_GET(_CCDC_LPFR_ADDR)
#define _CCDC_LPFR_SET(Val)			_REG_SET(_CCDC_LPFR_ADDR, Val)
#define _CCDC_LPFR_AOI(AND,OR,INV)		_REG_AOI(_CCDC_LPFR_ADDR,AND,OR,INV)



/*------------------------------------------------------------------------------*
* Register Macros for CCDC SPH register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_SPH_GET()			_REG_GET(_CCDC_SPH_ADDR)
#define _CCDC_SPH_SET(Val)			_REG_SET(_CCDC_SPH_ADDR, Val)
#define _CCDC_SPH_AOI(AND,OR,INV)		_REG_AOI(_CCDC_SPH_ADDR,AND,OR,INV)
#define _CCDC_SPH_FGET(Field)			_FIELD_GET(_CCDC_SPH_ADDR, _CCDC_SPH_##Field##)
#define _CCDC_SPH_FSET(Field, Val)		_FIELD_SET(_CCDC_SPH_ADDR, _CCDC_SPH_##Field##, Val)
#define _CCDC_SPH_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CCDC_SPH_ADDR, _CCDC_SPH_##Field##, AND, OR, INV)

#define _CCDC_SPH_SPH_SHIFT		(0)
#define _CCDC_SPH_SPH_MK(n)		((Uint16)(n) & 0x0fffu) 
#define _CCDC_SPH_SPH_MASK			(_CCDC_SPH_SPH_MK(0x0fffu))
#define _CCDC_SPH_SPH_CLR			(~(_CCDC_SPH_SPH_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CCDC NPH register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CCDC_NPH_GET()			_REG_GET(_CCDC_NPH_ADDR)
#define _CCDC_NPH_SET(Val)			_REG_SET(_CCDC_NPH_ADDR, Val)