csl_mmcsdhal_270.h

dm270 source code

#define _MMCSD_DMATRG_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_MMCSD_DMATRG_ADDR, _MMCSD_DMATRG_##Field##, AND, OR, INV)

#define _MMCSD_DMATRG_BRK_SHIFT		(1)
#define _MMCSD_DMATRG_BRK_MK(n)		(((Uint16)(n) & 0x0001u) << _MMCSD_DMATRG_BRK_SHIFT)
#define _MMCSD_DMATRG_BRK_MASK			(_MMCSD_DMATRG_BRK_MK(0x0001u))
#define _MMCSD_DMATRG_BRK_CLR			(~(_MMCSD_DMATRG_BRK_MASK))

#define _MMCSD_DMATRG_TRG_SHIFT		(0)
#define _MMCSD_DMATRG_TRG_MK(n)		((Uint16)(n) & 0x0001u) 
#define _MMCSD_DMATRG_TRG_MASK			(_MMCSD_DMATRG_TRG_MK(0x0001u))
#define _MMCSD_DMATRG_TRG_CLR			(~(_MMCSD_DMATRG_TRG_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for MMCSD DMAMODE register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _MMCSD_DMAMODE_GET()			_REG_GET(_MMCSD_DMAMODE_ADDR)
#define _MMCSD_DMAMODE_SET(Val)			_REG_SET(_MMCSD_DMAMODE_ADDR, Val)
#define _MMCSD_DMAMODE_AOI(AND,OR,INV)		_REG_AOI(_MMCSD_DMAMODE_ADDR,AND,OR,INV)
#define _MMCSD_DMAMODE_FGET(Field)			_FIELD_GET(_MMCSD_DMAMODE_ADDR, _MMCSD_DMAMODE_##Field##)
#define _MMCSD_DMAMODE_FSET(Field, Val)		_FIELD_SET(_MMCSD_DMAMODE_ADDR, _MMCSD_DMAMODE_##Field##, Val)
#define _MMCSD_DMAMODE_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_MMCSD_DMAMODE_ADDR, _MMCSD_DMAMODE_##Field##, AND, OR, INV)

#define _MMCSD_DMAMODE_DTOIE_SHIFT		(14)
#define _MMCSD_DMAMODE_DTOIE_MK(n)		(((Uint16)(n) & 0x0001u) << _MMCSD_DMAMODE_DTOIE_SHIFT)
#define _MMCSD_DMAMODE_DTOIE_MASK			(_MMCSD_DMAMODE_DTOIE_MK(0x0001u))
#define _MMCSD_DMAMODE_DTOIE_CLR			(~(_MMCSD_DMAMODE_DTOIE_MASK))

#define _MMCSD_DMAMODE_DMAE_SHIFT		(13)
#define _MMCSD_DMAMODE_DMAE_MK(n)		(((Uint16)(n) & 0x0001u) << _MMCSD_DMAMODE_DMAE_SHIFT)
#define _MMCSD_DMAMODE_DMAE_MASK			(_MMCSD_DMAMODE_DMAE_MK(0x0001u))
#define _MMCSD_DMAMODE_DMAE_CLR			(~(_MMCSD_DMAMODE_DMAE_MASK))

#define _MMCSD_DMAMODE_DIR_SHIFT		(12)
#define _MMCSD_DMAMODE_DIR_MK(n)		(((Uint16)(n) & 0x0001u) << _MMCSD_DMAMODE_DIR_SHIFT)
#define _MMCSD_DMAMODE_DIR_MASK			(_MMCSD_DMAMODE_DIR_MK(0x0001u))
#define _MMCSD_DMAMODE_DIR_CLR			(~(_MMCSD_DMAMODE_DIR_MASK))

#define _MMCSD_DMAMODE_DPRMDX_SHIFT		(11)
#define _MMCSD_DMAMODE_DPRMDX_MK(n)		(((Uint16)(n) & 0x0001u) << _MMCSD_DMAMODE_DPRMDX_SHIFT)
#define _MMCSD_DMAMODE_DPRMDX_MASK			(_MMCSD_DMAMODE_DPRMDX_MK(0x0001u))
#define _MMCSD_DMAMODE_DPRMDX_CLR			(~(_MMCSD_DMAMODE_DPRMDX_MASK))

#define _MMCSD_DMAMODE_DPRMDR_SHIFT		(10)
#define _MMCSD_DMAMODE_DPRMDR_MK(n)		(((Uint16)(n) & 0x0001u) << _MMCSD_DMAMODE_DPRMDR_SHIFT)
#define _MMCSD_DMAMODE_DPRMDR_MASK			(_MMCSD_DMAMODE_DPRMDR_MK(0x0001u))
#define _MMCSD_DMAMODE_DPRMDR_CLR			(~(_MMCSD_DMAMODE_DPRMDR_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for MMCSD DMAAD0 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _MMCSD_DMAAD0_GET()			_REG_GET(_MMCSD_DMAAD0_ADDR)
#define _MMCSD_DMAAD0_SET(Val)			_REG_SET(_MMCSD_DMAAD0_ADDR, Val)
#define _MMCSD_DMAAD0_AOI(AND,OR,INV)		_REG_AOI(_MMCSD_DMAAD0_ADDR,AND,OR,INV)



/*------------------------------------------------------------------------------*
* Register Macros for MMCSD DMAAD1 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _MMCSD_DMAAD1_GET()			_REG_GET(_MMCSD_DMAAD1_ADDR)
#define _MMCSD_DMAAD1_SET(Val)			_REG_SET(_MMCSD_DMAAD1_ADDR, Val)
#define _MMCSD_DMAAD1_AOI(AND,OR,INV)		_REG_AOI(_MMCSD_DMAAD1_ADDR,AND,OR,INV)
#define _MMCSD_DMAAD1_FGET(Field)			_FIELD_GET(_MMCSD_DMAAD1_ADDR, _MMCSD_DMAAD1_##Field##)
#define _MMCSD_DMAAD1_FSET(Field, Val)		_FIELD_SET(_MMCSD_DMAAD1_ADDR, _MMCSD_DMAAD1_##Field##, Val)
#define _MMCSD_DMAAD1_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_MMCSD_DMAAD1_ADDR, _MMCSD_DMAAD1_##Field##, AND, OR, INV)

#define _MMCSD_DMAAD1_ADRH_SHIFT		(0)
#define _MMCSD_DMAAD1_ADRH_MK(n)		((Uint16)(n) & 0x07ffu) 
#define _MMCSD_DMAAD1_ADRH_MASK			(_MMCSD_DMAAD1_ADRH_MK(0x07ffu))
#define _MMCSD_DMAAD1_ADRH_CLR			(~(_MMCSD_DMAAD1_ADRH_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for MMCSD DMASTAT0 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _MMCSD_DMASTAT0_GET()			_REG_GET(_MMCSD_DMASTAT0_ADDR)
#define _MMCSD_DMASTAT0_SET(Val)			_REG_SET(_MMCSD_DMASTAT0_ADDR, Val)
#define _MMCSD_DMASTAT0_AOI(AND,OR,INV)		_REG_AOI(_MMCSD_DMASTAT0_ADDR,AND,OR,INV)



/*------------------------------------------------------------------------------*
* Register Macros for MMCSD DMASTAT1 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _MMCSD_DMASTAT1_GET()			_REG_GET(_MMCSD_DMASTAT1_ADDR)
#define _MMCSD_DMASTAT1_SET(Val)			_REG_SET(_MMCSD_DMASTAT1_ADDR, Val)
#define _MMCSD_DMASTAT1_AOI(AND,OR,INV)		_REG_AOI(_MMCSD_DMASTAT1_ADDR,AND,OR,INV)
#define _MMCSD_DMASTAT1_FGET(Field)			_FIELD_GET(_MMCSD_DMASTAT1_ADDR, _MMCSD_DMASTAT1_##Field##)
#define _MMCSD_DMASTAT1_FSET(Field, Val)		_FIELD_SET(_MMCSD_DMASTAT1_ADDR, _MMCSD_DMASTAT1_##Field##, Val)
#define _MMCSD_DMASTAT1_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_MMCSD_DMASTAT1_ADDR, _MMCSD_DMASTAT1_##Field##, AND, OR, INV)

#define _MMCSD_DMASTAT1_TOUTDT_SHIFT		(13)
#define _MMCSD_DMASTAT1_TOUTDT_MK(n)		(((Uint16)(n) & 0x0001u) << _MMCSD_DMASTAT1_TOUTDT_SHIFT)
#define _MMCSD_DMASTAT1_TOUTDT_MASK			(_MMCSD_DMASTAT1_TOUTDT_MK(0x0001u))
#define _MMCSD_DMASTAT1_TOUTDT_CLR			(~(_MMCSD_DMASTAT1_TOUTDT_MASK))

#define _MMCSD_DMASTAT1_RUNST_SHIFT		(12)
#define _MMCSD_DMASTAT1_RUNST_MK(n)		(((Uint16)(n) & 0x0001u) << _MMCSD_DMASTAT1_RUNST_SHIFT)
#define _MMCSD_DMASTAT1_RUNST_MASK			(_MMCSD_DMASTAT1_RUNST_MK(0x0001u))
#define _MMCSD_DMASTAT1_RUNST_CLR			(~(_MMCSD_DMASTAT1_RUNST_MASK))

#define _MMCSD_DMASTAT1_REMH_SHIFT		(0)
#define _MMCSD_DMASTAT1_REMH_MK(n)		((Uint16)(n) & 0x0fffu) 
#define _MMCSD_DMASTAT1_REMH_MASK			(_MMCSD_DMASTAT1_REMH_MK(0x0fffu))
#define _MMCSD_DMASTAT1_REMH_CLR			(~(_MMCSD_DMASTAT1_REMH_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for MMCSD DMATOR register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _MMCSD_DMATOR_GET()			_REG_GET(_MMCSD_DMATOR_ADDR)
#define _MMCSD_DMATOR_SET(Val)			_REG_SET(_MMCSD_DMATOR_ADDR, Val)
#define _MMCSD_DMATOR_AOI(AND,OR,INV)		_REG_AOI(_MMCSD_DMATOR_ADDR,AND,OR,INV)



/*------------------------------------------------------------------------------*
* Register Macros for MMCSD SDIOCTL register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _MMCSD_SDIOCTL_GET()			_REG_GET(_MMCSD_SDIOCTL_ADDR)
#define _MMCSD_SDIOCTL_SET(Val)			_REG_SET(_MMCSD_SDIOCTL_ADDR, Val)
#define _MMCSD_SDIOCTL_AOI(AND,OR,INV)		_REG_AOI(_MMCSD_SDIOCTL_ADDR,AND,OR,INV)
#define _MMCSD_SDIOCTL_FGET(Field)			_FIELD_GET(_MMCSD_SDIOCTL_ADDR, _MMCSD_SDIOCTL_##Field##)
#define _MMCSD_SDIOCTL_FSET(Field, Val)		_FIELD_SET(_MMCSD_SDIOCTL_ADDR, _MMCSD_SDIOCTL_##Field##, Val)
#define _MMCSD_SDIOCTL_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_MMCSD_SDIOCTL_ADDR, _MMCSD_SDIOCTL_##Field##, AND, OR, INV)

#define _MMCSD_SDIOCTL_RDWTCR_SHIFT		(1)
#define _MMCSD_SDIOCTL_RDWTCR_MK(n)		(((Uint16)(n) & 0x0001u) << _MMCSD_SDIOCTL_RDWTCR_SHIFT)
#define _MMCSD_SDIOCTL_RDWTCR_MASK			(_MMCSD_SDIOCTL_RDWTCR_MK(0x0001u))
#define _MMCSD_SDIOCTL_RDWTCR_CLR			(~(_MMCSD_SDIOCTL_RDWTCR_MASK))

#define _MMCSD_SDIOCTL_RDWTRQ_SHIFT		(0)
#define _MMCSD_SDIOCTL_RDWTRQ_MK(n)		((Uint16)(n) & 0x0001u) 
#define _MMCSD_SDIOCTL_RDWTRQ_MASK			(_MMCSD_SDIOCTL_RDWTRQ_MK(0x0001u))
#define _MMCSD_SDIOCTL_RDWTRQ_CLR			(~(_MMCSD_SDIOCTL_RDWTRQ_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for MMCSD SDIOST0 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _MMCSD_SDIOST0_GET()			_REG_GET(_MMCSD_SDIOST0_ADDR)
#define _MMCSD_SDIOST0_SET(Val)			_REG_SET(_MMCSD_SDIOST0_ADDR, Val)
#define _MMCSD_SDIOST0_AOI(AND,OR,INV)		_REG_AOI(_MMCSD_SDIOST0_ADDR,AND,OR,INV)
#define _MMCSD_SDIOST0_FGET(Field)			_FIELD_GET(_MMCSD_SDIOST0_ADDR, _MMCSD_SDIOST0_##Field##)
#define _MMCSD_SDIOST0_FSET(Field, Val)		_FIELD_SET(_MMCSD_SDIOST0_ADDR, _MMCSD_SDIOST0_##Field##, Val)
#define _MMCSD_SDIOST0_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_MMCSD_SDIOST0_ADDR, _MMCSD_SDIOST0_##Field##, AND, OR, INV)

#define _MMCSD_SDIOST0_RDWTST_SHIFT		(2)
#define _MMCSD_SDIOST0_RDWTST_MK(n)		(((Uint16)(n) & 0x0001u) << _MMCSD_SDIOST0_RDWTST_SHIFT)
#define _MMCSD_SDIOST0_RDWTST_MASK			(_MMCSD_SDIOST0_RDWTST_MK(0x0001u))
#define _MMCSD_SDIOST0_RDWTST_CLR			(~(_MMCSD_SDIOST0_RDWTST_MASK))

#define _MMCSD_SDIOST0_INTPRD_SHIFT		(1)
#define _MMCSD_SDIOST0_INTPRD_MK(n)		(((Uint16)(n) & 0x0001u) << _MMCSD_SDIOST0_INTPRD_SHIFT)
#define _MMCSD_SDIOST0_INTPRD_MASK			(_MMCSD_SDIOST0_INTPRD_MK(0x0001u))
#define _MMCSD_SDIOST0_INTPRD_CLR			(~(_MMCSD_SDIOST0_INTPRD_MASK))

#define _MMCSD_SDIOST0_DAT1_SHIFT		(0)
#define _MMCSD_SDIOST0_DAT1_MK(n)		((Uint16)(n) & 0x0001u) 
#define _MMCSD_SDIOST0_DAT1_MASK			(_MMCSD_SDIOST0_DAT1_MK(0x0001u))
#define _MMCSD_SDIOST0_DAT1_CLR			(~(_MMCSD_SDIOST0_DAT1_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for MMCSD SDIOIEN register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _MMCSD_SDIOIEN_GET()			_REG_GET(_MMCSD_SDIOIEN_ADDR)
#define _MMCSD_SDIOIEN_SET(Val)			_REG_SET(_MMCSD_SDIOIEN_ADDR, Val)
#define _MMCSD_SDIOIEN_AOI(AND,OR,INV)		_REG_AOI(_MMCSD_SDIOIEN_ADDR,AND,OR,INV)
#define _MMCSD_SDIOIEN_FGET(Field)			_FIELD_GET(_MMCSD_SDIOIEN_ADDR, _MMCSD_SDIOIEN_##Field##)
#define _MMCSD_SDIOIEN_FSET(Field, Val)		_FIELD_SET(_MMCSD_SDIOIEN_ADDR, _MMCSD_SDIOIEN_##Field##, Val)
#define _MMCSD_SDIOIEN_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_MMCSD_SDIOIEN_ADDR, _MMCSD_SDIOIEN_##Field##, AND, OR, INV)

#define _MMCSD_SDIOIEN_RWSEN_SHIFT		(1)
#define _MMCSD_SDIOIEN_RWSEN_MK(n)		(((Uint16)(n) & 0x0001u) << _MMCSD_SDIOIEN_RWSEN_SHIFT)
#define _MMCSD_SDIOIEN_RWSEN_MASK			(_MMCSD_SDIOIEN_RWSEN_MK(0x0001u))
#define _MMCSD_SDIOIEN_RWSEN_CLR			(~(_MMCSD_SDIOIEN_RWSEN_MASK))

#define _MMCSD_SDIOIEN_IOINTEN_SHIFT		(0)
#define _MMCSD_SDIOIEN_IOINTEN_MK(n)		((Uint16)(n) & 0x0001u) 
#define _MMCSD_SDIOIEN_IOINTEN_MASK			(_MMCSD_SDIOIEN_IOINTEN_MK(0x0001u))
#define _MMCSD_SDIOIEN_IOINTEN_CLR			(~(_MMCSD_SDIOIEN_IOINTEN_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for MMCSD SDIOIST register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _MMCSD_SDIOIST_GET()			_REG_GET(_MMCSD_SDIOIST_ADDR)
#define _MMCSD_SDIOIST_SET(Val)			_REG_SET(_MMCSD_SDIOIST_ADDR, Val)
#define _MMCSD_SDIOIST_AOI(AND,OR,INV)		_REG_AOI(_MMCSD_SDIOIST_ADDR,AND,OR,INV)
#define _MMCSD_SDIOIST_FGET(Field)			_FIELD_GET(_MMCSD_SDIOIST_ADDR, _MMCSD_SDIOIST_##Field##)
#define _MMCSD_SDIOIST_FSET(Field, Val)		_FIELD_SET(_MMCSD_SDIOIST_ADDR, _MMCSD_SDIOIST_##Field##, Val)
#define _MMCSD_SDIOIST_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_MMCSD_SDIOIST_ADDR, _MMCSD_SDIOIST_##Field##, AND, OR, INV)

#define _MMCSD_SDIOIST_RWS_SHIFT		(1)
#define _MMCSD_SDIOIST_RWS_MK(n)		(((Uint16)(n) & 0x0001u) << _MMCSD_SDIOIST_RWS_SHIFT)
#define _MMCSD_SDIOIST_RWS_MASK			(_MMCSD_SDIOIST_RWS_MK(0x0001u))
#define _MMCSD_SDIOIST_RWS_CLR			(~(_MMCSD_SDIOIST_RWS_MASK))

#define _MMCSD_SDIOIST_IOINT_SHIFT		(0)
#define _MMCSD_SDIOIST_IOINT_MK(n)		((Uint16)(n) & 0x0001u) 
#define _MMCSD_SDIOIST_IOINT_MASK			(_MMCSD_SDIOIST_IOINT_MK(0x0001u))
#define _MMCSD_SDIOIST_IOINT_CLR			(~(_MMCSD_SDIOIST_IOINT_MASK))