csl_icachehal_270.h

dm270 source code

/*   
 *  Copyright 2001 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 */
/******************************************************************************\
*           Copyright (C) 2001 Texas Instruments Incorporated.
*                           All Rights Reserved
*------------------------------------------------------------------------------
* MODULE.NAME... ICACHE - HAL configuration module
* FILENAME...... /vobs/DSC_RTOS/arm/project/dm270/include/csl/csl_icachehal_270.h
* PROJECT....... ARM Chip Support Library
* COMPONENT..... HAL
* IMPORTS....... 
*------------------------------------------------------------------------------
* HISTORY:
*   CREATED:       12/06/2001 
*------------------------------------------------------------------------------
* DESCRIPTION:  (CHIP memory mapped register definitions)
*
*
*
\******************************************************************************/



/*-----------------------------------------------------------------------------------*
* Register Macros for ICACHE:
*------------------------------------------------------------------------------------*/


/*------------------------------------------------------------------------------*
* Register Macros for ICACHE ICAMODE register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _ICACHE_ICAMODE_GET()			_REG_GET(_ICACHE_ICAMODE_ADDR)
#define _ICACHE_ICAMODE_SET(Val)			_REG_SET(_ICACHE_ICAMODE_ADDR, Val)
#define _ICACHE_ICAMODE_AOI(AND,OR,INV)		_REG_AOI(_ICACHE_ICAMODE_ADDR,AND,OR,INV)
#define _ICACHE_ICAMODE_FGET(Field)			_FIELD_GET(_ICACHE_ICAMODE_ADDR, _ICACHE_ICAMODE_##Field##)
#define _ICACHE_ICAMODE_FSET(Field, Val)		_FIELD_SET(_ICACHE_ICAMODE_ADDR, _ICACHE_ICAMODE_##Field##, Val)
#define _ICACHE_ICAMODE_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_ICACHE_ICAMODE_ADDR, _ICACHE_ICAMODE_##Field##, AND, OR, INV)

#define _ICACHE_ICAMODE_REQ4W_SHIFT		(8)
#define _ICACHE_ICAMODE_REQ4W_MK(n)		(((Uint16)(n) & 0x0001u) << _ICACHE_ICAMODE_REQ4W_SHIFT)
#define _ICACHE_ICAMODE_REQ4W_MASK			(_ICACHE_ICAMODE_REQ4W_MK(0x0001u))
#define _ICACHE_ICAMODE_REQ4W_CLR			(~(_ICACHE_ICAMODE_REQ4W_MASK))

#define _ICACHE_ICAMODE_ICACLR_SHIFT		(1)
#define _ICACHE_ICAMODE_ICACLR_MK(n)		(((Uint16)(n) & 0x0001u) << _ICACHE_ICAMODE_ICACLR_SHIFT)
#define _ICACHE_ICAMODE_ICACLR_MASK			(_ICACHE_ICAMODE_ICACLR_MK(0x0001u))
#define _ICACHE_ICAMODE_ICACLR_CLR			(~(_ICACHE_ICAMODE_ICACLR_MASK))

#define _ICACHE_ICAMODE_ICAENB_SHIFT		(0)
#define _ICACHE_ICAMODE_ICAENB_MK(n)		((Uint16)(n) & 0x0001u) 
#define _ICACHE_ICAMODE_ICAENB_MASK			(_ICACHE_ICAMODE_ICAENB_MK(0x0001u))
#define _ICACHE_ICAMODE_ICAENB_CLR			(~(_ICACHE_ICAMODE_ICAENB_MASK))