📄 csl_emifhal_270.h
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#define _EMIF_ECC2CP_GET() _REG_GET(_EMIF_ECC2CP_ADDR)#define _EMIF_ECC2CP_SET(Val) _REG_SET(_EMIF_ECC2CP_ADDR, Val)#define _EMIF_ECC2CP_AOI(AND,OR,INV) _REG_AOI(_EMIF_ECC2CP_ADDR,AND,OR,INV)#define _EMIF_ECC2CP_FGET(Field) _FIELD_GET(_EMIF_ECC2CP_ADDR, _EMIF_ECC2CP_##Field##)#define _EMIF_ECC2CP_FSET(Field, Val) _FIELD_SET(_EMIF_ECC2CP_ADDR, _EMIF_ECC2CP_##Field##, Val)#define _EMIF_ECC2CP_FAOI(Field, AND, OR, INV) _FIELD_AOI(_EMIF_ECC2CP_ADDR, _EMIF_ECC2CP_##Field##, AND, OR, INV)#define _EMIF_ECC2CP_2CP_SHIFT (2)#define _EMIF_ECC2CP_2CP_MK(n) (((Uint16)(n) & 0x003fu) << _EMIF_ECC2CP_2CP_SHIFT)#define _EMIF_ECC2CP_2CP_MASK (_EMIF_ECC2CP_2CP_MK(0x003fu))#define _EMIF_ECC2CP_2CP_CLR (~(_EMIF_ECC2CP_2CP_MASK))#define _EMIF_ECC2CP_2RD1_SHIFT (0)#define _EMIF_ECC2CP_2RD1_MK(n) ((Uint16)(n) & 0x0003u) #define _EMIF_ECC2CP_2RD1_MASK (_EMIF_ECC2CP_2RD1_MK(0x0003u))#define _EMIF_ECC2CP_2RD1_CLR (~(_EMIF_ECC2CP_2RD1_MASK))/*------------------------------------------------------------------------------** Register Macros for EMIF ECC2LP register :* * * *---------------------------------------------------------------------------------*/#define _EMIF_ECC2LP_GET() _REG_GET(_EMIF_ECC2LP_ADDR)#define _EMIF_ECC2LP_SET(Val) _REG_SET(_EMIF_ECC2LP_ADDR, Val)#define _EMIF_ECC2LP_AOI(AND,OR,INV) _REG_AOI(_EMIF_ECC2LP_ADDR,AND,OR,INV)/*------------------------------------------------------------------------------** Register Macros for EMIF ECCCLR register :* * * *---------------------------------------------------------------------------------*/#define _EMIF_ECCCLR_GET() _REG_GET(_EMIF_ECCCLR_ADDR)#define _EMIF_ECCCLR_SET(Val) _REG_SET(_EMIF_ECCCLR_ADDR, Val)#define _EMIF_ECCCLR_AOI(AND,OR,INV) _REG_AOI(_EMIF_ECCCLR_ADDR,AND,OR,INV)#define _EMIF_ECCCLR_FGET(Field) _FIELD_GET(_EMIF_ECCCLR_ADDR, _EMIF_ECCCLR_##Field##)#define _EMIF_ECCCLR_FSET(Field, Val) _FIELD_SET(_EMIF_ECCCLR_ADDR, _EMIF_ECCCLR_##Field##, Val)#define _EMIF_ECCCLR_FAOI(Field, AND, OR, INV) _FIELD_AOI(_EMIF_ECCCLR_ADDR, _EMIF_ECCCLR_##Field##, AND, OR, INV)#define _EMIF_ECCCLR_ECLR_SHIFT (0)#define _EMIF_ECCCLR_ECLR_MK(n) ((Uint16)(n) & 0x0001u) #define _EMIF_ECCCLR_ECLR_MASK (_EMIF_ECCCLR_ECLR_MK(0x0001u))#define _EMIF_ECCCLR_ECLR_CLR (~(_EMIF_ECCCLR_ECLR_MASK))/*------------------------------------------------------------------------------** Register Macros for EMIF PAGESZ register :* * * *---------------------------------------------------------------------------------*/#define _EMIF_PAGESZ_GET() _REG_GET(_EMIF_PAGESZ_ADDR)#define _EMIF_PAGESZ_SET(Val) _REG_SET(_EMIF_PAGESZ_ADDR, Val)#define _EMIF_PAGESZ_AOI(AND,OR,INV) _REG_AOI(_EMIF_PAGESZ_ADDR,AND,OR,INV)#define _EMIF_PAGESZ_FGET(Field) _FIELD_GET(_EMIF_PAGESZ_ADDR, _EMIF_PAGESZ_##Field##)#define _EMIF_PAGESZ_FSET(Field, Val) _FIELD_SET(_EMIF_PAGESZ_ADDR, _EMIF_PAGESZ_##Field##, Val)#define _EMIF_PAGESZ_FAOI(Field, AND, OR, INV) _FIELD_AOI(_EMIF_PAGESZ_ADDR, _EMIF_PAGESZ_##Field##, AND, OR, INV)#define _EMIF_PAGESZ_PAGESZ_SHIFT (0)#define _EMIF_PAGESZ_PAGESZ_MK(n) ((Uint16)(n) & 0x0001u) #define _EMIF_PAGESZ_PAGESZ_MASK (_EMIF_PAGESZ_PAGESZ_MK(0x0001u))#define _EMIF_PAGESZ_PAGESZ_CLR (~(_EMIF_PAGESZ_PAGESZ_MASK))/*------------------------------------------------------------------------------** Register Macros for EMIF IMGDSPDEST register :* * * *---------------------------------------------------------------------------------*/#define _EMIF_IMGDSPDEST_GET() _REG_GET(_EMIF_IMGDSPDEST_ADDR)#define _EMIF_IMGDSPDEST_SET(Val) _REG_SET(_EMIF_IMGDSPDEST_ADDR, Val)#define _EMIF_IMGDSPDEST_AOI(AND,OR,INV) _REG_AOI(_EMIF_IMGDSPDEST_ADDR,AND,OR,INV)#define _EMIF_IMGDSPDEST_FGET(Field) _FIELD_GET(_EMIF_IMGDSPDEST_ADDR, _EMIF_IMGDSPDEST_##Field##)#define _EMIF_IMGDSPDEST_FSET(Field, Val) _FIELD_SET(_EMIF_IMGDSPDEST_ADDR, _EMIF_IMGDSPDEST_##Field##, Val)#define _EMIF_IMGDSPDEST_FAOI(Field, AND, OR, INV) _FIELD_AOI(_EMIF_IMGDSPDEST_ADDR, _EMIF_IMGDSPDEST_##Field##, AND, OR, INV)#define _EMIF_IMGDSPDEST_IDST_SHIFT (4)#define _EMIF_IMGDSPDEST_IDST_MK(n) (((Uint16)(n) & 0x0007u) << _EMIF_IMGDSPDEST_IDST_SHIFT)#define _EMIF_IMGDSPDEST_IDST_MASK (_EMIF_IMGDSPDEST_IDST_MK(0x0007u))#define _EMIF_IMGDSPDEST_IDST_CLR (~(_EMIF_IMGDSPDEST_IDST_MASK))#define _EMIF_IMGDSPDEST_DDST_SHIFT (0)#define _EMIF_IMGDSPDEST_DDST_MK(n) ((Uint16)(n) & 0x0007u) #define _EMIF_IMGDSPDEST_DDST_MASK (_EMIF_IMGDSPDEST_DDST_MK(0x0007u))#define _EMIF_IMGDSPDEST_DDST_CLR (~(_EMIF_IMGDSPDEST_DDST_MASK))/*------------------------------------------------------------------------------** Register Macros for EMIF PRIOCTL register :* * * *---------------------------------------------------------------------------------*/#define _EMIF_PRIOCTL_GET() _REG_GET(_EMIF_PRIOCTL_ADDR)#define _EMIF_PRIOCTL_SET(Val) _REG_SET(_EMIF_PRIOCTL_ADDR, Val)#define _EMIF_PRIOCTL_AOI(AND,OR,INV) _REG_AOI(_EMIF_PRIOCTL_ADDR,AND,OR,INV)#define _EMIF_PRIOCTL_FGET(Field) _FIELD_GET(_EMIF_PRIOCTL_ADDR, _EMIF_PRIOCTL_##Field##)#define _EMIF_PRIOCTL_FSET(Field, Val) _FIELD_SET(_EMIF_PRIOCTL_ADDR, _EMIF_PRIOCTL_##Field##, Val)#define _EMIF_PRIOCTL_FAOI(Field, AND, OR, INV) _FIELD_AOI(_EMIF_PRIOCTL_ADDR, _EMIF_PRIOCTL_##Field##, AND, OR, INV)#define _EMIF_PRIOCTL_PRY1_SHIFT (6)#define _EMIF_PRIOCTL_PRY1_MK(n) (((Uint16)(n) & 0x0003u) << _EMIF_PRIOCTL_PRY1_SHIFT)#define _EMIF_PRIOCTL_PRY1_MASK (_EMIF_PRIOCTL_PRY1_MK(0x0003u))#define _EMIF_PRIOCTL_PRY1_CLR (~(_EMIF_PRIOCTL_PRY1_MASK))#define _EMIF_PRIOCTL_PRY2_SHIFT (4)#define _EMIF_PRIOCTL_PRY2_MK(n) (((Uint16)(n) & 0x0003u) << _EMIF_PRIOCTL_PRY2_SHIFT)#define _EMIF_PRIOCTL_PRY2_MASK (_EMIF_PRIOCTL_PRY2_MK(0x0003u))#define _EMIF_PRIOCTL_PRY2_CLR (~(_EMIF_PRIOCTL_PRY2_MASK))#define _EMIF_PRIOCTL_PRY3_SHIFT (2)#define _EMIF_PRIOCTL_PRY3_MK(n) (((Uint16)(n) & 0x0003u) << _EMIF_PRIOCTL_PRY3_SHIFT)#define _EMIF_PRIOCTL_PRY3_MASK (_EMIF_PRIOCTL_PRY3_MK(0x0003u))#define _EMIF_PRIOCTL_PRY3_CLR (~(_EMIF_PRIOCTL_PRY3_MASK))#define _EMIF_PRIOCTL_PRY4_SHIFT (0)#define _EMIF_PRIOCTL_PRY4_MK(n) ((Uint16)(n) & 0x0003u) #define _EMIF_PRIOCTL_PRY4_MASK (_EMIF_PRIOCTL_PRY4_MK(0x0003u))#define _EMIF_PRIOCTL_PRY4_CLR (~(_EMIF_PRIOCTL_PRY4_MASK))/*------------------------------------------------------------------------------** Register Macros for EMIF SOURCEADDH register :* * * *---------------------------------------------------------------------------------*/#define _EMIF_SOURCEADDH_GET() _REG_GET(_EMIF_SOURCEADDH_ADDR)#define _EMIF_SOURCEADDH_SET(Val) _REG_SET(_EMIF_SOURCEADDH_ADDR, Val)#define _EMIF_SOURCEADDH_AOI(AND,OR,INV) _REG_AOI(_EMIF_SOURCEADDH_ADDR,AND,OR,INV)#define _EMIF_SOURCEADDH_FGET(Field) _FIELD_GET(_EMIF_SOURCEADDH_ADDR, _EMIF_SOURCEADDH_##Field##)#define _EMIF_SOURCEADDH_FSET(Field, Val) _FIELD_SET(_EMIF_SOURCEADDH_ADDR, _EMIF_SOURCEADDH_##Field##, Val)#define _EMIF_SOURCEADDH_FAOI(Field, AND, OR, INV) _FIELD_AOI(_EMIF_SOURCEADDH_ADDR, _EMIF_SOURCEADDH_##Field##, AND, OR, INV)#define _EMIF_SOURCEADDH_SAFIX_SHIFT (12)#define _EMIF_SOURCEADDH_SAFIX_MK(n) (((Uint16)(n) & 0x0001u) << _EMIF_SOURCEADDH_SAFIX_SHIFT)#define _EMIF_SOURCEADDH_SAFIX_MASK (_EMIF_SOURCEADDH_SAFIX_MK(0x0001u))#define _EMIF_SOURCEADDH_SAFIX_CLR (~(_EMIF_SOURCEADDH_SAFIX_MASK))#define _EMIF_SOURCEADDH_SAH_SHIFT (0)#define _EMIF_SOURCEADDH_SAH_MK(n) ((Uint16)(n) & 0x03ffu) #define _EMIF_SOURCEADDH_SAH_MASK (_EMIF_SOURCEADDH_SAH_MK(0x03ffu))#define _EMIF_SOURCEADDH_SAH_CLR (~(_EMIF_SOURCEADDH_SAH_MASK))/*------------------------------------------------------------------------------** Register Macros for EMIF SOURCEADDL register :* * * *---------------------------------------------------------------------------------*/#define _EMIF_SOURCEADDL_GET() _REG_GET(_EMIF_SOURCEADDL_ADDR)#define _EMIF_SOURCEADDL_SET(Val) _REG_SET(_EMIF_SOURCEADDL_ADDR, Val)#define _EMIF_SOURCEADDL_AOI(AND,OR,INV) _REG_AOI(_EMIF_SOURCEADDL_ADDR,AND,OR,INV)/*------------------------------------------------------------------------------** Register Macros for EMIF DESTADDH register :* * * *---------------------------------------------------------------------------------*/#define _EMIF_DESTADDH_GET() _REG_GET(_EMIF_DESTADDH_ADDR)#define _EMIF_DESTADDH_SET(Val) _REG_SET(_EMIF_DESTADDH_ADDR, Val)#define _EMIF_DESTADDH_AOI(AND,OR,INV) _REG_AOI(_EMIF_DESTADDH_ADDR,AND,OR,INV)#define _EMIF_DESTADDH_FGET(Field) _FIELD_GET(_EMIF_DESTADDH_ADDR, _EMIF_DESTADDH_##Field##)#define _EMIF_DESTADDH_FSET(Field, Val) _FIELD_SET(_EMIF_DESTADDH_ADDR, _EMIF_DESTADDH_##Field##, Val)#define _EMIF_DESTADDH_FAOI(Field, AND, OR, INV) _FIELD_AOI(_EMIF_DESTADDH_ADDR, _EMIF_DESTADDH_##Field##, AND, OR, INV)#define _EMIF_DESTADDH_DAFIX_SHIFT (12)#define _EMIF_DESTADDH_DAFIX_MK(n) (((Uint16)(n) & 0x0001u) << _EMIF_DESTADDH_DAFIX_SHIFT)#define _EMIF_DESTADDH_DAFIX_MASK (_EMIF_DESTADDH_DAFIX_MK(0x0001u))#define _EMIF_DESTADDH_DAFIX_CLR (~(_EMIF_DESTADDH_DAFIX_MASK))#define _EMIF_DESTADDH_DAH_SHIFT (0)#define _EMIF_DESTADDH_DAH_MK(n) ((Uint16)(n) & 0x03ffu) #define _EMIF_DESTADDH_DAH_MASK (_EMIF_DESTADDH_DAH_MK(0x03ffu))#define _EMIF_DESTADDH_DAH_CLR (~(_EMIF_DESTADDH_DAH_MASK))/*------------------------------------------------------------------------------** Register Macros for EMIF DESTADDL register :* * * *---------------------------------------------------------------------------------*/#define _EMIF_DESTADDL_GET() _REG_GET(_EMIF_DESTADDL_ADDR)#define _EMIF_DESTADDL_SET(Val) _REG_SET(_EMIF_DESTADDL_ADDR, Val)#define _EMIF_DESTADDL_AOI(AND,OR,INV) _REG_AOI(_EMIF_DESTADDL_ADDR,AND,OR,INV)/*------------------------------------------------------------------------------** Register Macros for EMIF DMASIZE register :* * * *---------------------------------------------------------------------------------*/#define _EMIF_DMASIZE_GET() _REG_GET(_EMIF_DMASIZE_ADDR)#define _EMIF_DMASIZE_SET(Val) _REG_SET(_EMIF_DMASIZE_ADDR, Val)#define _EMIF_DMASIZE_AOI(AND,OR,INV) _REG_AOI(_EMIF_DMASIZE_ADDR,AND,OR,INV)/*------------------------------------------------------------------------------** Register Macros for EMIF DMADEVSEL register :* ⌨️ 快捷键说明
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