csl_emifhal_270.h

dm270 source code

#define _EMIF_BUSRLS_BUSSEL_MASK			(_EMIF_BUSRLS_BUSSEL_MK(0x0001u))
#define _EMIF_BUSRLS_BUSSEL_CLR			(~(_EMIF_BUSRLS_BUSSEL_MASK))

#define _EMIF_BUSRLS_SDREL_SHIFT		(1)
#define _EMIF_BUSRLS_SDREL_MK(n)		(((Uint16)(n) & 0x0001u) << _EMIF_BUSRLS_SDREL_SHIFT)
#define _EMIF_BUSRLS_SDREL_MASK			(_EMIF_BUSRLS_SDREL_MK(0x0001u))
#define _EMIF_BUSRLS_SDREL_CLR			(~(_EMIF_BUSRLS_SDREL_MASK))

#define _EMIF_BUSRLS_EMREL_SHIFT		(0)
#define _EMIF_BUSRLS_EMREL_MK(n)		((Uint16)(n) & 0x0001u) 
#define _EMIF_BUSRLS_EMREL_MASK			(_EMIF_BUSRLS_EMREL_MK(0x0001u))
#define _EMIF_BUSRLS_EMREL_CLR			(~(_EMIF_BUSRLS_EMREL_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for EMIF CFCTRL1 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _EMIF_CFCTRL1_GET()			_REG_GET(_EMIF_CFCTRL1_ADDR)
#define _EMIF_CFCTRL1_SET(Val)			_REG_SET(_EMIF_CFCTRL1_ADDR, Val)
#define _EMIF_CFCTRL1_AOI(AND,OR,INV)		_REG_AOI(_EMIF_CFCTRL1_ADDR,AND,OR,INV)
#define _EMIF_CFCTRL1_FGET(Field)			_FIELD_GET(_EMIF_CFCTRL1_ADDR, _EMIF_CFCTRL1_##Field##)
#define _EMIF_CFCTRL1_FSET(Field, Val)		_FIELD_SET(_EMIF_CFCTRL1_ADDR, _EMIF_CFCTRL1_##Field##, Val)
#define _EMIF_CFCTRL1_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_EMIF_CFCTRL1_ADDR, _EMIF_CFCTRL1_##Field##, AND, OR, INV)

#define _EMIF_CFCTRL1_CFSEL_SHIFT		(0)
#define _EMIF_CFCTRL1_CFSEL_MK(n)		((Uint16)(n) & 0x0001u) 
#define _EMIF_CFCTRL1_CFSEL_MASK			(_EMIF_CFCTRL1_CFSEL_MK(0x0001u))
#define _EMIF_CFCTRL1_CFSEL_CLR			(~(_EMIF_CFCTRL1_CFSEL_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for EMIF CFCTRL2 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _EMIF_CFCTRL2_GET()			_REG_GET(_EMIF_CFCTRL2_ADDR)
#define _EMIF_CFCTRL2_SET(Val)			_REG_SET(_EMIF_CFCTRL2_ADDR, Val)
#define _EMIF_CFCTRL2_AOI(AND,OR,INV)		_REG_AOI(_EMIF_CFCTRL2_ADDR,AND,OR,INV)
#define _EMIF_CFCTRL2_FGET(Field)			_FIELD_GET(_EMIF_CFCTRL2_ADDR, _EMIF_CFCTRL2_##Field##)
#define _EMIF_CFCTRL2_FSET(Field, Val)		_FIELD_SET(_EMIF_CFCTRL2_ADDR, _EMIF_CFCTRL2_##Field##, Val)
#define _EMIF_CFCTRL2_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_EMIF_CFCTRL2_ADDR, _EMIF_CFCTRL2_##Field##, AND, OR, INV)

#define _EMIF_CFCTRL2_BUSSZ_SHIFT		(4)
#define _EMIF_CFCTRL2_BUSSZ_MK(n)		(((Uint16)(n) & 0x0001u) << _EMIF_CFCTRL2_BUSSZ_SHIFT)
#define _EMIF_CFCTRL2_BUSSZ_MASK			(_EMIF_CFCTRL2_BUSSZ_MK(0x0001u))
#define _EMIF_CFCTRL2_BUSSZ_CLR			(~(_EMIF_CFCTRL2_BUSSZ_MASK))

#define _EMIF_CFCTRL2_CFMOD_SHIFT		(0)
#define _EMIF_CFCTRL2_CFMOD_MK(n)		((Uint16)(n) & 0x0001u) 
#define _EMIF_CFCTRL2_CFMOD_MASK			(_EMIF_CFCTRL2_CFMOD_MK(0x0001u))
#define _EMIF_CFCTRL2_CFMOD_CLR			(~(_EMIF_CFCTRL2_CFMOD_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for EMIF SMCTRL register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _EMIF_SMCTRL_GET()			_REG_GET(_EMIF_SMCTRL_ADDR)
#define _EMIF_SMCTRL_SET(Val)			_REG_SET(_EMIF_SMCTRL_ADDR, Val)
#define _EMIF_SMCTRL_AOI(AND,OR,INV)		_REG_AOI(_EMIF_SMCTRL_ADDR,AND,OR,INV)
#define _EMIF_SMCTRL_FGET(Field)			_FIELD_GET(_EMIF_SMCTRL_ADDR, _EMIF_SMCTRL_##Field##)
#define _EMIF_SMCTRL_FSET(Field, Val)		_FIELD_SET(_EMIF_SMCTRL_ADDR, _EMIF_SMCTRL_##Field##, Val)
#define _EMIF_SMCTRL_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_EMIF_SMCTRL_ADDR, _EMIF_SMCTRL_##Field##, AND, OR, INV)

#define _EMIF_SMCTRL_SCEH_SHIFT		(0)
#define _EMIF_SMCTRL_SCEH_MK(n)		((Uint16)(n) & 0x0001u) 
#define _EMIF_SMCTRL_SCEH_MASK			(_EMIF_SMCTRL_SCEH_MK(0x0001u))
#define _EMIF_SMCTRL_SCEH_CLR			(~(_EMIF_SMCTRL_SCEH_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for EMIF BUSINTEN register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _EMIF_BUSINTEN_GET()			_REG_GET(_EMIF_BUSINTEN_ADDR)
#define _EMIF_BUSINTEN_SET(Val)			_REG_SET(_EMIF_BUSINTEN_ADDR, Val)
#define _EMIF_BUSINTEN_AOI(AND,OR,INV)		_REG_AOI(_EMIF_BUSINTEN_ADDR,AND,OR,INV)
#define _EMIF_BUSINTEN_FGET(Field)			_FIELD_GET(_EMIF_BUSINTEN_ADDR, _EMIF_BUSINTEN_##Field##)
#define _EMIF_BUSINTEN_FSET(Field, Val)		_FIELD_SET(_EMIF_BUSINTEN_ADDR, _EMIF_BUSINTEN_##Field##, Val)
#define _EMIF_BUSINTEN_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_EMIF_BUSINTEN_ADDR, _EMIF_BUSINTEN_##Field##, AND, OR, INV)

#define _EMIF_BUSINTEN_CBCND_SHIFT		(1)
#define _EMIF_BUSINTEN_CBCND_MK(n)		(((Uint16)(n) & 0x0001u) << _EMIF_BUSINTEN_CBCND_SHIFT)
#define _EMIF_BUSINTEN_CBCND_MASK			(_EMIF_BUSINTEN_CBCND_MK(0x0001u))
#define _EMIF_BUSINTEN_CBCND_CLR			(~(_EMIF_BUSINTEN_CBCND_MASK))

#define _EMIF_BUSINTEN_CBIEN_SHIFT		(0)
#define _EMIF_BUSINTEN_CBIEN_MK(n)		((Uint16)(n) & 0x0001u) 
#define _EMIF_BUSINTEN_CBIEN_MASK			(_EMIF_BUSINTEN_CBIEN_MK(0x0001u))
#define _EMIF_BUSINTEN_CBIEN_CLR			(~(_EMIF_BUSINTEN_CBIEN_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for EMIF RSV0 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _EMIF_RSV0_GET()			_REG_GET(_EMIF_RSV0_ADDR)
#define _EMIF_RSV0_SET(Val)			_REG_SET(_EMIF_RSV0_ADDR, Val)
#define _EMIF_RSV0_AOI(AND,OR,INV)		_REG_AOI(_EMIF_RSV0_ADDR,AND,OR,INV)



/*------------------------------------------------------------------------------*
* Register Macros for EMIF BUSSTS register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _EMIF_BUSSTS_GET()			_REG_GET(_EMIF_BUSSTS_ADDR)
#define _EMIF_BUSSTS_SET(Val)			_REG_SET(_EMIF_BUSSTS_ADDR, Val)
#define _EMIF_BUSSTS_AOI(AND,OR,INV)		_REG_AOI(_EMIF_BUSSTS_ADDR,AND,OR,INV)
#define _EMIF_BUSSTS_FGET(Field)			_FIELD_GET(_EMIF_BUSSTS_ADDR, _EMIF_BUSSTS_##Field##)
#define _EMIF_BUSSTS_FSET(Field, Val)		_FIELD_SET(_EMIF_BUSSTS_ADDR, _EMIF_BUSSTS_##Field##, Val)
#define _EMIF_BUSSTS_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_EMIF_BUSSTS_ADDR, _EMIF_BUSSTS_##Field##, AND, OR, INV)

#define _EMIF_BUSSTS_EM_WAIT_SHIFT		(3)
#define _EMIF_BUSSTS_EM_WAIT_MK(n)		(((Uint16)(n) & 0x0001u) << _EMIF_BUSSTS_EM_WAIT_SHIFT)
#define _EMIF_BUSSTS_EM_WAIT_MASK			(_EMIF_BUSSTS_EM_WAIT_MK(0x0001u))
#define _EMIF_BUSSTS_EM_WAIT_CLR			(~(_EMIF_BUSSTS_EM_WAIT_MASK))

#define _EMIF_BUSSTS_IOIS16_SHIFT		(2)
#define _EMIF_BUSSTS_IOIS16_MK(n)		(((Uint16)(n) & 0x0001u) << _EMIF_BUSSTS_IOIS16_SHIFT)
#define _EMIF_BUSSTS_IOIS16_MASK			(_EMIF_BUSSTS_IOIS16_MK(0x0001u))
#define _EMIF_BUSSTS_IOIS16_CLR			(~(_EMIF_BUSSTS_IOIS16_MASK))

#define _EMIF_BUSSTS_CFWAIT_SHIFT		(1)
#define _EMIF_BUSSTS_CFWAIT_MK(n)		(((Uint16)(n) & 0x0001u) << _EMIF_BUSSTS_CFWAIT_SHIFT)
#define _EMIF_BUSSTS_CFWAIT_MASK			(_EMIF_BUSSTS_CFWAIT_MK(0x0001u))
#define _EMIF_BUSSTS_CFWAIT_CLR			(~(_EMIF_BUSSTS_CFWAIT_MASK))

#define _EMIF_BUSSTS_CFRDY_SHIFT		(0)
#define _EMIF_BUSSTS_CFRDY_MK(n)		((Uint16)(n) & 0x0001u) 
#define _EMIF_BUSSTS_CFRDY_MASK			(_EMIF_BUSSTS_CFRDY_MK(0x0001u))
#define _EMIF_BUSSTS_CFRDY_CLR			(~(_EMIF_BUSSTS_CFRDY_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for EMIF BUSWAITMD register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _EMIF_BUSWAITMD_GET()			_REG_GET(_EMIF_BUSWAITMD_ADDR)
#define _EMIF_BUSWAITMD_SET(Val)			_REG_SET(_EMIF_BUSWAITMD_ADDR, Val)
#define _EMIF_BUSWAITMD_AOI(AND,OR,INV)		_REG_AOI(_EMIF_BUSWAITMD_ADDR,AND,OR,INV)
#define _EMIF_BUSWAITMD_FGET(Field)			_FIELD_GET(_EMIF_BUSWAITMD_ADDR, _EMIF_BUSWAITMD_##Field##)
#define _EMIF_BUSWAITMD_FSET(Field, Val)		_FIELD_SET(_EMIF_BUSWAITMD_ADDR, _EMIF_BUSWAITMD_##Field##, Val)
#define _EMIF_BUSWAITMD_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_EMIF_BUSWAITMD_ADDR, _EMIF_BUSWAITMD_##Field##, AND, OR, INV)

#define _EMIF_BUSWAITMD_CFRSL_SHIFT		(1)
#define _EMIF_BUSWAITMD_CFRSL_MK(n)		(((Uint16)(n) & 0x0001u) << _EMIF_BUSWAITMD_CFRSL_SHIFT)
#define _EMIF_BUSWAITMD_CFRSL_MASK			(_EMIF_BUSWAITMD_CFRSL_MK(0x0001u))
#define _EMIF_BUSWAITMD_CFRSL_CLR			(~(_EMIF_BUSWAITMD_CFRSL_MASK))

#define _EMIF_BUSWAITMD_CFRW_SHIFT		(0)
#define _EMIF_BUSWAITMD_CFRW_MK(n)		((Uint16)(n) & 0x0001u) 
#define _EMIF_BUSWAITMD_CFRW_MASK			(_EMIF_BUSWAITMD_CFRW_MK(0x0001u))
#define _EMIF_BUSWAITMD_CFRW_CLR			(~(_EMIF_BUSWAITMD_CFRW_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for EMIF ECC1CP register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _EMIF_ECC1CP_GET()			_REG_GET(_EMIF_ECC1CP_ADDR)
#define _EMIF_ECC1CP_SET(Val)			_REG_SET(_EMIF_ECC1CP_ADDR, Val)
#define _EMIF_ECC1CP_AOI(AND,OR,INV)		_REG_AOI(_EMIF_ECC1CP_ADDR,AND,OR,INV)
#define _EMIF_ECC1CP_FGET(Field)			_FIELD_GET(_EMIF_ECC1CP_ADDR, _EMIF_ECC1CP_##Field##)
#define _EMIF_ECC1CP_FSET(Field, Val)		_FIELD_SET(_EMIF_ECC1CP_ADDR, _EMIF_ECC1CP_##Field##, Val)
#define _EMIF_ECC1CP_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_EMIF_ECC1CP_ADDR, _EMIF_ECC1CP_##Field##, AND, OR, INV)

#define _EMIF_ECC1CP_1CP_SHIFT		(2)
#define _EMIF_ECC1CP_1CP_MK(n)		(((Uint16)(n) & 0x003fu) << _EMIF_ECC1CP_1CP_SHIFT)
#define _EMIF_ECC1CP_1CP_MASK			(_EMIF_ECC1CP_1CP_MK(0x003fu))
#define _EMIF_ECC1CP_1CP_CLR			(~(_EMIF_ECC1CP_1CP_MASK))

#define _EMIF_ECC1CP_1RD1_SHIFT		(0)
#define _EMIF_ECC1CP_1RD1_MK(n)		((Uint16)(n) & 0x0003u) 
#define _EMIF_ECC1CP_1RD1_MASK			(_EMIF_ECC1CP_1RD1_MK(0x0003u))
#define _EMIF_ECC1CP_1RD1_CLR			(~(_EMIF_ECC1CP_1RD1_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for EMIF ECC1LP register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _EMIF_ECC1LP_GET()			_REG_GET(_EMIF_ECC1LP_ADDR)
#define _EMIF_ECC1LP_SET(Val)			_REG_SET(_EMIF_ECC1LP_ADDR, Val)
#define _EMIF_ECC1LP_AOI(AND,OR,INV)		_REG_AOI(_EMIF_ECC1LP_ADDR,AND,OR,INV)



/*------------------------------------------------------------------------------*
* Register Macros for EMIF ECC2CP register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/