csl_clkchal_270.h

dm270 source code

#define _CLKC_MOD2_FGET(Field)			_FIELD_GET(_CLKC_MOD2_ADDR, _CLKC_MOD2_##Field##)
#define _CLKC_MOD2_FSET(Field, Val)		_FIELD_SET(_CLKC_MOD2_ADDR, _CLKC_MOD2_##Field##, Val)
#define _CLKC_MOD2_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CLKC_MOD2_ADDR, _CLKC_MOD2_##Field##, AND, OR, INV)

#define _CLKC_MOD2_CI2C_SHIFT		(13)
#define _CLKC_MOD2_CI2C_MK(n)		(((Uint16)(n) & 0x0001u) << _CLKC_MOD2_CI2C_SHIFT)
#define _CLKC_MOD2_CI2C_MASK			(_CLKC_MOD2_CI2C_MK(0x0001u))
#define _CLKC_MOD2_CI2C_CLR			(~(_CLKC_MOD2_CI2C_MASK))

#define _CLKC_MOD2_TEST_SHIFT		(12)
#define _CLKC_MOD2_TEST_MK(n)		(((Uint16)(n) & 0x0001u) << _CLKC_MOD2_TEST_SHIFT)
#define _CLKC_MOD2_TEST_MASK			(_CLKC_MOD2_TEST_MK(0x0001u))
#define _CLKC_MOD2_TEST_CLR			(~(_CLKC_MOD2_TEST_MASK))

#define _CLKC_MOD2_CMMC_SHIFT		(11)
#define _CLKC_MOD2_CMMC_MK(n)		(((Uint16)(n) & 0x0001u) << _CLKC_MOD2_CMMC_SHIFT)
#define _CLKC_MOD2_CMMC_MASK			(_CLKC_MOD2_CMMC_MK(0x0001u))
#define _CLKC_MOD2_CMMC_CLR			(~(_CLKC_MOD2_CMMC_MASK))

#define _CLKC_MOD2_CSIF1_SHIFT		(10)
#define _CLKC_MOD2_CSIF1_MK(n)		(((Uint16)(n) & 0x0001u) << _CLKC_MOD2_CSIF1_SHIFT)
#define _CLKC_MOD2_CSIF1_MASK			(_CLKC_MOD2_CSIF1_MK(0x0001u))
#define _CLKC_MOD2_CSIF1_CLR			(~(_CLKC_MOD2_CSIF1_MASK))

#define _CLKC_MOD2_CSIF0_SHIFT		(9)
#define _CLKC_MOD2_CSIF0_MK(n)		(((Uint16)(n) & 0x0001u) << _CLKC_MOD2_CSIF0_SHIFT)
#define _CLKC_MOD2_CSIF0_MASK			(_CLKC_MOD2_CSIF0_MK(0x0001u))
#define _CLKC_MOD2_CSIF0_CLR			(~(_CLKC_MOD2_CSIF0_MASK))

#define _CLKC_MOD2_CUAT1_SHIFT		(8)
#define _CLKC_MOD2_CUAT1_MK(n)		(((Uint16)(n) & 0x0001u) << _CLKC_MOD2_CUAT1_SHIFT)
#define _CLKC_MOD2_CUAT1_MASK			(_CLKC_MOD2_CUAT1_MK(0x0001u))
#define _CLKC_MOD2_CUAT1_CLR			(~(_CLKC_MOD2_CUAT1_MASK))

#define _CLKC_MOD2_CUAT0_SHIFT		(7)
#define _CLKC_MOD2_CUAT0_MK(n)		(((Uint16)(n) & 0x0001u) << _CLKC_MOD2_CUAT0_SHIFT)
#define _CLKC_MOD2_CUAT0_MASK			(_CLKC_MOD2_CUAT0_MK(0x0001u))
#define _CLKC_MOD2_CUAT0_CLR			(~(_CLKC_MOD2_CUAT0_MASK))

#define _CLKC_MOD2_CUSB_SHIFT		(6)
#define _CLKC_MOD2_CUSB_MK(n)		(((Uint16)(n) & 0x0001u) << _CLKC_MOD2_CUSB_SHIFT)
#define _CLKC_MOD2_CUSB_MASK			(_CLKC_MOD2_CUSB_MK(0x0001u))
#define _CLKC_MOD2_CUSB_CLR			(~(_CLKC_MOD2_CUSB_MASK))

#define _CLKC_MOD2_CGIO_SHIFT		(5)
#define _CLKC_MOD2_CGIO_MK(n)		(((Uint16)(n) & 0x0001u) << _CLKC_MOD2_CGIO_SHIFT)
#define _CLKC_MOD2_CGIO_MASK			(_CLKC_MOD2_CGIO_MK(0x0001u))
#define _CLKC_MOD2_CGIO_CLR			(~(_CLKC_MOD2_CGIO_MASK))

#define _CLKC_MOD2_CTMR3_SHIFT		(4)
#define _CLKC_MOD2_CTMR3_MK(n)		(((Uint16)(n) & 0x0001u) << _CLKC_MOD2_CTMR3_SHIFT)
#define _CLKC_MOD2_CTMR3_MASK			(_CLKC_MOD2_CTMR3_MK(0x0001u))
#define _CLKC_MOD2_CTMR3_CLR			(~(_CLKC_MOD2_CTMR3_MASK))

#define _CLKC_MOD2_CTMR2_SHIFT		(3)
#define _CLKC_MOD2_CTMR2_MK(n)		(((Uint16)(n) & 0x0001u) << _CLKC_MOD2_CTMR2_SHIFT)
#define _CLKC_MOD2_CTMR2_MASK			(_CLKC_MOD2_CTMR2_MK(0x0001u))
#define _CLKC_MOD2_CTMR2_CLR			(~(_CLKC_MOD2_CTMR2_MASK))

#define _CLKC_MOD2_CTMR1_SHIFT		(2)
#define _CLKC_MOD2_CTMR1_MK(n)		(((Uint16)(n) & 0x0001u) << _CLKC_MOD2_CTMR1_SHIFT)
#define _CLKC_MOD2_CTMR1_MASK			(_CLKC_MOD2_CTMR1_MK(0x0001u))
#define _CLKC_MOD2_CTMR1_CLR			(~(_CLKC_MOD2_CTMR1_MASK))

#define _CLKC_MOD2_CTMR0_SHIFT		(1)
#define _CLKC_MOD2_CTMR0_MK(n)		(((Uint16)(n) & 0x0001u) << _CLKC_MOD2_CTMR0_SHIFT)
#define _CLKC_MOD2_CTMR0_MASK			(_CLKC_MOD2_CTMR0_MK(0x0001u))
#define _CLKC_MOD2_CTMR0_CLR			(~(_CLKC_MOD2_CTMR0_MASK))

#define _CLKC_MOD2_CWDT_SHIFT		(0)
#define _CLKC_MOD2_CWDT_MK(n)		((Uint16)(n) & 0x0001u) 
#define _CLKC_MOD2_CWDT_MASK			(_CLKC_MOD2_CWDT_MK(0x0001u))
#define _CLKC_MOD2_CWDT_CLR			(~(_CLKC_MOD2_CWDT_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CLKC LPCTL0 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CLKC_LPCTL0_GET()			_REG_GET(_CLKC_LPCTL0_ADDR)
#define _CLKC_LPCTL0_SET(Val)			_REG_SET(_CLKC_LPCTL0_ADDR, Val)
#define _CLKC_LPCTL0_AOI(AND,OR,INV)		_REG_AOI(_CLKC_LPCTL0_ADDR,AND,OR,INV)
#define _CLKC_LPCTL0_FGET(Field)			_FIELD_GET(_CLKC_LPCTL0_ADDR, _CLKC_LPCTL0_##Field##)
#define _CLKC_LPCTL0_FSET(Field, Val)		_FIELD_SET(_CLKC_LPCTL0_ADDR, _CLKC_LPCTL0_##Field##, Val)
#define _CLKC_LPCTL0_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CLKC_LPCTL0_ADDR, _CLKC_LPCTL0_##Field##, AND, OR, INV)

#define _CLKC_LPCTL0_SLPMD_SHIFT		(0)
#define _CLKC_LPCTL0_SLPMD_MK(n)		((Uint16)(n) & 0x0001u) 
#define _CLKC_LPCTL0_SLPMD_MASK			(_CLKC_LPCTL0_SLPMD_MK(0x0001u))
#define _CLKC_LPCTL0_SLPMD_CLR			(~(_CLKC_LPCTL0_SLPMD_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CLKC LPCTL1 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CLKC_LPCTL1_GET()			_REG_GET(_CLKC_LPCTL1_ADDR)
#define _CLKC_LPCTL1_SET(Val)			_REG_SET(_CLKC_LPCTL1_ADDR, Val)
#define _CLKC_LPCTL1_AOI(AND,OR,INV)		_REG_AOI(_CLKC_LPCTL1_ADDR,AND,OR,INV)
#define _CLKC_LPCTL1_FGET(Field)			_FIELD_GET(_CLKC_LPCTL1_ADDR, _CLKC_LPCTL1_##Field##)
#define _CLKC_LPCTL1_FSET(Field, Val)		_FIELD_SET(_CLKC_LPCTL1_ADDR, _CLKC_LPCTL1_##Field##, Val)
#define _CLKC_LPCTL1_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CLKC_LPCTL1_ADDR, _CLKC_LPCTL1_##Field##, AND, OR, INV)

#define _CLKC_LPCTL1_PDMD_SHIFT		(1)
#define _CLKC_LPCTL1_PDMD_MK(n)		(((Uint16)(n) & 0x0001u) << _CLKC_LPCTL1_PDMD_SHIFT)
#define _CLKC_LPCTL1_PDMD_MASK			(_CLKC_LPCTL1_PDMD_MK(0x0001u))
#define _CLKC_LPCTL1_PDMD_CLR			(~(_CLKC_LPCTL1_PDMD_MASK))

#define _CLKC_LPCTL1_OSC48_SHIFT		(0)
#define _CLKC_LPCTL1_OSC48_MK(n)		((Uint16)(n) & 0x0001u) 
#define _CLKC_LPCTL1_OSC48_MASK			(_CLKC_LPCTL1_OSC48_MK(0x0001u))
#define _CLKC_LPCTL1_OSC48_CLR			(~(_CLKC_LPCTL1_OSC48_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CLKC OSEL register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CLKC_OSEL_GET()			_REG_GET(_CLKC_OSEL_ADDR)
#define _CLKC_OSEL_SET(Val)			_REG_SET(_CLKC_OSEL_ADDR, Val)
#define _CLKC_OSEL_AOI(AND,OR,INV)		_REG_AOI(_CLKC_OSEL_ADDR,AND,OR,INV)
#define _CLKC_OSEL_FGET(Field)			_FIELD_GET(_CLKC_OSEL_ADDR, _CLKC_OSEL_##Field##)
#define _CLKC_OSEL_FSET(Field, Val)		_FIELD_SET(_CLKC_OSEL_ADDR, _CLKC_OSEL_##Field##, Val)
#define _CLKC_OSEL_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CLKC_OSEL_ADDR, _CLKC_OSEL_##Field##, AND, OR, INV)

#define _CLKC_OSEL_O2SEL_SHIFT		(8)
#define _CLKC_OSEL_O2SEL_MK(n)		(((Uint16)(n) & 0x0007u) << _CLKC_OSEL_O2SEL_SHIFT)
#define _CLKC_OSEL_O2SEL_MASK			(_CLKC_OSEL_O2SEL_MK(0x0007u))
#define _CLKC_OSEL_O2SEL_CLR			(~(_CLKC_OSEL_O2SEL_MASK))

#define _CLKC_OSEL_O1SEL_SHIFT		(4)
#define _CLKC_OSEL_O1SEL_MK(n)		(((Uint16)(n) & 0x0007u) << _CLKC_OSEL_O1SEL_SHIFT)
#define _CLKC_OSEL_O1SEL_MASK			(_CLKC_OSEL_O1SEL_MK(0x0007u))
#define _CLKC_OSEL_O1SEL_CLR			(~(_CLKC_OSEL_O1SEL_MASK))

#define _CLKC_OSEL_O0SEL_SHIFT		(0)
#define _CLKC_OSEL_O0SEL_MK(n)		((Uint16)(n) & 0x0007u) 
#define _CLKC_OSEL_O0SEL_MASK			(_CLKC_OSEL_O0SEL_MK(0x0007u))
#define _CLKC_OSEL_O0SEL_CLR			(~(_CLKC_OSEL_O0SEL_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CLKC O0DIV register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CLKC_O0DIV_GET()			_REG_GET(_CLKC_O0DIV_ADDR)
#define _CLKC_O0DIV_SET(Val)			_REG_SET(_CLKC_O0DIV_ADDR, Val)
#define _CLKC_O0DIV_AOI(AND,OR,INV)		_REG_AOI(_CLKC_O0DIV_ADDR,AND,OR,INV)



/*------------------------------------------------------------------------------*
* Register Macros for CLKC O1DIV register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CLKC_O1DIV_GET()			_REG_GET(_CLKC_O1DIV_ADDR)
#define _CLKC_O1DIV_SET(Val)			_REG_SET(_CLKC_O1DIV_ADDR, Val)
#define _CLKC_O1DIV_AOI(AND,OR,INV)		_REG_AOI(_CLKC_O1DIV_ADDR,AND,OR,INV)



/*------------------------------------------------------------------------------*
* Register Macros for CLKC O2DIV register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CLKC_O2DIV_GET()			_REG_GET(_CLKC_O2DIV_ADDR)
#define _CLKC_O2DIV_SET(Val)			_REG_SET(_CLKC_O2DIV_ADDR, Val)
#define _CLKC_O2DIV_AOI(AND,OR,INV)		_REG_AOI(_CLKC_O2DIV_ADDR,AND,OR,INV)
#define _CLKC_O2DIV_FGET(Field)			_FIELD_GET(_CLKC_O2DIV_ADDR, _CLKC_O2DIV_##Field##)
#define _CLKC_O2DIV_FSET(Field, Val)		_FIELD_SET(_CLKC_O2DIV_ADDR, _CLKC_O2DIV_##Field##, Val)
#define _CLKC_O2DIV_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_CLKC_O2DIV_ADDR, _CLKC_O2DIV_##Field##, AND, OR, INV)

#define _CLKC_O2DIV_O2DV_SHIFT		(0)
#define _CLKC_O2DIV_O2DV_MK(n)		((Uint16)(n) & 0x000fu) 
#define _CLKC_O2DIV_O2DV_MASK			(_CLKC_O2DIV_O2DV_MK(0x000fu))
#define _CLKC_O2DIV_O2DV_CLR			(~(_CLKC_O2DIV_O2DV_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for CLKC PWM0C register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CLKC_PWM0C_GET()			_REG_GET(_CLKC_PWM0C_ADDR)
#define _CLKC_PWM0C_SET(Val)			_REG_SET(_CLKC_PWM0C_ADDR, Val)
#define _CLKC_PWM0C_AOI(AND,OR,INV)		_REG_AOI(_CLKC_PWM0C_ADDR,AND,OR,INV)



/*------------------------------------------------------------------------------*
* Register Macros for CLKC PWM0H register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CLKC_PWM0H_GET()			_REG_GET(_CLKC_PWM0H_ADDR)
#define _CLKC_PWM0H_SET(Val)			_REG_SET(_CLKC_PWM0H_ADDR, Val)
#define _CLKC_PWM0H_AOI(AND,OR,INV)		_REG_AOI(_CLKC_PWM0H_ADDR,AND,OR,INV)



/*------------------------------------------------------------------------------*
* Register Macros for CLKC PWM1C register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CLKC_PWM1C_GET()			_REG_GET(_CLKC_PWM1C_ADDR)
#define _CLKC_PWM1C_SET(Val)			_REG_SET(_CLKC_PWM1C_ADDR, Val)
#define _CLKC_PWM1C_AOI(AND,OR,INV)		_REG_AOI(_CLKC_PWM1C_ADDR,AND,OR,INV)



/*------------------------------------------------------------------------------*
* Register Macros for CLKC PWM1H register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _CLKC_PWM1H_GET()			_REG_GET(_CLKC_PWM1H_ADDR)
#define _CLKC_PWM1H_SET(Val)			_REG_SET(_CLKC_PWM1H_ADDR, Val)
#define _CLKC_PWM1H_AOI(AND,OR,INV)		_REG_AOI(_CLKC_PWM1H_ADDR,AND,OR,INV)