csl_prevhal_270.h

dm270 source code

#define _PREV_BLOFST1_BLB_MASK			(_PREV_BLOFST1_BLB_MK(0x00ffu))
#define _PREV_BLOFST1_BLB_CLR			(~(_PREV_BLOFST1_BLB_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for PREV MTXGAIN0 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _PREV_MTXGAIN0_GET()			_REG_GET(_PREV_MTXGAIN0_ADDR)
#define _PREV_MTXGAIN0_SET(Val)			_REG_SET(_PREV_MTXGAIN0_ADDR, Val)
#define _PREV_MTXGAIN0_AOI(AND,OR,INV)		_REG_AOI(_PREV_MTXGAIN0_ADDR,AND,OR,INV)
#define _PREV_MTXGAIN0_FGET(Field)			_FIELD_GET(_PREV_MTXGAIN0_ADDR, _PREV_MTXGAIN0_##Field##)
#define _PREV_MTXGAIN0_FSET(Field, Val)		_FIELD_SET(_PREV_MTXGAIN0_ADDR, _PREV_MTXGAIN0_##Field##, Val)
#define _PREV_MTXGAIN0_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_PREV_MTXGAIN0_ADDR, _PREV_MTXGAIN0_##Field##, AND, OR, INV)

#define _PREV_MTXGAIN0_MTXRR_SHIFT		(8)
#define _PREV_MTXGAIN0_MTXRR_MK(n)		(((Uint16)(n) & 0x00ffu) << _PREV_MTXGAIN0_MTXRR_SHIFT)
#define _PREV_MTXGAIN0_MTXRR_MASK			(_PREV_MTXGAIN0_MTXRR_MK(0x00ffu))
#define _PREV_MTXGAIN0_MTXRR_CLR			(~(_PREV_MTXGAIN0_MTXRR_MASK))

#define _PREV_MTXGAIN0_MTXGR_SHIFT		(0)
#define _PREV_MTXGAIN0_MTXGR_MK(n)		((Uint16)(n) & 0x00ffu) 
#define _PREV_MTXGAIN0_MTXGR_MASK			(_PREV_MTXGAIN0_MTXGR_MK(0x00ffu))
#define _PREV_MTXGAIN0_MTXGR_CLR			(~(_PREV_MTXGAIN0_MTXGR_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for PREV MTXGAIN1 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _PREV_MTXGAIN1_GET()			_REG_GET(_PREV_MTXGAIN1_ADDR)
#define _PREV_MTXGAIN1_SET(Val)			_REG_SET(_PREV_MTXGAIN1_ADDR, Val)
#define _PREV_MTXGAIN1_AOI(AND,OR,INV)		_REG_AOI(_PREV_MTXGAIN1_ADDR,AND,OR,INV)
#define _PREV_MTXGAIN1_FGET(Field)			_FIELD_GET(_PREV_MTXGAIN1_ADDR, _PREV_MTXGAIN1_##Field##)
#define _PREV_MTXGAIN1_FSET(Field, Val)		_FIELD_SET(_PREV_MTXGAIN1_ADDR, _PREV_MTXGAIN1_##Field##, Val)
#define _PREV_MTXGAIN1_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_PREV_MTXGAIN1_ADDR, _PREV_MTXGAIN1_##Field##, AND, OR, INV)

#define _PREV_MTXGAIN1_MTXBR_SHIFT		(8)
#define _PREV_MTXGAIN1_MTXBR_MK(n)		(((Uint16)(n) & 0x00ffu) << _PREV_MTXGAIN1_MTXBR_SHIFT)
#define _PREV_MTXGAIN1_MTXBR_MASK			(_PREV_MTXGAIN1_MTXBR_MK(0x00ffu))
#define _PREV_MTXGAIN1_MTXBR_CLR			(~(_PREV_MTXGAIN1_MTXBR_MASK))

#define _PREV_MTXGAIN1_MTXRG_SHIFT		(0)
#define _PREV_MTXGAIN1_MTXRG_MK(n)		((Uint16)(n) & 0x00ffu) 
#define _PREV_MTXGAIN1_MTXRG_MASK			(_PREV_MTXGAIN1_MTXRG_MK(0x00ffu))
#define _PREV_MTXGAIN1_MTXRG_CLR			(~(_PREV_MTXGAIN1_MTXRG_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for PREV MTXGAIN2 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _PREV_MTXGAIN2_GET()			_REG_GET(_PREV_MTXGAIN2_ADDR)
#define _PREV_MTXGAIN2_SET(Val)			_REG_SET(_PREV_MTXGAIN2_ADDR, Val)
#define _PREV_MTXGAIN2_AOI(AND,OR,INV)		_REG_AOI(_PREV_MTXGAIN2_ADDR,AND,OR,INV)
#define _PREV_MTXGAIN2_FGET(Field)			_FIELD_GET(_PREV_MTXGAIN2_ADDR, _PREV_MTXGAIN2_##Field##)
#define _PREV_MTXGAIN2_FSET(Field, Val)		_FIELD_SET(_PREV_MTXGAIN2_ADDR, _PREV_MTXGAIN2_##Field##, Val)
#define _PREV_MTXGAIN2_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_PREV_MTXGAIN2_ADDR, _PREV_MTXGAIN2_##Field##, AND, OR, INV)

#define _PREV_MTXGAIN2_MTXGG_SHIFT		(8)
#define _PREV_MTXGAIN2_MTXGG_MK(n)		(((Uint16)(n) & 0x00ffu) << _PREV_MTXGAIN2_MTXGG_SHIFT)
#define _PREV_MTXGAIN2_MTXGG_MASK			(_PREV_MTXGAIN2_MTXGG_MK(0x00ffu))
#define _PREV_MTXGAIN2_MTXGG_CLR			(~(_PREV_MTXGAIN2_MTXGG_MASK))

#define _PREV_MTXGAIN2_MTXBG_SHIFT		(0)
#define _PREV_MTXGAIN2_MTXBG_MK(n)		((Uint16)(n) & 0x00ffu) 
#define _PREV_MTXGAIN2_MTXBG_MASK			(_PREV_MTXGAIN2_MTXBG_MK(0x00ffu))
#define _PREV_MTXGAIN2_MTXBG_CLR			(~(_PREV_MTXGAIN2_MTXBG_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for PREV MTXGAIN3 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _PREV_MTXGAIN3_GET()			_REG_GET(_PREV_MTXGAIN3_ADDR)
#define _PREV_MTXGAIN3_SET(Val)			_REG_SET(_PREV_MTXGAIN3_ADDR, Val)
#define _PREV_MTXGAIN3_AOI(AND,OR,INV)		_REG_AOI(_PREV_MTXGAIN3_ADDR,AND,OR,INV)
#define _PREV_MTXGAIN3_FGET(Field)			_FIELD_GET(_PREV_MTXGAIN3_ADDR, _PREV_MTXGAIN3_##Field##)
#define _PREV_MTXGAIN3_FSET(Field, Val)		_FIELD_SET(_PREV_MTXGAIN3_ADDR, _PREV_MTXGAIN3_##Field##, Val)
#define _PREV_MTXGAIN3_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_PREV_MTXGAIN3_ADDR, _PREV_MTXGAIN3_##Field##, AND, OR, INV)

#define _PREV_MTXGAIN3_MTXRB_SHIFT		(8)
#define _PREV_MTXGAIN3_MTXRB_MK(n)		(((Uint16)(n) & 0x00ffu) << _PREV_MTXGAIN3_MTXRB_SHIFT)
#define _PREV_MTXGAIN3_MTXRB_MASK			(_PREV_MTXGAIN3_MTXRB_MK(0x00ffu))
#define _PREV_MTXGAIN3_MTXRB_CLR			(~(_PREV_MTXGAIN3_MTXRB_MASK))

#define _PREV_MTXGAIN3_MTXGB_SHIFT		(0)
#define _PREV_MTXGAIN3_MTXGB_MK(n)		((Uint16)(n) & 0x00ffu) 
#define _PREV_MTXGAIN3_MTXGB_MASK			(_PREV_MTXGAIN3_MTXGB_MK(0x00ffu))
#define _PREV_MTXGAIN3_MTXGB_CLR			(~(_PREV_MTXGAIN3_MTXGB_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for PREV MTXGAIN4 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _PREV_MTXGAIN4_GET()			_REG_GET(_PREV_MTXGAIN4_ADDR)
#define _PREV_MTXGAIN4_SET(Val)			_REG_SET(_PREV_MTXGAIN4_ADDR, Val)
#define _PREV_MTXGAIN4_AOI(AND,OR,INV)		_REG_AOI(_PREV_MTXGAIN4_ADDR,AND,OR,INV)
#define _PREV_MTXGAIN4_FGET(Field)			_FIELD_GET(_PREV_MTXGAIN4_ADDR, _PREV_MTXGAIN4_##Field##)
#define _PREV_MTXGAIN4_FSET(Field, Val)		_FIELD_SET(_PREV_MTXGAIN4_ADDR, _PREV_MTXGAIN4_##Field##, Val)
#define _PREV_MTXGAIN4_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_PREV_MTXGAIN4_ADDR, _PREV_MTXGAIN4_##Field##, AND, OR, INV)

#define _PREV_MTXGAIN4_MTXBB_SHIFT		(8)
#define _PREV_MTXGAIN4_MTXBB_MK(n)		(((Uint16)(n) & 0x00ffu) << _PREV_MTXGAIN4_MTXBB_SHIFT)
#define _PREV_MTXGAIN4_MTXBB_MASK			(_PREV_MTXGAIN4_MTXBB_MK(0x00ffu))
#define _PREV_MTXGAIN4_MTXBB_CLR			(~(_PREV_MTXGAIN4_MTXBB_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for PREV MTXOFST0 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _PREV_MTXOFST0_GET()			_REG_GET(_PREV_MTXOFST0_ADDR)
#define _PREV_MTXOFST0_SET(Val)			_REG_SET(_PREV_MTXOFST0_ADDR, Val)
#define _PREV_MTXOFST0_AOI(AND,OR,INV)		_REG_AOI(_PREV_MTXOFST0_ADDR,AND,OR,INV)
#define _PREV_MTXOFST0_FGET(Field)			_FIELD_GET(_PREV_MTXOFST0_ADDR, _PREV_MTXOFST0_##Field##)
#define _PREV_MTXOFST0_FSET(Field, Val)		_FIELD_SET(_PREV_MTXOFST0_ADDR, _PREV_MTXOFST0_##Field##, Val)
#define _PREV_MTXOFST0_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_PREV_MTXOFST0_ADDR, _PREV_MTXOFST0_##Field##, AND, OR, INV)

#define _PREV_MTXOFST0_MXR_SHIFT		(0)
#define _PREV_MTXOFST0_MXR_MK(n)		((Uint16)(n) & 0x03ffu) 
#define _PREV_MTXOFST0_MXR_MASK			(_PREV_MTXOFST0_MXR_MK(0x03ffu))
#define _PREV_MTXOFST0_MXR_CLR			(~(_PREV_MTXOFST0_MXR_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for PREV MTXOFST1 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _PREV_MTXOFST1_GET()			_REG_GET(_PREV_MTXOFST1_ADDR)
#define _PREV_MTXOFST1_SET(Val)			_REG_SET(_PREV_MTXOFST1_ADDR, Val)
#define _PREV_MTXOFST1_AOI(AND,OR,INV)		_REG_AOI(_PREV_MTXOFST1_ADDR,AND,OR,INV)
#define _PREV_MTXOFST1_FGET(Field)			_FIELD_GET(_PREV_MTXOFST1_ADDR, _PREV_MTXOFST1_##Field##)
#define _PREV_MTXOFST1_FSET(Field, Val)		_FIELD_SET(_PREV_MTXOFST1_ADDR, _PREV_MTXOFST1_##Field##, Val)
#define _PREV_MTXOFST1_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_PREV_MTXOFST1_ADDR, _PREV_MTXOFST1_##Field##, AND, OR, INV)

#define _PREV_MTXOFST1_MXG_SHIFT		(0)
#define _PREV_MTXOFST1_MXG_MK(n)		((Uint16)(n) & 0x03ffu) 
#define _PREV_MTXOFST1_MXG_MASK			(_PREV_MTXOFST1_MXG_MK(0x03ffu))
#define _PREV_MTXOFST1_MXG_CLR			(~(_PREV_MTXOFST1_MXG_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for PREV MTXOFST2 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _PREV_MTXOFST2_GET()			_REG_GET(_PREV_MTXOFST2_ADDR)
#define _PREV_MTXOFST2_SET(Val)			_REG_SET(_PREV_MTXOFST2_ADDR, Val)
#define _PREV_MTXOFST2_AOI(AND,OR,INV)		_REG_AOI(_PREV_MTXOFST2_ADDR,AND,OR,INV)
#define _PREV_MTXOFST2_FGET(Field)			_FIELD_GET(_PREV_MTXOFST2_ADDR, _PREV_MTXOFST2_##Field##)
#define _PREV_MTXOFST2_FSET(Field, Val)		_FIELD_SET(_PREV_MTXOFST2_ADDR, _PREV_MTXOFST2_##Field##, Val)
#define _PREV_MTXOFST2_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_PREV_MTXOFST2_ADDR, _PREV_MTXOFST2_##Field##, AND, OR, INV)

#define _PREV_MTXOFST2_MXB_SHIFT		(0)
#define _PREV_MTXOFST2_MXB_MK(n)		((Uint16)(n) & 0x03ffu) 
#define _PREV_MTXOFST2_MXB_MASK			(_PREV_MTXOFST2_MXB_MK(0x03ffu))
#define _PREV_MTXOFST2_MXB_CLR			(~(_PREV_MTXOFST2_MXB_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for PREV GAMTSBYP register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _PREV_GAMTSBYP_GET()			_REG_GET(_PREV_GAMTSBYP_ADDR)
#define _PREV_GAMTSBYP_SET(Val)			_REG_SET(_PREV_GAMTSBYP_ADDR, Val)
#define _PREV_GAMTSBYP_AOI(AND,OR,INV)		_REG_AOI(_PREV_GAMTSBYP_ADDR,AND,OR,INV)
#define _PREV_GAMTSBYP_FGET(Field)			_FIELD_GET(_PREV_GAMTSBYP_ADDR, _PREV_GAMTSBYP_##Field##)
#define _PREV_GAMTSBYP_FSET(Field, Val)		_FIELD_SET(_PREV_GAMTSBYP_ADDR, _PREV_GAMTSBYP_##Field##, Val)
#define _PREV_GAMTSBYP_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_PREV_GAMTSBYP_ADDR, _PREV_GAMTSBYP_##Field##, AND, OR, INV)

#define _PREV_GAMTSBYP_TBSEL_SHIFT		(3)
#define _PREV_GAMTSBYP_TBSEL_MK(n)		(((Uint16)(n) & 0x0001u) << _PREV_GAMTSBYP_TBSEL_SHIFT)
#define _PREV_GAMTSBYP_TBSEL_MASK			(_PREV_GAMTSBYP_TBSEL_MK(0x0001u))
#define _PREV_GAMTSBYP_TBSEL_CLR			(~(_PREV_GAMTSBYP_TBSEL_MASK))

#define _PREV_GAMTSBYP_BYPR_SHIFT		(2)
#define _PREV_GAMTSBYP_BYPR_MK(n)		(((Uint16)(n) & 0x0001u) << _PREV_GAMTSBYP_BYPR_SHIFT)
#define _PREV_GAMTSBYP_BYPR_MASK			(_PREV_GAMTSBYP_BYPR_MK(0x0001u))
#define _PREV_GAMTSBYP_BYPR_CLR			(~(_PREV_GAMTSBYP_BYPR_MASK))

#define _PREV_GAMTSBYP_BYPG_SHIFT		(1)
#define _PREV_GAMTSBYP_BYPG_MK(n)		(((Uint16)(n) & 0x0001u) << _PREV_GAMTSBYP_BYPG_SHIFT)
#define _PREV_GAMTSBYP_BYPG_MASK			(_PREV_GAMTSBYP_BYPG_MK(0x0001u))
#define _PREV_GAMTSBYP_BYPG_CLR			(~(_PREV_GAMTSBYP_BYPG_MASK))

#define _PREV_GAMTSBYP_BYPB_SHIFT		(0)
#define _PREV_GAMTSBYP_BYPB_MK(n)		((Uint16)(n) & 0x0001u) 
#define _PREV_GAMTSBYP_BYPB_MASK			(_PREV_GAMTSBYP_BYPB_MK(0x0001u))
#define _PREV_GAMTSBYP_BYPB_CLR			(~(_PREV_GAMTSBYP_BYPB_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for PREV CSC0 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _PREV_CSC0_GET()			_REG_GET(_PREV_CSC0_ADDR)
#define _PREV_CSC0_SET(Val)			_REG_SET(_PREV_CSC0_ADDR, Val)
#define _PREV_CSC0_AOI(AND,OR,INV)		_REG_AOI(_PREV_CSC0_ADDR,AND,OR,INV)
#define _PREV_CSC0_FGET(Field)			_FIELD_GET(_PREV_CSC0_ADDR, _PREV_CSC0_##Field##)
#define _PREV_CSC0_FSET(Field, Val)		_FIELD_SET(_PREV_CSC0_ADDR, _PREV_CSC0_##Field##, Val)
#define _PREV_CSC0_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_PREV_CSC0_ADDR, _PREV_CSC0_##Field##, AND, OR, INV)

#define _PREV_CSC0_CSCRY_SHIFT		(8)
#define _PREV_CSC0_CSCRY_MK(n)		(((Uint16)(n) & 0x00ffu) << _PREV_CSC0_CSCRY_SHIFT)
#define _PREV_CSC0_CSCRY_MASK			(_PREV_CSC0_CSCRY_MK(0x00ffu))
#define _PREV_CSC0_CSCRY_CLR			(~(_PREV_CSC0_CSCRY_MASK))

#define _PREV_CSC0_CSCGY_SHIFT		(0)
#define _PREV_CSC0_CSCGY_MK(n)		((Uint16)(n) & 0x00ffu) 
#define _PREV_CSC0_CSCGY_MASK			(_PREV_CSC0_CSCGY_MK(0x00ffu))
#define _PREV_CSC0_CSCGY_CLR			(~(_PREV_CSC0_CSCGY_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for PREV CSC1 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _PREV_CSC1_GET()			_REG_GET(_PREV_CSC1_ADDR)