csl_osdhal_270.h

dm270 source code

/*   
 *  Copyright 2001 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 */
/******************************************************************************\
*           Copyright (C) 2001 Texas Instruments Incorporated.
*                           All Rights Reserved
*------------------------------------------------------------------------------
* MODULE.NAME... OSD - HAL configuration module
* FILENAME...... /vobs/DSC_RTOS/arm/project/dm270/include/csl/csl_osdhal_270.h
* PROJECT....... ARM Chip Support Library
* COMPONENT..... HAL
* IMPORTS....... 
*------------------------------------------------------------------------------
* HISTORY:
*   CREATED:       12/06/2001 
*------------------------------------------------------------------------------
* DESCRIPTION:  (CHIP memory mapped register definitions)
*
*
*
\******************************************************************************/



/*-----------------------------------------------------------------------------------*
* Register Macros for OSD:
*------------------------------------------------------------------------------------*/


/*------------------------------------------------------------------------------*
* Register Macros for OSD OSDMODE register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _OSD_OSDMODE_GET()			_REG_GET(_OSD_OSDMODE_ADDR)
#define _OSD_OSDMODE_SET(Val)			_REG_SET(_OSD_OSDMODE_ADDR, Val)
#define _OSD_OSDMODE_AOI(AND,OR,INV)		_REG_AOI(_OSD_OSDMODE_ADDR,AND,OR,INV)
#define _OSD_OSDMODE_FGET(Field)			_FIELD_GET(_OSD_OSDMODE_ADDR, _OSD_OSDMODE_##Field##)
#define _OSD_OSDMODE_FSET(Field, Val)		_FIELD_SET(_OSD_OSDMODE_ADDR, _OSD_OSDMODE_##Field##, Val)
#define _OSD_OSDMODE_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_OSD_OSDMODE_ADDR, _OSD_OSDMODE_##Field##, AND, OR, INV)

#define _OSD_OSDMODE_CS_SHIFT		(15)
#define _OSD_OSDMODE_CS_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_OSDMODE_CS_SHIFT)
#define _OSD_OSDMODE_CS_MASK			(_OSD_OSDMODE_CS_MK(0x0001u))
#define _OSD_OSDMODE_CS_CLR			(~(_OSD_OSDMODE_CS_MASK))

#define _OSD_OSDMODE_ORSZ_SHIFT		(14)
#define _OSD_OSDMODE_ORSZ_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_OSDMODE_ORSZ_SHIFT)
#define _OSD_OSDMODE_ORSZ_MASK			(_OSD_OSDMODE_ORSZ_MK(0x0001u))
#define _OSD_OSDMODE_ORSZ_CLR			(~(_OSD_OSDMODE_ORSZ_MASK))

#define _OSD_OSDMODE_FSINV_SHIFT		(13)
#define _OSD_OSDMODE_FSINV_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_OSDMODE_FSINV_SHIFT)
#define _OSD_OSDMODE_FSINV_MASK			(_OSD_OSDMODE_FSINV_MK(0x0001u))
#define _OSD_OSDMODE_FSINV_CLR			(~(_OSD_OSDMODE_FSINV_MASK))

#define _OSD_OSDMODE_EF_SHIFT		(12)
#define _OSD_OSDMODE_EF_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_OSDMODE_EF_SHIFT)
#define _OSD_OSDMODE_EF_MASK			(_OSD_OSDMODE_EF_MK(0x0001u))
#define _OSD_OSDMODE_EF_CLR			(~(_OSD_OSDMODE_EF_MASK))

#define _OSD_OSDMODE_VVRSZ_SHIFT		(11)
#define _OSD_OSDMODE_VVRSZ_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_OSDMODE_VVRSZ_SHIFT)
#define _OSD_OSDMODE_VVRSZ_MASK			(_OSD_OSDMODE_VVRSZ_MK(0x0001u))
#define _OSD_OSDMODE_VVRSZ_CLR			(~(_OSD_OSDMODE_VVRSZ_MASK))

#define _OSD_OSDMODE_VHRSZ_SHIFT		(10)
#define _OSD_OSDMODE_VHRSZ_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_OSDMODE_VHRSZ_SHIFT)
#define _OSD_OSDMODE_VHRSZ_MASK			(_OSD_OSDMODE_VHRSZ_MK(0x0001u))
#define _OSD_OSDMODE_VHRSZ_CLR			(~(_OSD_OSDMODE_VHRSZ_MASK))

#define _OSD_OSDMODE_BCLUT_SHIFT		(8)
#define _OSD_OSDMODE_BCLUT_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_OSDMODE_BCLUT_SHIFT)
#define _OSD_OSDMODE_BCLUT_MASK			(_OSD_OSDMODE_BCLUT_MK(0x0001u))
#define _OSD_OSDMODE_BCLUT_CLR			(~(_OSD_OSDMODE_BCLUT_MASK))

#define _OSD_OSDMODE_CABG_SHIFT		(0)
#define _OSD_OSDMODE_CABG_MK(n)		((Uint16)(n) & 0x00ffu) 
#define _OSD_OSDMODE_CABG_MASK			(_OSD_OSDMODE_CABG_MK(0x00ffu))
#define _OSD_OSDMODE_CABG_CLR			(~(_OSD_OSDMODE_CABG_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for OSD VIDWINMD register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _OSD_VIDWINMD_GET()			_REG_GET(_OSD_VIDWINMD_ADDR)
#define _OSD_VIDWINMD_SET(Val)			_REG_SET(_OSD_VIDWINMD_ADDR, Val)
#define _OSD_VIDWINMD_AOI(AND,OR,INV)		_REG_AOI(_OSD_VIDWINMD_ADDR,AND,OR,INV)
#define _OSD_VIDWINMD_FGET(Field)			_FIELD_GET(_OSD_VIDWINMD_ADDR, _OSD_VIDWINMD_##Field##)
#define _OSD_VIDWINMD_FSET(Field, Val)		_FIELD_SET(_OSD_VIDWINMD_ADDR, _OSD_VIDWINMD_##Field##, Val)
#define _OSD_VIDWINMD_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_OSD_VIDWINMD_ADDR, _OSD_VIDWINMD_##Field##, AND, OR, INV)

#define _OSD_VIDWINMD_VHZ1_SHIFT		(12)
#define _OSD_VIDWINMD_VHZ1_MK(n)		(((Uint16)(n) & 0x0003u) << _OSD_VIDWINMD_VHZ1_SHIFT)
#define _OSD_VIDWINMD_VHZ1_MASK			(_OSD_VIDWINMD_VHZ1_MK(0x0003u))
#define _OSD_VIDWINMD_VHZ1_CLR			(~(_OSD_VIDWINMD_VHZ1_MASK))

#define _OSD_VIDWINMD_VVZ1_SHIFT		(10)
#define _OSD_VIDWINMD_VVZ1_MK(n)		(((Uint16)(n) & 0x0003u) << _OSD_VIDWINMD_VVZ1_SHIFT)
#define _OSD_VIDWINMD_VVZ1_MASK			(_OSD_VIDWINMD_VVZ1_MK(0x0003u))
#define _OSD_VIDWINMD_VVZ1_CLR			(~(_OSD_VIDWINMD_VVZ1_MASK))

#define _OSD_VIDWINMD_VFF1_SHIFT		(9)
#define _OSD_VIDWINMD_VFF1_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_VIDWINMD_VFF1_SHIFT)
#define _OSD_VIDWINMD_VFF1_MASK			(_OSD_VIDWINMD_VFF1_MK(0x0001u))
#define _OSD_VIDWINMD_VFF1_CLR			(~(_OSD_VIDWINMD_VFF1_MASK))

#define _OSD_VIDWINMD_ACT1_SHIFT		(8)
#define _OSD_VIDWINMD_ACT1_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_VIDWINMD_ACT1_SHIFT)
#define _OSD_VIDWINMD_ACT1_MASK			(_OSD_VIDWINMD_ACT1_MK(0x0001u))
#define _OSD_VIDWINMD_ACT1_CLR			(~(_OSD_VIDWINMD_ACT1_MASK))

#define _OSD_VIDWINMD_VHZ0_SHIFT		(4)
#define _OSD_VIDWINMD_VHZ0_MK(n)		(((Uint16)(n) & 0x0003u) << _OSD_VIDWINMD_VHZ0_SHIFT)
#define _OSD_VIDWINMD_VHZ0_MASK			(_OSD_VIDWINMD_VHZ0_MK(0x0003u))
#define _OSD_VIDWINMD_VHZ0_CLR			(~(_OSD_VIDWINMD_VHZ0_MASK))

#define _OSD_VIDWINMD_VVZ0_SHIFT		(2)
#define _OSD_VIDWINMD_VVZ0_MK(n)		(((Uint16)(n) & 0x0003u) << _OSD_VIDWINMD_VVZ0_SHIFT)
#define _OSD_VIDWINMD_VVZ0_MASK			(_OSD_VIDWINMD_VVZ0_MK(0x0003u))
#define _OSD_VIDWINMD_VVZ0_CLR			(~(_OSD_VIDWINMD_VVZ0_MASK))

#define _OSD_VIDWINMD_VFF0_SHIFT		(1)
#define _OSD_VIDWINMD_VFF0_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_VIDWINMD_VFF0_SHIFT)
#define _OSD_VIDWINMD_VFF0_MASK			(_OSD_VIDWINMD_VFF0_MK(0x0001u))
#define _OSD_VIDWINMD_VFF0_CLR			(~(_OSD_VIDWINMD_VFF0_MASK))

#define _OSD_VIDWINMD_ACT0_SHIFT		(0)
#define _OSD_VIDWINMD_ACT0_MK(n)		((Uint16)(n) & 0x0001u) 
#define _OSD_VIDWINMD_ACT0_MASK			(_OSD_VIDWINMD_ACT0_MK(0x0001u))
#define _OSD_VIDWINMD_ACT0_CLR			(~(_OSD_VIDWINMD_ACT0_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for OSD OSDWIN0MD register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _OSD_OSDWIN0MD_GET()			_REG_GET(_OSD_OSDWIN0MD_ADDR)
#define _OSD_OSDWIN0MD_SET(Val)			_REG_SET(_OSD_OSDWIN0MD_ADDR, Val)
#define _OSD_OSDWIN0MD_AOI(AND,OR,INV)		_REG_AOI(_OSD_OSDWIN0MD_ADDR,AND,OR,INV)
#define _OSD_OSDWIN0MD_FGET(Field)			_FIELD_GET(_OSD_OSDWIN0MD_ADDR, _OSD_OSDWIN0MD_##Field##)
#define _OSD_OSDWIN0MD_FSET(Field, Val)		_FIELD_SET(_OSD_OSDWIN0MD_ADDR, _OSD_OSDWIN0MD_##Field##, Val)
#define _OSD_OSDWIN0MD_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_OSD_OSDWIN0MD_ADDR, _OSD_OSDWIN0MD_##Field##, AND, OR, INV)

#define _OSD_OSDWIN0MD_CLUTS0_SHIFT		(12)
#define _OSD_OSDWIN0MD_CLUTS0_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_OSDWIN0MD_CLUTS0_SHIFT)
#define _OSD_OSDWIN0MD_CLUTS0_MASK			(_OSD_OSDWIN0MD_CLUTS0_MK(0x0001u))
#define _OSD_OSDWIN0MD_CLUTS0_CLR			(~(_OSD_OSDWIN0MD_CLUTS0_MASK))

#define _OSD_OSDWIN0MD_OHZ0_SHIFT		(10)
#define _OSD_OSDWIN0MD_OHZ0_MK(n)		(((Uint16)(n) & 0x0003u) << _OSD_OSDWIN0MD_OHZ0_SHIFT)
#define _OSD_OSDWIN0MD_OHZ0_MASK			(_OSD_OSDWIN0MD_OHZ0_MK(0x0003u))
#define _OSD_OSDWIN0MD_OHZ0_CLR			(~(_OSD_OSDWIN0MD_OHZ0_MASK))

#define _OSD_OSDWIN0MD_OVZ0_SHIFT		(8)
#define _OSD_OSDWIN0MD_OVZ0_MK(n)		(((Uint16)(n) & 0x0003u) << _OSD_OSDWIN0MD_OVZ0_SHIFT)
#define _OSD_OSDWIN0MD_OVZ0_MASK			(_OSD_OSDWIN0MD_OVZ0_MK(0x0003u))
#define _OSD_OSDWIN0MD_OVZ0_CLR			(~(_OSD_OSDWIN0MD_OVZ0_MASK))

#define _OSD_OSDWIN0MD_BMW0_SHIFT		(6)
#define _OSD_OSDWIN0MD_BMW0_MK(n)		(((Uint16)(n) & 0x0003u) << _OSD_OSDWIN0MD_BMW0_SHIFT)
#define _OSD_OSDWIN0MD_BMW0_MASK			(_OSD_OSDWIN0MD_BMW0_MK(0x0003u))
#define _OSD_OSDWIN0MD_BMW0_CLR			(~(_OSD_OSDWIN0MD_BMW0_MASK))

#define _OSD_OSDWIN0MD_BLND0_SHIFT		(3)
#define _OSD_OSDWIN0MD_BLND0_MK(n)		(((Uint16)(n) & 0x0007u) << _OSD_OSDWIN0MD_BLND0_SHIFT)
#define _OSD_OSDWIN0MD_BLND0_MASK			(_OSD_OSDWIN0MD_BLND0_MK(0x0007u))
#define _OSD_OSDWIN0MD_BLND0_CLR			(~(_OSD_OSDWIN0MD_BLND0_MASK))

#define _OSD_OSDWIN0MD_TE0_SHIFT		(2)
#define _OSD_OSDWIN0MD_TE0_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_OSDWIN0MD_TE0_SHIFT)
#define _OSD_OSDWIN0MD_TE0_MASK			(_OSD_OSDWIN0MD_TE0_MK(0x0001u))
#define _OSD_OSDWIN0MD_TE0_CLR			(~(_OSD_OSDWIN0MD_TE0_MASK))

#define _OSD_OSDWIN0MD_OFF0_SHIFT		(1)
#define _OSD_OSDWIN0MD_OFF0_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_OSDWIN0MD_OFF0_SHIFT)
#define _OSD_OSDWIN0MD_OFF0_MASK			(_OSD_OSDWIN0MD_OFF0_MK(0x0001u))
#define _OSD_OSDWIN0MD_OFF0_CLR			(~(_OSD_OSDWIN0MD_OFF0_MASK))

#define _OSD_OSDWIN0MD_OACT0_SHIFT		(0)
#define _OSD_OSDWIN0MD_OACT0_MK(n)		((Uint16)(n) & 0x0001u) 
#define _OSD_OSDWIN0MD_OACT0_MASK			(_OSD_OSDWIN0MD_OACT0_MK(0x0001u))
#define _OSD_OSDWIN0MD_OACT0_CLR			(~(_OSD_OSDWIN0MD_OACT0_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for OSD OSDWIN1MD register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _OSD_OSDWIN1MD_GET()			_REG_GET(_OSD_OSDWIN1MD_ADDR)
#define _OSD_OSDWIN1MD_SET(Val)			_REG_SET(_OSD_OSDWIN1MD_ADDR, Val)
#define _OSD_OSDWIN1MD_AOI(AND,OR,INV)		_REG_AOI(_OSD_OSDWIN1MD_ADDR,AND,OR,INV)
#define _OSD_OSDWIN1MD_FGET(Field)			_FIELD_GET(_OSD_OSDWIN1MD_ADDR, _OSD_OSDWIN1MD_##Field##)
#define _OSD_OSDWIN1MD_FSET(Field, Val)		_FIELD_SET(_OSD_OSDWIN1MD_ADDR, _OSD_OSDWIN1MD_##Field##, Val)
#define _OSD_OSDWIN1MD_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_OSD_OSDWIN1MD_ADDR, _OSD_OSDWIN1MD_##Field##, AND, OR, INV)

#define _OSD_OSDWIN1MD_OASW_SHIFT		(15)
#define _OSD_OSDWIN1MD_OASW_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_OSDWIN1MD_OASW_SHIFT)
#define _OSD_OSDWIN1MD_OASW_MASK			(_OSD_OSDWIN1MD_OASW_MK(0x0001u))
#define _OSD_OSDWIN1MD_OASW_CLR			(~(_OSD_OSDWIN1MD_OASW_MASK))

#define _OSD_OSDWIN1MD_CLUTS1_SHIFT		(12)
#define _OSD_OSDWIN1MD_CLUTS1_MK(n)		(((Uint16)(n) & 0x0001u) << _OSD_OSDWIN1MD_CLUTS1_SHIFT)
#define _OSD_OSDWIN1MD_CLUTS1_MASK			(_OSD_OSDWIN1MD_CLUTS1_MK(0x0001u))
#define _OSD_OSDWIN1MD_CLUTS1_CLR			(~(_OSD_OSDWIN1MD_CLUTS1_MASK))

#define _OSD_OSDWIN1MD_OHZ1_SHIFT		(10)
#define _OSD_OSDWIN1MD_OHZ1_MK(n)		(((Uint16)(n) & 0x0003u) << _OSD_OSDWIN1MD_OHZ1_SHIFT)
#define _OSD_OSDWIN1MD_OHZ1_MASK			(_OSD_OSDWIN1MD_OHZ1_MK(0x0003u))
#define _OSD_OSDWIN1MD_OHZ1_CLR			(~(_OSD_OSDWIN1MD_OHZ1_MASK))

#define _OSD_OSDWIN1MD_OVZ1_SHIFT		(8)
#define _OSD_OSDWIN1MD_OVZ1_MK(n)		(((Uint16)(n) & 0x0003u) << _OSD_OSDWIN1MD_OVZ1_SHIFT)
#define _OSD_OSDWIN1MD_OVZ1_MASK			(_OSD_OSDWIN1MD_OVZ1_MK(0x0003u))
#define _OSD_OSDWIN1MD_OVZ1_CLR			(~(_OSD_OSDWIN1MD_OVZ1_MASK))