sdramc.c

dm270 source code

/**
	\file sdramc.c
	\brief SDRAM controller user APIs
*/

#include <system/sdrc270.h>

static const Uint16 sdramSetupSequence[] = {
	SDRC_CTRLSEL_PREA, 
	SDRC_CTRLSEL_REF, SDRC_CTRLSEL_REF, SDRC_CTRLSEL_REF, SDRC_CTRLSEL_REF, 
	SDRC_CTRLSEL_REF, SDRC_CTRLSEL_REF, SDRC_CTRLSEL_REF, SDRC_CTRLSEL_REF, 
	SDRC_CTRLSEL_MSR,
	SDRC_CTRLSEL_NOP
};

static const SDRC_ConfigData sdramConfig = {
	SDRC_TRDL_2CYCLE,		// SDRC_TRDL_SELECT trdlSelect;          
	SDRC_BUSWID_32,			// SDRC_BUS_WIDTH   busWidth;            
	SDRC_TRCD_2CYCLE, 		// SDRC_TRCD_SELECT trcdSelect;          
	SDRC_BANKSELECT_4,		// SDRC_BANK_SELECT bankSelect;          
	SDRC_CASLATENCY_2,		// SDRC_CAS_LATENCY casLatency;          
	SDRC_MEMTYPE_8KX512W,	// SDRC_MEMORY_TYPE memoryType;          
	SDRC_DQMCTRL_FORCE,		// SDRC_DQM_CONTROL dqmControl;          
	FALSE,					// BOOL  autoPowerDownMode;      
	TRUE,					// BOOL  autoRefresh;            
	0x20,					// Uint16  autoRefreshInterval;  
	(Uint16*)sdramSetupSequence,		// Uint16 *setupSequence;        
	11						// Uint16  numSequenceSteps;     
};

/**
	\brief Initialize SDRAM on TI DM270 EVM

	See sdramc.c file to change default SDRAM initialization sequence

	\return if success E_PASS, else error code

*/
STATUS SDRAMInit() {
	STATUS status;

	status=SDRC_setConfig( (SDRC_ConfigData*)&sdramConfig );

	SDRC_setPriority( SDRC_IMG_BUF, SDRC_PRIORITY_10 );
	SDRC_setPriority( SDRC_AUTO_REF, SDRC_PRIORITY_9 );
	SDRC_enableUserDefinedPriority(TRUE);

	return status;
}