huang.vo

来自「东西和南北方向各有一组红、黄、绿灯用于指挥交通」· VO 代码 · 共 1,791 行 · 第 1/5 页

VO
1,791 行
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// atom is at LC5_E26
flex10ke_lcell \WideOr7~23_I (
// Equation(s):
// \WideOr7~23  = ge_left[3] & (ge_left[1] # ge_left[2])

	.dataa(vcc),
	.datab(ge_left[3]),
	.datac(ge_left[1]),
	.datad(ge_left[2]),
	.aclr(gnd),
	.aload(gnd),
	.clk(gnd),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\WideOr7~23 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \WideOr7~23_I .clock_enable_mode = "false";
defparam \WideOr7~23_I .lut_mask = "CCC0";
defparam \WideOr7~23_I .operation_mode = "normal";
defparam \WideOr7~23_I .output_mode = "comb_only";
defparam \WideOr7~23_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_E28
flex10ke_lcell \Selector9~36_I (
// Equation(s):
// \Selector9~36  = ge_left[1] & \led_seg[4]~reg0  # !ge_left[1] & (!ge_left[0])

	.dataa(vcc),
	.datab(\led_seg[4]~reg0 ),
	.datac(ge_left[1]),
	.datad(ge_left[0]),
	.aclr(gnd),
	.aload(gnd),
	.clk(gnd),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Selector9~36 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \Selector9~36_I .clock_enable_mode = "false";
defparam \Selector9~36_I .lut_mask = "C0CF";
defparam \Selector9~36_I .operation_mode = "normal";
defparam \Selector9~36_I .output_mode = "comb_only";
defparam \Selector9~36_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_E28
flex10ke_lcell \Selector22~36_I (
// Equation(s):
// \Selector22~36  = ge_right[1] & \led_seg[4]~reg0  # !ge_right[1] & (!ge_right[0])

	.dataa(vcc),
	.datab(\led_seg[4]~reg0 ),
	.datac(ge_right[1]),
	.datad(ge_right[0]),
	.aclr(gnd),
	.aload(gnd),
	.clk(gnd),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Selector22~36 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \Selector22~36_I .clock_enable_mode = "false";
defparam \Selector22~36_I .lut_mask = "C0CF";
defparam \Selector22~36_I .operation_mode = "normal";
defparam \Selector22~36_I .output_mode = "comb_only";
defparam \Selector22~36_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_A3
flex10ke_lcell \couta[0]~I (
// Equation(s):
// couta[0] = DFFEA(!couta[0], GLOBAL(\clk~dataout ), , , , , )
// \Add1|adder|result_node|cout [0] = CARRY(couta[0])

	.dataa(vcc),
	.datab(couta[0]),
	.datac(vcc),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.clk(\clk~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(couta[0]),
	.cout(\Add1|adder|result_node|cout [0]),
	.cascout());
// synopsys translate_off
defparam \couta[0]~I .clock_enable_mode = "false";
defparam \couta[0]~I .lut_mask = "33CC";
defparam \couta[0]~I .operation_mode = "arithmetic";
defparam \couta[0]~I .output_mode = "reg_only";
defparam \couta[0]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_A3
flex10ke_lcell \couta[2]~I (
// Equation(s):
// couta[2] = DFFEA(\Add1|adder|result_node|cs_buffer [2], GLOBAL(\clk~dataout ), , , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\Add1|adder|result_node|cs_buffer [2]),
	.aclr(gnd),
	.aload(gnd),
	.clk(\clk~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(couta[2]),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \couta[2]~I .clock_enable_mode = "false";
defparam \couta[2]~I .lut_mask = "FF00";
defparam \couta[2]~I .operation_mode = "normal";
defparam \couta[2]~I .output_mode = "reg_only";
defparam \couta[2]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A8
flex10ke_lcell \couta[1]~I (
// Equation(s):
// couta[1] = DFFEA(\Add1|adder|result_node|cs_buffer [1], GLOBAL(\clk~dataout ), , , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\Add1|adder|result_node|cs_buffer [1]),
	.aclr(gnd),
	.aload(gnd),
	.clk(\clk~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(couta[1]),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \couta[1]~I .clock_enable_mode = "false";
defparam \couta[1]~I .lut_mask = "FF00";
defparam \couta[1]~I .operation_mode = "normal";
defparam \couta[1]~I .output_mode = "reg_only";
defparam \couta[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A6
flex10ke_lcell \couta[4]~I (
// Equation(s):
// couta[4] = DFFEA(\Add1|adder|result_node|cs_buffer [4], GLOBAL(\clk~dataout ), , , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\Add1|adder|result_node|cs_buffer [4]),
	.aclr(gnd),
	.aload(gnd),
	.clk(\clk~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(couta[4]),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \couta[4]~I .clock_enable_mode = "false";
defparam \couta[4]~I .lut_mask = "FF00";
defparam \couta[4]~I .operation_mode = "normal";
defparam \couta[4]~I .output_mode = "reg_only";
defparam \couta[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_A1
flex10ke_lcell \couta[3]~I (
// Equation(s):
// couta[3] = DFFEA(\Add1|adder|result_node|cs_buffer [3] & !\Equal1~205 , GLOBAL(\clk~dataout ), , , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(\Add1|adder|result_node|cs_buffer [3]),
	.datad(\Equal1~205 ),
	.aclr(gnd),
	.aload(gnd),
	.clk(\clk~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(couta[3]),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \couta[3]~I .clock_enable_mode = "false";
defparam \couta[3]~I .lut_mask = "00F0";
defparam \couta[3]~I .operation_mode = "normal";
defparam \couta[3]~I .output_mode = "reg_only";
defparam \couta[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A3
flex10ke_lcell \Equal1~204_I (
// Equation(s):
// \Equal1~204  = couta[2] & couta[1] & !couta[4] & !couta[3]

	.dataa(couta[2]),
	.datab(couta[1]),
	.datac(couta[4]),
	.datad(couta[3]),
	.aclr(gnd),
	.aload(gnd),
	.clk(gnd),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Equal1~204 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \Equal1~204_I .clock_enable_mode = "false";
defparam \Equal1~204_I .lut_mask = "0008";
defparam \Equal1~204_I .operation_mode = "normal";
defparam \Equal1~204_I .output_mode = "comb_only";
defparam \Equal1~204_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_A9
flex10ke_lcell \Equal1~205_I (
// Equation(s):
// \Equal1~205  = \Equal1~216  & \Equal1~217  & couta[0] & \Equal1~204 

	.dataa(\Equal1~216 ),
	.datab(\Equal1~217 ),
	.datac(couta[0]),
	.datad(\Equal1~204 ),
	.aclr(gnd),
	.aload(gnd),
	.clk(gnd),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Equal1~205 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \Equal1~205_I .clock_enable_mode = "false";
defparam \Equal1~205_I .lut_mask = "8000";
defparam \Equal1~205_I .operation_mode = "normal";
defparam \Equal1~205_I .output_mode = "comb_only";
defparam \Equal1~205_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_F17
flex10ke_lcell \Add2|adder|result_node|cs_buffer[3]~I (
// Equation(s):
// \Add2|adder|result_node|cs_buffer [3] = seconds[3] $ \Add2|adder|result_node|cout [2]
// \Add2|adder|result_node|cout [3] = CARRY(seconds[3] & \Add2|adder|result_node|cout [2])

	.dataa(vcc),
	.datab(seconds[3]),
	.datac(vcc),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.clk(gnd),
	.cin(\Add2|adder|result_node|cout [2]),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Add2|adder|result_node|cs_buffer [3]),
	.regout(),
	.cout(\Add2|adder|result_node|cout [3]),
	.cascout());
// synopsys translate_off
defparam \Add2|adder|result_node|cs_buffer[3]~I .cin_used = "true";
defparam \Add2|adder|result_node|cs_buffer[3]~I .clock_enable_mode = "false";
defparam \Add2|adder|result_node|cs_buffer[3]~I .lut_mask = "3CC0";
defparam \Add2|adder|result_node|cs_buffer[3]~I .operation_mode = "arithmetic";
defparam \Add2|adder|result_node|cs_buffer[3]~I .output_mode = "comb_only";
defparam \Add2|adder|result_node|cs_buffer[3]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC7_F17
flex10ke_lcell \Add2|adder|result_node|cs_buffer[4]~I (
// Equation(s):
// \Add2|adder|result_node|cs_buffer [4] = seconds[4] $ \Add2|adder|result_node|cout [3]
// \Add2|adder|result_node|cout [4] = CARRY(seconds[4] & \Add2|adder|result_node|cout [3])

	.dataa(vcc),
	.datab(seconds[4]),
	.datac(vcc),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.clk(gnd),
	.cin(\Add2|adder|result_node|cout [3]),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Add2|adder|result_node|cs_buffer [4]),
	.regout(),
	.cout(\Add2|adder|result_node|cout [4]),
	.cascout());
// synopsys translate_off
defparam \Add2|adder|result_node|cs_buffer[4]~I .cin_used = "true";
defparam \Add2|adder|result_node|cs_buffer[4]~I .clock_enable_mode = "false";
defparam \Add2|adder|result_node|cs_buffer[4]~I .lut_mask = "3CC0";
defparam \Add2|adder|result_node|cs_buffer[4]~I .operation_mode = "arithmetic";
defparam \Add2|adder|result_node|cs_buffer[4]~I .output_mode = "comb_only";
defparam \Add2|adder|result_node|cs_buffer[4]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC3_F13
flex10ke_lcell \Mod3|auto_generated|divider|divider|add_sub_4|add_sub_cella[3]~I (
// Equation(s):
// \Mod3|auto_generated|divider|divider|add_sub_4|add_sub_cella [3] = \Mod3|auto_generated|divider|divider|add_sub_4|add_sub_cella[2]~COUT  $ (\Mod3|auto_generated|divider|divider|StageOut[17]~249  # \Mod3|auto_generated|divider|divider|StageOut[17]~250 )
// \Mod3|auto_generated|divider|divider|add_sub_4|add_sub_cella[3]~COUT  = CARRY(\Mod3|auto_generated|divider|divider|add_sub_4|add_sub_cella[2]~COUT  & (\Mod3|auto_generated|divider|divider|StageOut[17]~249  # 
// \Mod3|auto_generated|divider|divider|StageOut[17]~250 ))

	.dataa(\Mod3|auto_generated|divider|divider|StageOut[17]~249 ),
	.datab(\Mod3|auto_generated|divider|divider|StageOut[17]~250 ),
	.datac(vcc),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.clk(gnd),
	.cin(\Mod3|auto_generated|divider|divider|add_sub_4|add_sub_cella[2]~COUT ),
	.cascin(vcc),
12345

huang.vo - 源码说明

本页面展示了「东西和南北方向各有一组红、黄、绿灯用于指挥交通」中的 huang.vo 源码文件，采用 VO 编程语言编写，共 1,791 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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