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#ifndef ___DASEQ32_AH
#define ___DASEQ32_AH
#include <lvdef.h>
#include <dsapp.h>
#include <cesigmap.h>
#include <lvpackon.h>
#ifdef __WIN64__
#define DaSeq32_Name "Daseq64.dll"
#else
#define DaSeq32_Name "Daseq32.dll"
#endif
/** @defgroup DaisySequencerGroup Daisy Sequencer Group */
/** @defgroup DaisySequencerEnumsGroup Daisy Sequencer Enumerations */
/** @defgroup DaSeq32_Mode DaSeq32_Mode.
* @ingroup DaisySequencerGroup
* Acquisition modes for Image sequencer DRAL.
*/
//@{
/** Acquisition of a serie of images from one camera. This acquisition mode is
* considered obsolete and will not be enhanced in future LV-SDS releases.\n
* Use SqMode_SerialSwitch instead.
*/
#define SqMode_Serial 0x00
/** Serial acquisition of a serie of images from more cameras over one or
* more PicPort boards
*/
#define SqMode_SerialSwitch 0x01
/** Parallel (fastest timing) acquisition of a serie of images from more
* cameras over one or more PicPort boards
*/
#define SqMode_Parallel 0x02
#define SqMode_SerialCamSel 0x03
//@}
/*! ignored */
#define SqType_OneSeq 0x00
/*! ignored */
#define SqType_Continuous 0x01
/** @defgroup DaSeq32_Notification DaSeq32_Notification.
* @ingroup DaisySequencerGroup
* Notification types for Image sequencer DRAL.
*/
//@{
/** No notification required. */
#define SqNfy_None 0x00
/** User app is notified on each end of serie. */
#define SqNfy_OnEndSeq 0x01
/** User app is notified on each end of image. */
#define SqNfy_OnEachImage 0x02
/** User app is notified on each end of sub-serie. */
#define SqNfy_OnEndSubSeq 0x03
//@}
// Base class flags
/** @defgroup DaSeq32_Flag DaSeq32_Flag.
* @ingroup DaisySequencerGroup
* Flags for Image sequencer DRAL.
*/
//@{
/** Use default settings. */
#define SqFlg_Default 0x000000
/** \a StartX & \a StartY fields have to be used. */
#define SqFlg_UseStartXY 0x000001
/** \a EndX & \a EndY fields have to be used. */
#define SqFlg_UseEndXY 0x000002
/** Modify the acquisition memory width to match the image size. If
* processing of the acquired images is required, use LvROI::SetDIBMode
* instead.
*/
#define SqFlg_ForceMemWidth 0x000004
/* Obsolete parameter. Do not use. */
#define SqFlg_PpxSync 0x000018 // PPX only
/** To be specified when more PicPorts are externally synchronized with a cable. */
#define SqFlg_ExtSync 0x000010 // PPX only
/** When defined, the Sequencer DRAL will retrieve information about the
* connected cameras only for the master grabber. This flag has effect only
* when the \a UseCameraList field in the main configuration structure is set
* to \b FALSE.
*/
#define SqFlg_SingleBoard 0x000020
#define SqFlg_NotifyOnEndOfDMA 0x000040
#define SqFlg_InternalThread 0x000080
/** Requires that the Sequencer DRAL adjust the destination buffer size to
* contain the requested number of images. Note that the CPU buffer
* dimensions can be dynamically changed only under Windows NT and
* Linux, while on Windows 95/98 they are fixed for the whole session. Refer
* to The Leutron Vision Device Drivers section for more information.
*/
#define SqFlg_AutoAdjustBuffer 0x000100
/** Allows the configuration of cameras not physically connected to the
* grabber or with not stable video timing. Note that this flag does not prevent
* Sequencer Dral misbehaviors when starting an acquisition from a not
* connected camera.
*/
#define SqFlg_NoCameraCheck 0x008000
/** The early triggers are ignored rather than cached.
* This flag instructs the dral to configure the external event detection to
* consider only edge transitions in valid time areas (i.e. when the trigger
* can be processed by the camera). Without the flag an external event coming
* during acquisition (not valid time area) is cached and processes as soon
* as the dral enters a valid time area. The flag is independent from the
* missed trigger detection functionality; when this mode is enabled that
* flag becomes inactive as the missed trigger detection already uses
* edged event detection.
*/
#define SqFlg_EdgedExtEvent 0x010000
#define SqFlg_InSignalCCDirect 0x020000
/** Collects information about missed triggers.
* When the application set @ref SqFlg_EdgedExtEvent flag, the early triggers are ignored. Using this flag causes to
* monitor these ignored and missed flags.\n
* See also SequencerGuide section 3.9 for details and example.
* @sa @ref SqFlg_EdgedExtEvent
* \b Supported \b boards: RxL\n
* \b Not \b supported: RPL
*/
#define SqFlg_MonitorLostEvent 0x040000 // RxL No RPL
/** Locks every acquired frame.
* If the hardware supports it and this flag is set every acquired image is automatically locked
* by the dral dispatcher before giving notification to the calling application.
* To set this functionality use this definition. After the frame is processed the application has
* to unlock it (using DsyApp_Seq32::UnlockImage() function) \n
* \b Supported \b boards: RxL \n
* \b Not \b supported: RPL \n
*/
#define SqFlg_AutoLockFrame 0x080000 // RxL No RPL
/** Stops acquisition after the last image in sequence is locked.
* After the sequence of images is acquired and all images in sequence are locked, the acquisition stops.
* The application has to initialize and start it again to allow new acquisition. \n
* For details see SequencerGuide section 3.8\n
* \b Supported \b boards: RxL \n
* \b Not \b supported: RPL \n
*/
#define SqFlg_StopOnLastLock 0x100000 // RxL No RPL
/** Starts image queue functionality.
* Instructs sequencer that the application wants to use image queue to fetch
* the acquired images from the sequencer. \n
* See SequencerGuide section 3.7 - Using image queues for details
*/
#define SqFlg_UseImageQueue 0x200000
#define SqFlg_NoFrameLock 0x400000 // RxL No RPL
// Enhanced class flags
/** Excludes the ADC control function when using the Enhanced Sequencer
* Dral class DsyApp_Seq_Enhanced.
*/
#define SqFlg_ExcludeADCHandling 0x000200
#define SqFlg_IncludeADCHandling 0x000000
/** Forces each acquisition from an Enhanced Sequencer Dral object to start
* on the Odd field. See the DsyApp_Seq_Enhanced class.
*/
#define SqFlg_ForceStartOnOdd 0x000400
/** Forces each acquisition from an Enhanced Sequencer Dral object to start
* on the Even field. See the DsyApp_Seq_Enhanced class.
*/
#define SqFlg_ForceStartOnEven 0x000800
/** Forces each acquisition from an Enhanced Sequencer Dral object to start
* on any field, in effect excluding the function.\n
* See the DsyApp_Seq_Enhanced class.
*/
#define SqFlg_ForceStartOnAny 0x000C00
/** Excludes the random camera selection function when using the Enhanced
* Sequencer Dral class DsyApp_Seq_Enhanced.
*/
#define SqFlg_ExcludeCamSel 0x001000
#define SqFlg_IncludeCamSel 0x000000
// Async reset flags
#define SqFlg_EvToTrig_1Line 0x000000
#define SqFlg_EvToTrig_Immediate 0x002000
#define SqFlg_EvToTrig_Relaxed 0x004000
// Internal flags
#define SqFlg_Mod_Mask 0x0fffffff
#define SqFlg_Mod_Base 0x00000000
#define SqFlg_Mod_Enhanced 0x10000000
#define SqFlg_Mod_Flash 0x20000000
#define SqFlg_Mod_FIM 0x30000000
#define SqFlg_Mod_FIMAR 0x40000000
#define SqFlg_Mod_AsyncReset 0x50000000
#define SqFlg_ARIndexMask 0x0f000000
#define SqFlg_ARIndexLSB 24
#define SqFlg_GetARIndex(x) (((x) & 0x0f000000)>>SqFlg_ARIndexLSB)
//@}
/** @defgroup DaSeq32_SqFlowCheck DaSeq32_SqFlowCheck.
* @ingroup DaisySequencerGroup
* Checkpoint definition for Sequencer DRAL.
*/
//@{
/** No checkpoint. */
#define SqFlowChk_None 0x00
/** Checkpoint inserted at each end of frame. */
#define SqFlowChk_OnEndOfFrame 0x01
/** Checkpoint inserted at each end of sequence. */
#define SqFlowChk_OnEndOfSeq 0x02
/** Checkpoint inserted at each end of subsequence. */
#define SqFlowChk_OnEndOfSubSeq 0x03
//@}
/** @defgroup DaSeq32_SqFlowMode DaSeq32_SqFlowMode.
* @ingroup DaisySequencerGroup
* Type of checkpoint for Sequencer DRAL.
*/
//@{
/** The checkpoint is bypassed if the application does not issue an explicit
* DsyApp_Seq32::Pause() command to pause the acquisition.
*/
#define SqFlow_PauseOnReq 0x00
/** The checkpoint is not bypassed and the application must issue an explicit
* DsyApp_Seq32::Continue() command to continue the acquisition.
*/
#define SqFlow_GoOnReq 0x01
/** An additional flag related to the image determines the state of the
* checkpoint. After acquiring each image, the Sequencer Dral checks for the
* image flag to determine whether it can continue or not. Each image flag is
* controlled by the application with the DsyApp_Seq32::PauseOnImage() and
* DsyApp_Seq32::ContinueOnImage() methods.
*/
#define SqFlow_CheckOnImage 0x02
//@}
/** @defgroup IOExtEvFunction IOExtEvFunction.
* @ingroup DaisySequencerGroup
* External event functionality.
*/
//@{
/** The activation of the signal with IOFunction::UseAs_FrameTrigger causes the
* acquisition process to start.
*/
#define ExtEvFn_StartAcq 0
#define ExtEvFn_StopAcq 1
/** The activation of the signal with IOFunction::UseAs_FrameTrigger function causes
* the acquisition process to start. The acquisition continues until the
* activation of the signal with IOFunction::UseAs_FrameStopTrigger function.
*/
#define ExtEvFn_StartStopAcq 2
/** The activation of the signal with IOFunction::UseAs_FrameTrigger function causes
* the acquisition process to start if not yet started. Successive activations of
* the same signal causes the currently acquired frame to be aborted; the
* acquisition continues in the next image buffer. Meaningful for line-scan
* cameras only.
*/
#define ExtEvFn_RestartAcq 3
#define ExtEvFn_SingleFrame 4
/** The activation of the signal with IOFunction::UseAs_FrameTrigger function causes
* the acquisition process to start. The acquisition continues until the signal is
* deactivated.
*/
#define ExtEvFn_EnableAcq 5
//@}
/** @defgroup DaSeq32_ExtEvent DaSeq32_ExtEvent.
* @ingroup DaisySequencerGroup
* External event handling for Sequencer Dral.
*/
//@{
/** No external event handling. Any state of the optocoupler is ignored. */
#define ExtEv_Ignore 0
/** The Sequencer Dral will wait on checkpoints for either a DsyApp_Seq32::Continue() from
* the application or the optocoupler to be asserted. Either is set first will
* continue the acquisition.
*/
#define ExtEv_Immediate 1
/** The Sequencer Dral will wait on checkpoints for a DsyApp_Seq32::Continue() from the
* application and then for the optocoupler to be asserted. Any state of the
* optocoupler is ignored before the application issues a Continue
* command.
*/
#define ExtEv_SwControlled 2
#define ExtEv_Last ExtEv_SwControlled
//@}
/** Enables default I/O configuration.
* Default I/O configuration looks like:
* @code
* optocoupler input 0 - acquisition trigger
* optocoupler output 0 - strobe
* @endcode
* See SequencerGuide section 2.7. Step 6 - I/O configuration for details and example
* @sa #EventSignal_InOutCfg
*/
#define EventSignal_Default SigCeSig_OptoIn_0
/** Enables I/O configuration saved in DaSeq32Cfg::InOutCfg.
* The entire I/O configuration is stored in structure DaSeq32Cfg::InOutCfg allowing to
* configure up to 8 inputs and 8 outputs, but this structure is ignored by default. To
* instruct DRAL to use DaSeq32Cfg::InOutCfg structure with I/O configuration set this value as
* the parameter DaSeq32Cfg::EventSignal. \n
* See SequencerGuide section 2.7. Step 6 - I/O configuration for details and example
* @sa #EventSignal_Default
*/
#define EventSignal_InOutCfg 0x10000
/** Alias for IO_Pol_ActiveLow.
* Used when 'Extended IO configuration' is disabled.\n
* EventEdge_Falling is alias for IOPol_ActiveLow from the extended IO configuration.
* Is recommended to use 'Extended IO configuration'
*/
#define EventEdge_Falling 0
/** Alias for IOPol_ActiveHigh.
* Used when 'Extended IO configuration' is disabled. \n
* EventEdge_Raising is alias for IOPol_ActiveHigh from the extended IO configuration.
* Is recommended to use 'Extended IO configuration'
*/
#define EventEdge_Raising 1
/** @defgroup DaSeq32_FlowCheckDelay DaSeq32_FlowCheckDelay.
* @ingroup DaisySequencerGroup
* Delay on repetition of check for Sequencer Dral.
*/
//@{
/** On checkpoints, the Sequencer Dral continuously checks for either a
* DsyApp_Seq32::Continue() from the application or the optocoupler to be asserted. No
* delay is inserted between successive checks. This mode results in the
* highest bus traffic, which could delay the processor activity.
*/
#define FlowCheck_Delay_0 0
/** Delay of 180 microseconds between successive checks. */
#define FlowCheck_Delay_180 1
/** Delay of 320 microseconds between successive checks. */
#define FlowCheck_Delay_320 2
/** Delay of 420 microseconds between successive checks. */
#define FlowCheck_Delay_420 3
/** Delay of 610 microseconds between successive checks. */
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