corea.log

ADI BLACKFIN BF561 SDRAM读写程序

# Generated by the VisualDSP++ IDDE (Fri May 08 15:20:23 2009)
# Project File: E:\Program Files\VisualDSP++\Blackfin\Examples\ADSP-BF561 EZ-KIT Lite\SDRAM (C)\CoreA\corea.dpj

"E:\Program Files\VisualDSP++\ccblkfn.exe" -c .\init_sdram.c -file-attr ProjectName=corea -g -structs-do-not-overlap -no-multiline -double-size-32 -decls-strong -warn-protos -proc ADSP-BF561 -o .\Debug\init_sdram.doj -MM
"E:\Program Files\VisualDSP++\ccblkfn.exe" -c .\main.c -file-attr ProjectName=corea -g -structs-do-not-overlap -no-multiline -double-size-32 -decls-strong -warn-protos -proc ADSP-BF561 -o .\Debug\main.doj -MM
"E:\Program Files\VisualDSP++\ccblkfn.exe" -c .\mem_accesses.c -file-attr ProjectName=corea -g -structs-do-not-overlap -no-multiline -double-size-32 -decls-strong -warn-protos -proc ADSP-BF561 -o .\Debug\mem_accesses.doj -MM
"E:\Program Files\VisualDSP++\ccblkfn.exe" -proc ADSP-BF561 -build-lib -o ..\corea.dlb .\Debug\init_sdram.doj .\Debug\main.doj .\Debug\mem_accesses.doj -MM