📄 rtl8019.lst
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C51 COMPILER V7.06 RTL8019 11/06/2008 08:54:11 PAGE 1
C51 COMPILER V7.06, COMPILATION OF MODULE RTL8019
OBJECT MODULE PLACED IN .\RTL8019.obj
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE ..\Netif\RTL8019.c BROWSE DEBUG OBJECTEXTEND PRINT(.\RTL8019.lst) OBJECT(.\
-RTL8019.obj)
stmt level source
1
2 #include "..\GloblDef\GloblDef.h"
3 #include "..\TCPIP\TCPIPmem.h"
4 #include "..\Netif\RTL8019.h"
5
6 sbit R8019RST = P3^4;
7 /* to prevent call RTLSendPacket() when RTLSendPackt() is already is called, InSending
8 is used. example when process run in RTLSendPacket() and a interrupt ocurr then call
9 RTLSendPacket again, then the Register would have changed when interrupt return. */
10 static BYTE DT_XDATA InSending;
11
12 static BYTE DT_XDATA StartPageOfPacket;
13 /* receive head information */
14 /*struct RTLReceiveHeader
15 {
16 BYTE ReceiveStatus;
17 BYTE NextPacketStartPage;
18 BYTE PacketSizeLow;
19 BYTE PacketSizeHigh;
20 }Head;for some unknown resean Head must be a gloal value. */
21 static BYTE DT_XDATA Head[4];
22
23 /* last trasmit start page */
24 static BYTE DT_XDATA LastSendStartPage;
25
26 /* read rtl8019 register. port is reg address */
27 /*BYTE ReadReg(WORD port)
28 {
29 return *((BYTE xdata *)port);
30 }*/
31 #define ReadReg(port) (*((BYTE DT_XDATA *)port))
32
33 /* write value to register */
34 /*void WriteReg(WORD port,BYTE value)
35 {
36 *((BYTE xdata *)port) = value;
37 }*/
38 #define WriteReg(port,value) (*((BYTE DT_XDATA *)port) = value)
39
40 /* select which page of register to use*/
41 /* TO DO:set bit 7-6 in CR, CR_TXP must be 0(if 1 the packet is retrasmit) */
42 #define RTLPage(Index) WriteReg(CR,(ReadReg(CR) & 0x3B)|(BYTE)(Index << 6))
43
44 /* reset rtl8019 and init registers, LocalMacAddr is MAC address */
45 void RTLInit(BYTE LocalMACAddr[]) REENTRANT_MUL
46 {
47 1 BYTE temp;
48 1 int i;
49 1
50 1 R8019RST=0;
51 1
52 1 /* after hardware reset a longdelay is necessary for rtl to self-initial */
53 1 for(i=0; i < RTL_DELAY_AFTER_HARDWARE_RESET; i++);
54 1
C51 COMPILER V7.06 RTL8019 11/06/2008 08:54:11 PAGE 2
55 1 /* reset: write to reset prot */
56 1 temp = ReadReg(RESET_PORT);
57 1 WriteReg(RESET_PORT,temp);
58 1
59 1 /* init RTL registers*/
60 1 WriteReg(CR,(CR_PAGE0 | CR_ABORT_COMPLETE_DMA | CR_STOP_COMMAND)); /* set page0, stop command. command is
- stop after power up. */
61 1
62 1 WriteReg(PSTART_WPAGE0, RECEIVE_START_PAGE); /* Pstart */
63 1 WriteReg(PSTOP_WPAGE0, RECEIVE_STOP_PAGE); /* Pstop */
64 1 WriteReg(BNRY_WPAGE0, RECEIVE_START_PAGE); /* BNRY */
65 1 WriteReg(TPSR_WPAGE0, SEND_START_PAGE0); /* TPSR */
66 1
67 1 WriteReg(RCR_WPAGE0, 0xCE); /* RCR: refer to define of RCR in Rtl8019as.h */
68 1 WriteReg(TCR_WPAGE0, 0xE0); /* TCR: refer to define of TCR in Rtl8019as.h */
69 1 WriteReg(DCR_WPAGE0, 0xC8); /* DCR: refer to define of DCR in Rtl8019as.h */
70 1
71 1 WriteReg(IMR_WPAGE0,0); /* RTL recieve interrupt enabled */
72 1 WriteReg(ISR_WPAGE0, 0xFF); /* write FF to clear up all interrupt status */
73 1
74 1 RTLPage(1);
75 1
76 1 WriteReg(CURR_WPAGE1,RECEIVE_START_PAGE + 1);
77 1
78 1 /* MAR0 */
79 1 /*WriteReg(0x08,0x00);
80 1 WriteReg(0x09,0x41);
81 1 WriteReg(0x0a,0x00);
82 1 WriteReg(0x0b,0x80);
83 1 WriteReg(0x0c,0x00);
84 1 WriteReg(0x0d,0x00);
85 1 WriteReg(0x0e,0x00);
86 1 WriteReg(0x0f,0x00);*/
87 1
88 1 /* set phisical address */
89 1 WriteReg(PRA0_WPAGE1,LocalMACAddr[0]);
90 1 WriteReg(PRA1_WPAGE1,LocalMACAddr[1]);
91 1 WriteReg(PRA2_WPAGE1,LocalMACAddr[2]);
92 1 WriteReg(PRA3_WPAGE1,LocalMACAddr[3]);
93 1 WriteReg(PRA4_WPAGE1,LocalMACAddr[4]);
94 1 WriteReg(PRA5_WPAGE1,LocalMACAddr[5]);
95 1
96 1 /* transimit start page */
97 1 LastSendStartPage = SEND_START_PAGE0;
98 1 StartPageOfPacket = RECEIVE_START_PAGE + 1;
99 1
100 1 /* in the beginning, no packet is in sending */
101 1 InSending = FALSE;
102 1
103 1 /* initial over, start command and receive */
104 1 WriteReg(CR,(CR_PAGE0 | CR_ABORT_COMPLETE_DMA | CR_START_COMMAND));
105 1 }
106
107 /* write buffer to rlt ram */
108 void RTLWriteRam(WORD address, WORD size, BYTE DT_XDATA * buff) REENTRANT_SIG
109 {
110 1 BYTE DT_XDATA *Endp;
111 1 BYTE PrePage; /* store page */
112 1 PrePage = ReadReg(CR);
113 1 RTLPage(0);
114 1 WriteReg(RSARH_WPAGE0,(BYTE)((address>>8)&0x00ff));
115 1 WriteReg(RSARL_WPAGE0,(BYTE)address);
C51 COMPILER V7.06 RTL8019 11/06/2008 08:54:11 PAGE 3
116 1 WriteReg(RBCRH_WPAGE0,(BYTE)((size>>8)&0x00ff));
117 1 WriteReg(RBCRL_WPAGE0,(BYTE)size);
118 1 WriteReg(CR,(0x00 | CR_REMOTE_WRITE | CR_START_COMMAND));
119 1 for(Endp = buff + size; buff < Endp;)
120 1 {
121 2 WriteReg(REMOTE_DMA_PORT,*(buff++));
122 2 }
123 1 /* complete dma */
124 1 WriteReg(RBCRH_WPAGE0,0);
125 1 WriteReg(RBCRL_WPAGE0,0);
126 1 WriteReg(CR,((PrePage&0xC0) | CR_ABORT_COMPLETE_DMA | CR_START_COMMAND));
127 1 }
128
129 /* read rlt ram data to buffer */
130 void RTLReadRam(WORD address,WORD size,BYTE DT_XDATA * buff) REENTRANT_MUL
131 {
132 1 BYTE DT_XDATA * Endp;
133 1 BYTE PrePage; /* store page */
134 1
135 1 PrePage = ReadReg(CR);
136 1 RTLPage(0);
137 1 WriteReg(RSARH_WPAGE0,(BYTE)((address>>8)&0x00ff));
138 1 WriteReg(RSARL_WPAGE0,(BYTE)address);
139 1 WriteReg(RBCRH_WPAGE0,(BYTE)((size>>8)&0x00ff));
140 1 WriteReg(RBCRL_WPAGE0,(BYTE)size);
141 1 WriteReg(CR,(0x00 | CR_REMOTE_READ | CR_START_COMMAND));
142 1 for(Endp = buff + size; buff < Endp;)
143 1 {
144 2 *(buff++) = ReadReg(REMOTE_DMA_PORT);
145 2 }
146 1 /* complete dma */
147 1 WriteReg(RBCRH_WPAGE0,0);
148 1 WriteReg(RBCRL_WPAGE0,0);
149 1 WriteReg(CR,((PrePage&0xC0) | CR_ABORT_COMPLETE_DMA | CR_START_COMMAND));
150 1 }
151 /* call this function to send a packet by RTL8019. packet store in ram
152 starts at 'buffer' and its size is 'size'. 'size' should not large than
153 MAX_PACKET_SIZE or the excess data will be discard. */
154 BOOL RTLSendPacket(BYTE DT_XDATA * buffer,WORD size) REENTRANT_SIG
155 {
156 1 BYTE StartPage;
157 1 BYTE PrePage;
158 1
159 1 /* if send is already running */
160 1 if(InSending == TRUE)
161 1 return FALSE;
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