📄 quad_sysid.mdl
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ShowName off
DisplayOption "bar"
}
Block {
BlockType Mux
Name "Mux1"
Ports [4, 1]
Position [855, 211, 860, 249]
ShowName off
DisplayOption "bar"
}
Block {
BlockType Mux
Name "Mux2"
Ports [4, 1]
Position [855, 276, 860, 314]
ShowName off
DisplayOption "bar"
}
Block {
BlockType Product
Name "Product"
Ports [2, 1]
Position [475, 237, 505, 268]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^0"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product1"
Ports [2, 1]
Position [475, 332, 505, 363]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^0"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Constant
Name "g"
Position [815, 330, 845, 360]
Orientation "up"
Value "9.81"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Outport
Name "x"
Position [965, 158, 995, 172]
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Outport
Name "y"
Position [965, 223, 995, 237]
Port "2"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Outport
Name "z"
Position [965, 288, 995, 302]
Port "3"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Outport
Name "phi"
Position [950, 483, 980, 497]
Port "4"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Outport
Name "theta"
Position [950, 403, 980, 417]
Port "5"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Outport
Name "psi"
Position [950, 443, 980, 457]
Port "6"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Line {
SrcBlock "Fcn2"
SrcPort 1
DstBlock "z"
DstPort 1
}
Line {
SrcBlock "Fcn1"
SrcPort 1
DstBlock "y"
DstPort 1
}
Line {
SrcBlock "Fcn"
SrcPort 1
DstBlock "x"
DstPort 1
}
Line {
SrcBlock "g"
SrcPort 1
Points [0, -15]
DstBlock "Mux2"
DstPort 4
}
Line {
SrcBlock "Mux2"
SrcPort 1
DstBlock "Fcn2"
DstPort 1
}
Line {
SrcBlock "Mux1"
SrcPort 1
DstBlock "Fcn1"
DstPort 1
}
Line {
SrcBlock "Integrator5"
SrcPort 1
Points [195, 0]
Branch {
Points [0, -245]
Branch {
Points [0, -65]
DstBlock "Mux"
DstPort 4
}
Branch {
DstBlock "Mux1"
DstPort 4
}
}
Branch {
DstBlock "phi"
DstPort 1
}
}
Line {
SrcBlock "Integrator3"
SrcPort 1
Points [175, 0]
Branch {
Points [0, -50]
Branch {
Points [0, -65]
Branch {
Points [0, -65]
DstBlock "Mux"
DstPort 3
}
Branch {
DstBlock "Mux1"
DstPort 3
}
}
Branch {
DstBlock "Mux2"
DstPort 3
}
}
Branch {
Points [0, 100]
DstBlock "psi"
DstPort 1
}
}
Line {
SrcBlock "Integrator1"
SrcPort 1
Points [120, 0]
Branch {
Points [35, 0]
Branch {
Points [0, -25]
Branch {
Points [0, -70]
DstBlock "Mux"
DstPort 2
}
Branch {
Points [0, -5]
DstBlock "Mux1"
DstPort 2
}
}
Branch {
Points [0, 35]
DstBlock "Mux2"
DstPort 2
}
}
Branch {
Points [0, 155]
DstBlock "theta"
DstPort 1
}
}
Line {
SrcBlock "Divide"
SrcPort 1
Points [140, 0]
Branch {
DstBlock "Mux"
DstPort 1
}
Branch {
Points [0, 65; 180, 0]
Branch {
DstBlock "Mux1"
DstPort 1
}
Branch {
Points [0, 65]
DstBlock "Mux2"
DstPort 1
}
}
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Fcn"
DstPort 1
}
Line {
SrcBlock "Divide3"
SrcPort 1
DstBlock "Integrator4"
DstPort 1
}
Line {
SrcBlock "Integrator4"
SrcPort 1
DstBlock "Integrator5"
DstPort 1
}
Line {
SrcBlock "Integrator2"
SrcPort 1
DstBlock "Integrator3"
DstPort 1
}
Line {
SrcBlock "Product1"
SrcPort 1
DstBlock "Integrator2"
DstPort 1
}
Line {
SrcBlock "Integrator"
SrcPort 1
DstBlock "Integrator1"
DstPort 1
}
Line {
SrcBlock "Product"
SrcPort 1
DstBlock "Integrator"
DstPort 1
}
Line {
SrcBlock "Divide2"
SrcPort 1
DstBlock "Product1"
DstPort 1
}
Line {
SrcBlock "Constant"
SrcPort 1
Points [15, 0; 0, -40]
Branch {
Points [0, -95]
DstBlock "Product"
DstPort 2
}
Branch {
DstBlock "Product1"
DstPort 2
}
}
Line {
SrcBlock "Divide1"
SrcPort 1
DstBlock "Product"
DstPort 1
}
Line {
SrcBlock "J4"
SrcPort 1
DstBlock "Divide3"
DstPort 3
}
Line {
SrcBlock "Add3"
SrcPort 1
DstBlock "Divide3"
DstPort 1
}
Line {
SrcBlock "Add2"
SrcPort 1
DstBlock "Divide2"
DstPort 1
}
Line {
SrcBlock "J3"
SrcPort 1
DstBlock "Divide3"
DstPort 2
}
Line {
SrcBlock "J2"
SrcPort 1
DstBlock "Divide2"
DstPort 2
}
Line {
SrcBlock "J1"
SrcPort 1
DstBlock "Divide1"
DstPort 2
}
Line {
SrcBlock "Add1"
SrcPort 1
DstBlock "Divide1"
DstPort 1
}
Line {
SrcBlock "m"
SrcPort 1
DstBlock "Divide"
DstPort 2
}
Line {
SrcBlock "Add"
SrcPort 1
DstBlock "Divide"
DstPort 1
}
Line {
SrcBlock "F4"
SrcPort 1
Points [40, 0; 0, -5]
Branch {
Points [0, -50]
DstBlock "Add"
DstPort 4
}
Branch {
Points [0, 45]
Branch {
DstBlock "Add1"
DstPort 4
}
Branch {
Points [0, 95]
Branch {
DstBlock "Add2"
DstPort 4
}
Branch {
Points [0, 140]
DstBlock "Add3"
DstPort 4
}
}
}
}
Line {
SrcBlock "F3"
SrcPort 1
Points [30, 0; 0, -40; 25, 0]
Branch {
DstBlock "Add"
DstPort 3
}
Branch {
Points [0, 95]
Branch {
DstBlock "Add1"
DstPort 3
}
Branch {
Points [0, 95]
Branch {
DstBlock "Add2"
DstPort 3
}
Branch {
Points [0, 140]
DstBlock "Add3"
DstPort 3
}
}
}
}
Line {
SrcBlock "F2"
SrcPort 1
Points [20, 0; 0, -20; 45, 0]
Branch {
DstBlock "Add"
DstPort 2
}
Branch {
Points [0, 95]
Branch {
DstBlock "Add1"
DstPort 2
}
Branch {
Points [0, 95]
Branch {
DstBlock "Add2"
DstPort 2
}
Branch {
Points [0, 140]
DstBlock "Add3"
DstPort 2
}
}
}
}
Line {
SrcBlock "F1"
SrcPort 1
Points [75, 0]
Branch {
DstBlock "Add"
DstPort 1
}
Branch {
Points [0, 95]
Branch {
DstBlock "Add1"
DstPort 1
}
Branch {
Points [0, 95]
Branch {
DstBlock "Add2"
DstPort 1
}
Branch {
DstBlock "Add3"
DstPort 1
}
}
}
}
Annotation {
Position [633, 528]
}
Annotation {
Position [753, 388]
}
Annotation {
Position [753, 293]
}
}
}
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