📄 quad_sysid.mdl
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TargetFcnLib "ansi_tfl_table_tmw.mat"
TargetLibSuffix ""
TargetPreCompLibLocation ""
TargetFunctionLibrary "ANSI_C"
UtilityFuncGeneration "Auto"
GenerateFullHeader on
GenerateSampleERTMain off
GenerateTestInterfaces off
IsPILTarget off
ModelReferenceCompliant on
CompOptLevelCompliant on
IncludeMdlTerminateFcn on
CombineOutputUpdateFcns off
SuppressErrorStatus off
ERTFirstTimeCompliant off
IncludeFileDelimiter "Auto"
ERTCustomFileBanners off
SupportAbsoluteTime on
LogVarNameModifier "rt_"
MatFileLogging on
MultiInstanceERTCode off
SupportNonFinite on
SupportComplex on
PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
EnableShiftOperators on
ParenthesesLevel "Nominal"
PortableWordSizes off
ModelStepFunctionPrototypeControlCompliant off
AutosarCompliant off
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
ExtModeIntrfLevel "Level1"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
GenerateASAP2 off
}
PropName "Components"
}
}
hdlcoderui.hdlcc {
$ObjectID 11
Description "HDL Coder custom configuration component"
Version "1.4.0"
Name "HDL Coder"
Array {
Type "Cell"
Dimension 1
Cell ""
PropName "HDLConfigFile"
}
HDLCActiveTab "0"
}
PropName "Components"
}
Name "Configuration"
CurrentDlgPage "Solver"
}
PropName "ConfigurationSets"
}
Simulink.ConfigSet {
$PropName "ActiveConfigurationSet"
$ObjectID 1
}
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
BlockParameterDefaults {
Block {
BlockType Fcn
Expr "sin(u[1])"
SampleTime "-1"
}
Block {
BlockType Inport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
OutMin "[]"
OutMax "[]"
DataType "auto"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: auto"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchByCopyingInsideSignal off
Interpolate on
}
Block {
BlockType Integrator
ExternalReset "none"
InitialConditionSource "internal"
InitialCondition "0"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
IgnoreLimit off
ZeroCross on
ContinuousStateAttributes "''"
}
Block {
BlockType Mux
Inputs "4"
DisplayOption "none"
UseBusObject off
BusObject "BusObject"
NonVirtualBus off
}
Block {
BlockType Outport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
OutMin "[]"
OutMax "[]"
DataType "auto"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: auto"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Product
Inputs "2"
Multiplication "Element-wise(.*)"
CollapseMode "All dimensions"
CollapseDim "1"
InputSameDT on
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Same as first input"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
CollapseMode "All dimensions"
CollapseDim "1"
InputSameDT on
AccumDataTypeStr "Inherit: Inherit via internal rule"
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Same as first input"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Constant
Value "1"
VectorParams1D on
SamplingMode "Sample based"
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Inherit from 'Constant value'"
OutDataType "fixdt(1,16,0)"
ConRadixGroup "Use specified scaling"
OutScaling "[]"
OutDataTypeStr "Inherit: Inherit from 'Constant value'"
SampleTime "inf"
FramePeriod "inf"
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
UseDisplayTextAsClickCallback off
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "quad_sysID"
Location [2, 78, 1278, 1003]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Inport
Name "F1"
Position [160, 108, 190, 122]
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Inport
Name "F2"
Position [160, 143, 190, 157]
Port "2"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Inport
Name "F3"
Position [160, 178, 190, 192]
Port "3"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Inport
Name "F4"
Position [160, 208, 190, 222]
Port "4"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Inport
Name "m"
Position [325, 148, 355, 162]
Port "5"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Inport
Name "J1"
Position [325, 243, 355, 257]
Port "6"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Inport
Name "J2"
Position [325, 338, 355, 352]
Port "7"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Inport
Name "J3"
Position [325, 483, 355, 497]
Port "8"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Inport
Name "J4"
Position [325, 503, 355, 517]
Port "9"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Sum
Name "Add"
Ports [4, 1]
Position [285, 108, 315, 167]
Inputs "++++"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^-10"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Add1"
Ports [4, 1]
Position [285, 203, 315, 262]
Inputs "--++"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^-10"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Add2"
Ports [4, 1]
Position [285, 298, 315, 357]
Inputs "-++-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^-10"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Add3"
Ports [4, 1]
Position [285, 438, 315, 497]
Inputs "+-+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^-10"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Constant
Name "Constant"
Position [405, 380, 435, 410]
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Product
Name "Divide"
Ports [2, 1]
Position [400, 132, 430, 163]
Inputs "*/"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^-10"
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide1"
Ports [2, 1]
Position [400, 227, 430, 258]
Inputs "*/"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^-10"
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide2"
Ports [2, 1]
Position [400, 322, 430, 353]
Inputs "*/"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^-10"
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide3"
Ports [3, 1]
Position [400, 462, 430, 518]
Inputs "*/*"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^-10"
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Fcn
Name "Fcn"
Position [880, 150, 940, 180]
Expr "(cos(u(4))*sin(u(2))*cos(u(3))+sin(u(4))sin(u3)))*u(1)"
}
Block {
BlockType Fcn
Name "Fcn1"
Position [880, 215, 940, 245]
Expr "(sin(u(4))*sin(u(2))*cos(u(3))+cos(u(4))sin(u3)))*u(1)"
}
Block {
BlockType Fcn
Name "Fcn2"
Position [880, 280, 940, 310]
Expr "u(1)*(cos(u(2))*cos(u(3)))-u(4)"
}
Block {
BlockType Integrator
Name "Integrator"
Ports [1, 1]
Position [530, 240, 560, 270]
}
Block {
BlockType Integrator
Name "Integrator1"
Ports [1, 1]
Position [580, 240, 610, 270]
}
Block {
BlockType Integrator
Name "Integrator2"
Ports [1, 1]
Position [530, 335, 560, 365]
}
Block {
BlockType Integrator
Name "Integrator3"
Ports [1, 1]
Position [580, 335, 610, 365]
}
Block {
BlockType Integrator
Name "Integrator4"
Ports [1, 1]
Position [530, 475, 560, 505]
}
Block {
BlockType Integrator
Name "Integrator5"
Ports [1, 1]
Position [580, 475, 610, 505]
}
Block {
BlockType Mux
Name "Mux"
Ports [4, 1]
Position [855, 146, 860, 184]
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