📄 usb_to_serial.asm
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;****************************************************************
ORG 0000h
INTERRUPT_VECTOR_TABLE ;
CODE_START:
XPAGEON
;****************************************************************
; ISR: Reserved_Isr(s)
;****************************************************************
IFDEF 64013
Ep3_Isr:
Ep4_Isr:
I2c_Isr:
Dac_Isr:
ENDIF
IFDEF 63743
Spi_Isr:
Capture_A_Isr:
Capture_B_Isr:
Wakeup_Isr:
ENDIF
128us_Isr:
Reserved_Isr:
reti ;
;****************************************************************
; ISR: Reset_Isr
;****************************************************************
; The reset interrupt resets all the variable to their
; default values and prepares the USB device for enumeration
;****************************************************************
Reset_Isr:
IFDEF 63743
; Set precision clocking bit, select internal
; oscillator and disable clock output.
mov A, (PRECISION_CLK_EN | INT_CLK_OUTPUT) ;
iowr CLK_CFG ;
ENDIF
mov A, RUN_EN ;
iowr CTL ;
mov A, DSP_BEGIN ;
swap A, DSP ;
;----------------------------------------------------------------
; Clear all of RAM.
mov A, 00h ;
mov X, (RAM_SIZE - 1) ;
Clear_Ram_Loop: ;
iowr WDT ;
mov [X + 0], A ;
dec X ;
jnc Clear_Ram_Loop ;
;----------------------------------------------------------------
IFDEF 64013
; The 64013 provides either three or five
; endpoints. Two of the common endpoints
; can provide either 8 or 32-byte fifos.
; Configure the endpoints based on the
; NUM_EPS and FIFO_SIZE defines.
mov A, 00h ;
; If the number of endpoints is defined as
; 5, set the EP_COUNT bit in the USB_CTL
; register.
IF (NUM_EPS - 5)
ELSE
or A, EP_COUNT ;
ENDIF
; If the endpoint fifo size is defined as
; 32, set the EP_SIZE bit in the USB_CTL
; register.
IF (FIFO_SIZE - 32)
ELSE
or A, EP_SIZE ;
ENDIF
iowr USB_CTL ;
DISABLE_SE0 ;
mov A, ((P3_CFG_MSK & CMOS_NONE) | (P2_CFG_MSK & CMOS_NONE) | (P1_CFG_MSK & CMOS_NONE) | (P0_CFG_MSK & RES_NEG))
iowr GPIO_CFG ;
ENDIF
IFDEF 63743
; Set INPUT_PORT to Hi-Z input mode.
mov A, 00h ;
iowr P0_MODE_0 ;
iowr P0_MODE_1 ;
; Set OUTPUT_PORT to hi-current output mode.
mov A, FFh ;
iowr P1_MODE_0 ;
iowr P1_MODE_1 ;
; Set INPUT_PORT interrupt polarity to
; negative edge.
mov A, 00h ;
iowr P0_IP ;
; Turn on internal voltage regulator.
mov A, VREG_EN ;
iowr USB_CTL ;
ENDIF
mov A, FFh ;
mov [p1_shadow], A ;
mov A, USB_RST_INT_EN ; Enable Bus Reset Interrupt
iowr IE ; disable all other interrupts
mov A, EP0_IE ; Enable EP0 interrupt
iowr EP_IE ;
mov A, STALL_IN_OUT ; Set Endpoint 0 mode to Stall
iowr EP0_MODE ;
mov A, (USB_ADDR_EN | 00h) ; Enable response to USB address 0
iowr USB_ADDR ;
ei ;
jmp Main ;
;****************************************************************
; ISR: Bus_Reset_Isr
;****************************************************************
Bus_Reset_Isr:
push A ;
IFDEF 64013
mov A, ((P3_CFG_MSK & CMOS_NONE) | (P2_CFG_MSK & CMOS_NONE) | (P1_CFG_MSK & CMOS_NONE) | (P0_CFG_MSK & RES_NEG))
iowr GPIO_CFG ;
ENDIF
IFDEF 63743
; Set INPUT_PORT to Hi-Z input mode.
mov A, 00h ;
iowr P0_MODE_0 ;
iowr P0_MODE_1 ;
; Set OUTPUT_PORT to hi-current output mode.
mov A, FFh ;
iowr P1_MODE_0 ;
iowr P1_MODE_1 ;
; Set INPUT_PORT interrupt polarity to
; negative edge.
mov A, 00h ;
iowr P0_IP ;
; Turn on internal voltage regulator.
mov A, VREG_EN ;
iowr USB_CTL ;
ENDIF
mov A, FFh ;
mov [p1_shadow], A ;
mov A, (USB_RST_INT_EN |1MS_INT_EN) ; Enable USB Reset interrupt
iowr IE ;
mov A, (EP2_IE | EP1_IE | EP0_IE) ; Enable EP0, EP1 and EP2 interrupts
iowr EP_IE ;
mov A, STALL_IN_OUT ; EP0_MODE = STALL_IN_OUT
iowr EP0_MODE ; (Other endpoints already disabled due to Reset)
mov A, (USB_ADDR_EN | 00h) ; Enable response to USB address 0
iowr USB_ADDR ;
iord CTL ; Clear WD, USB and POR Reset bits
and A, ~(WDT_RST | USB_RST | POR) ;
iowr CTL ;
mov A, [output_port_shadow] ;
or A, (DTR | RTS | TXD) ;
mov [output_port_shadow], A ;
iowr OUTPUT_PORT ;
mov A, (DATA_TOGGLE | SIZEOF_INPUT_REPORT) ;
iowr EP1_COUNT ;
mov A, 00h ; Disable all GPIO interrupts
iowr P1_IE ;
pop A ;
reti ;
;****************************************************************
; ISR: 1ms_Isr
;****************************************************************
; The 1ms timer interrupts will be used to reset the watchdog
; timer and check if 3ms have passed since the last bus activity
; and puts the device in suspend if necessary.
;****************************************************************
1ms_Isr:
push A ;
ei ;
; Check Bus Activity
iord USB_CTL ; Bus activity?
and A, BUS_ACTIVE ;
jnz .bus_active ; Yes
; If no bus activity, increment the suspend counter.
inc [suspend_count] ;
mov A, [suspend_count] ;
cmp A, 04h ;
jnz .end ;
; Suspending is tricky and needs to be treated differently
; for each situation. For this setup we are using RS-232
; level converters. The ground pin of the converters is tied
; to Port3, so in order to turn them off we raise the value
; of PORT 3 5V, this will shut off the converters so they stop
; consuming power.
.suspend:
IFDEF 63743
; Set INPUT_PORT to Hi-Z input mode.
mov A, FFh ;
iowr P1_DATA ;
mov A, FFh ;
iowr P0_MODE_1 ;
mov A, 00h ;
iowr P0_MODE_0 ;
; Set OUTPUT_PORT to hi-current output mode.
mov A, FFh ;
iowr P1_MODE_0 ;
iowr P1_MODE_1 ;
ENDIF
IFDEF 64013
mov A, FFh ;
iowr GPIO_CFG ; place ports in resistive mode
mov A, FFh ;
iowr P3_DATA ; turn off level converters
iowr P2_DATA ;
iowr P1_DATA ;
iowr P0_DATA ;
ENDIF
iord IE ; Save value of IE
mov [temp], A ;
and A,~1MS_INT_EN ; Turn off the 1ms interrupt
iowr IE ; (Leaving GPIO and reset ints enabled)
; Suspend the controller. Once the SUSPEND_BIT is set
; in the SCR, the processor will enter suspend mode
; immediately.
iord CTL ; Suspend processor
or A, SUSP_EN ;
iowr CTL ;
; The following instruction is the first instruction
; executed following exit from suspend mode.
nop ;
mov A, [temp] ; Restore previous interrupt enables
iowr IE ;
mov A, [output_port_shadow] ;
iowr OUTPUT_PORT ;
IFDEF 64013
mov A, ((P3_CFG_MSK & CMOS_NONE) | (P2_CFG_MSK & CMOS_NONE) | (P1_CFG_MSK & CMOS_NONE) | (P0_CFG_MSK & RES_NEG))
iowr GPIO_CFG ;
mov A, 00h ; Turn on the RS-232 transceivers
iowr P3_DATA ;
ENDIF
IFDEF 63743
; Set INPUT_PORT to Hi-Z input mode.
mov A, 00h ;
iowr P0_MODE_0 ;
iowr P0_MODE_1 ;
; Set OUTPUT_PORT to hi-current output mode.
mov A, FFh ;
iowr P1_MODE_0 ;
iowr P1_MODE_1 ;
; Set INPUT_PORT interrupt polarity to
; negative edge.
mov A, 00h ;
iowr P0_IP ;
; Turn on internal voltage regulator.
mov A, VREG_EN ;
iowr USB_CTL ;
ENDIF
.bus_active:
mov A,00h ; Clear suspend counter
mov [suspend_count], A ;
iord USB_CTL ; Clear bus activity flag
and A, ~BUS_ACTIVE ;
iowr USB_CTL ;
.end:
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