erjiguan_deng.tan.qmsg

来自「8个发光二级管」· QMSG 代码 · 共 13 行 · 第 1/2 页

{ "Info" "ITDB_FULL_TCO_RESULT" "clk led\[0\] q\[0\] 17.000 ns register " "Info: tco from clock clk to destination pin led\[0\] through register q\[0\] is 17.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 3.000 ns + Longest register " "Info: + Longest clock path from clock clk to source register is 3.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.000 ns) 3.000 ns clk 1 CLK PIN_83 4 " "Info: 1: + IC(0.000 ns) + CELL(3.000 ns) = 3.000 ns; Loc. = PIN_83; Fanout = 4; CLK Node = 'clk'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "" { clk } "NODE_NAME" } } } { "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" "" "" { Text "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 3.000 ns q\[0\] 2 REG LC39 24 " "Info: 2: + IC(0.000 ns) + CELL(0.000 ns) = 3.000 ns; Loc. = LC39; Fanout = 24; REG Node = 'q\[0\]'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "0.000 ns" { clk q[0] } "NODE_NAME" } } } { "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" "" "" { Text "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" 22 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.000 ns 100.00 % " "Info: Total cell delay = 3.000 ns ( 100.00 % )" {  } {  } 0}  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "3.000 ns" { clk q[0] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.000 ns + " "Info: + Micro clock to output delay of source is 1.000 ns" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" "" "" { Text "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" 22 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "13.000 ns + Longest register pin " "Info: + Longest register to pin delay is 13.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns q\[0\] 1 REG LC39 24 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC39; Fanout = 24; REG Node = 'q\[0\]'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "" { q[0] } "NODE_NAME" } } } { "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" "" "" { Text "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" 22 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(7.000 ns) 9.000 ns p2~769 2 COMB LC45 1 " "Info: 2: + IC(2.000 ns) + CELL(7.000 ns) = 9.000 ns; Loc. = LC45; Fanout = 1; COMB Node = 'p2~769'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "9.000 ns" { q[0] p2~769 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.000 ns) 13.000 ns led\[0\] 3 PIN PIN_25 0 " "Info: 3: + IC(0.000 ns) + CELL(4.000 ns) = 13.000 ns; Loc. = PIN_25; Fanout = 0; PIN Node = 'led\[0\]'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "4.000 ns" { p2~769 led[0] } "NODE_NAME" } } } { "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" "" "" { Text "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "11.000 ns 84.62 % " "Info: Total cell delay = 11.000 ns ( 84.62 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 15.38 % " "Info: Total interconnect delay = 2.000 ns ( 15.38 % )" {  } {  } 0}  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "13.000 ns" { q[0] p2~769 led[0] } "NODE_NAME" } } }  } 0}  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "3.000 ns" { clk q[0] } "NODE_NAME" } } } { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "13.000 ns" { q[0] p2~769 led[0] } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "c led\[0\] 15.000 ns Longest " "Info: Longest tpd from source pin c to destination pin led\[0\] is 15.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns c 1 PIN PIN_63 23 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_63; Fanout = 23; PIN Node = 'c'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "" { c } "NODE_NAME" } } } { "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" "" "" { Text "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(7.000 ns) 11.000 ns p2~769 2 COMB LC45 1 " "Info: 2: + IC(2.000 ns) + CELL(7.000 ns) = 11.000 ns; Loc. = LC45; Fanout = 1; COMB Node = 'p2~769'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "9.000 ns" { c p2~769 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.000 ns) 15.000 ns led\[0\] 3 PIN PIN_25 0 " "Info: 3: + IC(0.000 ns) + CELL(4.000 ns) = 15.000 ns; Loc. = PIN_25; Fanout = 0; PIN Node = 'led\[0\]'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "4.000 ns" { p2~769 led[0] } "NODE_NAME" } } } { "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" "" "" { Text "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "13.000 ns 86.67 % " "Info: Total cell delay = 13.000 ns ( 86.67 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 13.33 % " "Info: Total interconnect delay = 2.000 ns ( 13.33 % )" {  } {  } 0}  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "15.000 ns" { c p2~769 led[0] } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_FULL_MIN_TCO_RESULT" "clk led\[5\] q\[1\] 17.000 ns register " "Info: Minimum tco from clock clk to destination pin led\[5\] through register q\[1\] is 17.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 3.000 ns + Shortest register " "Info: + Shortest clock path from clock clk to source register is 3.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.000 ns) 3.000 ns clk 1 CLK PIN_83 4 " "Info: 1: + IC(0.000 ns) + CELL(3.000 ns) = 3.000 ns; Loc. = PIN_83; Fanout = 4; CLK Node = 'clk'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "" { clk } "NODE_NAME" } } } { "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" "" "" { Text "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 3.000 ns q\[1\] 2 REG LC36 26 " "Info: 2: + IC(0.000 ns) + CELL(0.000 ns) = 3.000 ns; Loc. = LC36; Fanout = 26; REG Node = 'q\[1\]'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "0.000 ns" { clk q[1] } "NODE_NAME" } } } { "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" "" "" { Text "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" 22 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.000 ns 100.00 % " "Info: Total cell delay = 3.000 ns ( 100.00 % )" {  } {  } 0}  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "3.000 ns" { clk q[1] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.000 ns + " "Info: + Micro clock to output delay of source is 1.000 ns" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" "" "" { Text "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" 22 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "13.000 ns + Shortest register pin " "Info: + Shortest register to pin delay is 13.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns q\[1\] 1 REG LC36 26 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC36; Fanout = 26; REG Node = 'q\[1\]'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "" { q[1] } "NODE_NAME" } } } { "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" "" "" { Text "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" 22 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(7.000 ns) 9.000 ns p2~739 2 COMB LC35 1 " "Info: 2: + IC(2.000 ns) + CELL(7.000 ns) = 9.000 ns; Loc. = LC35; Fanout = 1; COMB Node = 'p2~739'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "9.000 ns" { q[1] p2~739 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.000 ns) 13.000 ns led\[5\] 3 PIN PIN_31 0 " "Info: 3: + IC(0.000 ns) + CELL(4.000 ns) = 13.000 ns; Loc. = PIN_31; Fanout = 0; PIN Node = 'led\[5\]'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "4.000 ns" { p2~739 led[5] } "NODE_NAME" } } } { "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" "" "" { Text "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "11.000 ns 84.62 % " "Info: Total cell delay = 11.000 ns ( 84.62 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 15.38 % " "Info: Total interconnect delay = 2.000 ns ( 15.38 % )" {  } {  } 0}  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "13.000 ns" { q[1] p2~739 led[5] } "NODE_NAME" } } }  } 0}  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "3.000 ns" { clk q[1] } "NODE_NAME" } } } { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "13.000 ns" { q[1] p2~739 led[5] } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "c led\[5\] 15.000 ns Shortest " "Info: Shortest tpd from source pin c to destination pin led\[5\] is 15.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns c 1 PIN PIN_63 23 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_63; Fanout = 23; PIN Node = 'c'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "" { c } "NODE_NAME" } } } { "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" "" "" { Text "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(7.000 ns) 11.000 ns p2~739 2 COMB LC35 1 " "Info: 2: + IC(2.000 ns) + CELL(7.000 ns) = 11.000 ns; Loc. = LC35; Fanout = 1; COMB Node = 'p2~739'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "9.000 ns" { c p2~739 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.000 ns) 15.000 ns led\[5\] 3 PIN PIN_31 0 " "Info: 3: + IC(0.000 ns) + CELL(4.000 ns) = 15.000 ns; Loc. = PIN_31; Fanout = 0; PIN Node = 'led\[5\]'" {  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "4.000 ns" { p2~739 led[5] } "NODE_NAME" } } } { "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" "" "" { Text "D:/第三周  试验  07607邓习海/发光 二级管/erjiguan_deng.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "13.000 ns 86.67 % " "Info: Total cell delay = 13.000 ns ( 86.67 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 13.33 % " "Info: Total interconnect delay = 2.000 ns ( 13.33 % )" {  } {  } 0}  } { { "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" "" "" { Report "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng_cmp.qrpt" Compiler "erjiguan_deng" "UNKNOWN" "V1" "D:/第三周  试验  07607邓习海/发光 二级管/db/erjiguan_deng.quartus_db" { Floorplan "" "" "15.000 ns" { c p2~739 led[5] } "NODE_NAME" } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1  " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Sat May 23 10:23:56 2009 " "Info: Processing ended: Sat May 23 10:23:56 2009" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" {  } {  } 0}  } {  } 0}