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📄 prev_cmp_fifo.sta.qmsg

📁 TCC221图象传感器和FPGA实现图象采集 开发环境是quartus
💻 QMSG
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus II " "Info: Running Quartus II TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.1 Build 156 04/30/2007 SJ Full Version " "Info: Version 7.1 Build 156 04/30/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Jun 18 16:19:46 2008 " "Info: Processing started: Wed Jun 18 16:19:46 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta fifo -c fifo " "Info: Command: quartus_sta fifo -c fifo" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "0" "" "Info: qsta_default_script.tcl version: 24.0.1.7" {  } {  } 0 0 "qsta_default_script.tcl version: 24.0.1.7" 0 0 "" 0}
{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "fifo.sdc " "Critical Warning: SDC file not found: 'fifo.sdc'" {  } {  } 1 0 "SDC file not found: '%1!s!'" 0 0 "" 0}
{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "Info: No base clocks found in the design. Calling \"derive_clocks -period 1.0\"" {  } {  } 0 0 "No %1!s! found in the design. Calling %2!s!" 0 0 "" 0}
{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Info: Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -waveform \{0.000 0.500\} -name rdclock rdclock " "Info: create_clock -period 1.000 -waveform \{0.000 0.500\} -name rdclock rdclock" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -waveform \{0.000 0.500\} -name wrclock wrclock " "Info: create_clock -period 1.000 -waveform \{0.000 0.500\} -name wrclock wrclock" {  } {  } 0 0 "%1!s!" 0 0 "" 0}  } {  } 0 0 "%1!s!" 0 0 "" 0}
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Critical Warning: Timing requirements not met" {  } {  } 1 0 "Timing requirements not met" 0 0 "" 0}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup -2.987 " "Info: Worst-case setup slack is -2.987" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.987       -26.792 rdclock  " "Info:    -2.987       -26.792 rdclock " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -1.340        -2.829 wrclock  " "Info:    -1.340        -2.829 wrclock " {  } {  } 0 0 "%1!s!" 0 0 "" 0}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.549 " "Info: Worst-case hold slack is 0.549" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.549         0.000 wrclock  " "Info:     0.549         0.000 wrclock " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.550         0.000 rdclock  " "Info:     0.550         0.000 rdclock " {  } {  } 0 0 "%1!s!" 0 0 "" 0}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "recovery " "Info: No recovery paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "removal " "Info: No removal paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Info: Design is not fully constrained for setup requirements" {  } {  } 0 0 "Design is not fully constrained for %1!s! requirements" 0 0 "" 0}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Info: Design is not fully constrained for hold requirements" {  } {  } 0 0 "Design is not fully constrained for %1!s! requirements" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 2 s Quartus II " "Info: Quartus II TimeQuest Timing Analyzer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "129 " "Info: Allocated 129 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed Jun 18 16:19:48 2008 " "Info: Processing ended: Wed Jun 18 16:19:48 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}

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