📄 uartinterface.lst
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1 .file "UartInterface.c"
2 .arch atmega128
3 __SREG__ = 0x3f
4 __SP_H__ = 0x3e
5 __SP_L__ = 0x3d
6 __tmp_reg__ = 0
7 __zero_reg__ = 1
8 .global __do_copy_data
9 .global __do_clear_bss
11 .text
12 .Ltext0:
57 .global UartInt_init
59 UartInt_init:
1:UartInterface.c **** #include <avr/io.h>
2:UartInterface.c **** #include <avr/interrupt.h>
3:UartInterface.c **** #include <avr/signal.h>
4:UartInterface.c **** #include "CommonDefs.h"
5:UartInterface.c **** #include "UartInterface.h"
6:UartInterface.c **** #include "UIMgr.h"
7:UartInterface.c **** #include "Executive.h"
8:UartInterface.c ****
9:UartInterface.c ****
10:UartInterface.c ****
11:UartInterface.c **** /***********************************************************
12:UartInterface.c **** Function Name: UartInt_init
13:UartInterface.c **** Function Description: This function is responsible for
14:UartInterface.c **** initializing the UART interface on the mega8. This
15:UartInterface.c **** interface is set to communicate at 115.2 Kbps, with an
16:UartInterface.c **** 8N1 protocol.
17:UartInterface.c **** Inputs: none
18:UartInterface.c **** Outputs: none
19:UartInterface.c **** ***********************************************************/
20:UartInterface.c **** void UartInt_init(void)
21:UartInterface.c **** {
61 .LM1:
62 /* prologue: frame size=0 */
63 /* prologue end (size=0) */
22:UartInterface.c **** /* set up the baud rate registers so the UART will operate
23:UartInterface.c **** at 115.2 Kbps */
24:UartInterface.c **** UBRR0H = 0x00;
65 .LM2:
66 0000 1092 9000 sts 144,__zero_reg__
25:UartInterface.c ****
26:UartInterface.c **** UBRR0L = 18; /* 18 for double clocking at 115.2 kbps */ //0x2F
68 .LM3:
69 0004 82E1 ldi r24,lo8(18)
70 0006 89B9 out 41-0x20,r24
27:UartInterface.c ****
28:UartInterface.c ****
29:UartInterface.c **** /* enable the tx and rx capabilities of the UART...as well
30:UartInterface.c **** as the receive complete interrupt */
31:UartInterface.c **** UCSR0B = (1<<RXCIE0)|(1<<RXEN0)|(1<<TXEN0);
72 .LM4:
73 0008 88E9 ldi r24,lo8(-104)
74 000a 8AB9 out 42-0x20,r24
32:UartInterface.c ****
33:UartInterface.c **** /* set up the control registers so the UART works at 8N1 */
34:UartInterface.c **** UCSR0C = (1<<UCSZ01)|(1<<UCSZ00);//数据位：8
76 .LM5:
77 000c 86E0 ldi r24,lo8(6)
78 000e 8093 9500 sts 149,r24
35:UartInterface.c ****
36:UartInterface.c **** /* set the baud rate to use the double-speed */
37:UartInterface.c **** UCSR0A = (0<<U2X0); //1
80 .LM6:
81 0012 1BB8 out 43-0x20,__zero_reg__
82 /* epilogue: frame size=0 */
83 0014 0895 ret
84 /* epilogue end (size=1) */
85 /* function UartInt_init size 11 (10) */
87 .Lscope0:
90 .global UartInt_txByte
92 UartInt_txByte:
38:UartInterface.c ****
39:UartInterface.c **** }
40:UartInterface.c ****
41:UartInterface.c **** /***********************************************************
42:UartInterface.c **** Function Name: UartInt_txByte
43:UartInterface.c **** Function Description: This function is responsible for
44:UartInterface.c **** transmitting a single byte on the uart.
45:UartInterface.c **** Inputs: txByte - the byte to send
46:UartInterface.c **** Outputs: none
47:UartInterface.c **** NOTES: When the TX UDRE (data register empty) is set, there
48:UartInterface.c **** is puposefully no interrupt...thus, to send a string of
49:UartInterface.c **** data out, the calling routine needs to hold up the entire
50:UartInterface.c **** application while this takes place (or just send one
51:UartInterface.c **** byte at a time at strtegically timed intervals, like
52:UartInterface.c **** the stats data is sent out :-)
53:UartInterface.c **** ***********************************************************/
54:UartInterface.c **** void UartInt_txByte(unsigned char txByte)
55:UartInterface.c **** {
94 .LM7:
95 /* prologue: frame size=0 */
96 /* prologue end (size=0) */
97 .L3:
56:UartInterface.c **** /* Wait for empty transmit buffer */
57:UartInterface.c **** while ( !( UCSR0A & (1<<UDRE0)) );
99 .LM8:
100 0016 5D9B sbis 43-0x20,5
101 0018 FECF rjmp .L3
58:UartInterface.c **** /* Put data into buffer, sends the data */
59:UartInterface.c **** UDR0 = txByte;
103 .LM9:
104 001a 8CB9 out 44-0x20,r24
105 /* epilogue: frame size=0 */
106 001c 0895 ret
107 /* epilogue end (size=1) */
108 /* function UartInt_txByte size 4 (3) */
110 .Lscope1:
112 .global __vector_18
114 __vector_18:
60:UartInterface.c **** }
61:UartInterface.c ****
62:UartInterface.c **** /***********************************************************
63:UartInterface.c **** Function Name: SIG_UART_RECV ISR
64:UartInterface.c **** Function Description: This function is responsible for
65:UartInterface.c **** handling the interrupt caused when a data byte is
66:UartInterface.c **** received by the UART.
67:UartInterface.c **** Inputs: none
68:UartInterface.c **** Outputs: none
69:UartInterface.c **** NOTES: This function was originally written in assembly,
70:UartInterface.c **** but moved over to C when the setting of the "T" bit at
71:UartInterface.c **** the end of the routine was no longer necessary (this
72:UartInterface.c **** theoretically allowed the AVRcam to respond to serial
73:UartInterface.c **** bytes in the middle of tracking or dumping a frame.
74:UartInterface.c **** But it wasn't really needed, and understanding the C
75:UartInterface.c **** is easier :-)
76:UartInterface.c **** ***********************************************************/
77:UartInterface.c **** SIGNAL(SIG_UART0_RECV)
78:UartInterface.c **** {
116 .LM10:
117 /* prologue: frame size=0 */
118 001e 1F92 push __zero_reg__
119 0020 0F92 push __tmp_reg__
120 0022 0FB6 in __tmp_reg__,__SREG__
121 0024 0F92 push __tmp_reg__
122 0026 1124 clr __zero_reg__
123 0028 2F93 push r18
124 002a 8F93 push r24
125 002c 9F93 push r25
126 002e EF93 push r30
127 0030 FF93 push r31
128 /* prologue end (size=10) */
79:UartInterface.c **** unsigned char tmpHead;
80:UartInterface.c **** /* read the data byte, put it in the serial queue, and
81:UartInterface.c **** post the event */
82:UartInterface.c ****
83:UartInterface.c **** UIMgr_rxFifo[UIMgr_rxFifoHead] = UDR0;
130 .LM11:
131 0032 2091 0000 lds r18,UIMgr_rxFifoHead
132 0036 80E0 ldi r24,lo8(UIMgr_rxFifo)
133 0038 90E0 ldi r25,hi8(UIMgr_rxFifo)
134 003a FC01 movw r30,r24
135 003c E20F add r30,r18
136 003e F11D adc r31,__zero_reg__
137 0040 8CB1 in r24,44-0x20
138 0042 8083 st Z,r24
84:UartInterface.c ****
85:UartInterface.c **** /* now move the head up */
86:UartInterface.c **** tmpHead = (UIMgr_rxFifoHead + 1) & (UI_MGR_RX_FIFO_MASK);//31
140 .LM12:
141 0044 2F5F subi r18,lo8(-(1))
142 0046 2F71 andi r18,lo8(31)
87:UartInterface.c **** UIMgr_rxFifoHead = tmpHead;
144 .LM13:
145 0048 2093 0000 sts UIMgr_rxFifoHead,r18
88:UartInterface.c ****
89:UartInterface.c **** /* write the serial received event to the event fifo */
90:UartInterface.c **** Exec_eventFifo[Exec_eventFifoHead] = EV_SERIAL_DATA_RECEIVED;
147 .LM14:
148 004c 2091 0000 lds r18,Exec_eventFifoHead
149 0050 80E0 ldi r24,lo8(Exec_eventFifo)
150 0052 90E0 ldi r25,hi8(Exec_eventFifo)
151 0054 FC01 movw r30,r24
152 0056 E20F add r30,r18
153 0058 F11D adc r31,__zero_reg__
154 005a 81E0 ldi r24,lo8(1)
155 005c 8083 st Z,r24
91:UartInterface.c ****
92:UartInterface.c **** /* now move the head up */
93:UartInterface.c **** tmpHead = (Exec_eventFifoHead + 1) & (EXEC_EVENT_FIFO_MASK);
157 .LM15:
158 005e 280F add r18,r24
159 0060 2770 andi r18,lo8(7)
94:UartInterface.c **** Exec_eventFifoHead = tmpHead;
161 .LM16:
162 0062 2093 0000 sts Exec_eventFifoHead,r18
163 /* epilogue: frame size=0 */
164 0066 FF91 pop r31
165 0068 EF91 pop r30
166 006a 9F91 pop r25
167 006c 8F91 pop r24
168 006e 2F91 pop r18
169 0070 0F90 pop __tmp_reg__
170 0072 0FBE out __SREG__,__tmp_reg__
171 0074 0F90 pop __tmp_reg__
172 0076 1F90 pop __zero_reg__
173 0078 1895 reti
174 /* epilogue end (size=10) */
175 /* function __vector_18 size 46 (26) */
180 .Lscope2:
181 .text
183 Letext:
184 /* File "UartInterface.c": code 61 = 0x003d ( 39), prologues 10, epilogues 12 */
DEFINED SYMBOLS
*ABS*:00000000 UartInterface.c
*ABS*:0000003f __SREG__
*ABS*:0000003e __SP_H__
*ABS*:0000003d __SP_L__
*ABS*:00000000 __tmp_reg__
*ABS*:00000001 __zero_reg__
C:\DOCUME~1\ADMINI~1\LOCALS~1\Temp/cc4Aaaaa.s:59 .text:00000000 UartInt_init
C:\DOCUME~1\ADMINI~1\LOCALS~1\Temp/cc4Aaaaa.s:92 .text:00000016 UartInt_txByte
C:\DOCUME~1\ADMINI~1\LOCALS~1\Temp/cc4Aaaaa.s:114 .text:0000001e __vector_18
C:\DOCUME~1\ADMINI~1\LOCALS~1\Temp/cc4Aaaaa.s:183 .text:0000007a Letext
UNDEFINED SYMBOLS
__do_copy_data
__do_clear_bss
UIMgr_rxFifoHead
UIMgr_rxFifo
Exec_eventFifoHead
Exec_eventFifo
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