📄 i2cinterface.lst
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1 .file "I2CInterface.c"
2 .arch atmega128
3 __SREG__ = 0x3f
4 __SP_H__ = 0x3e
5 __SP_L__ = 0x3d
6 __tmp_reg__ = 0
7 __zero_reg__ = 1
8 .global __do_copy_data
9 .global __do_clear_bss
11 .text
12 .Ltext0:
62 .global I2CInt_init
64 I2CInt_init:
1:I2CInterface.c **** /***********************************************************
2:I2CInterface.c **** Module Name: I2CInterface.c
3:I2CInterface.c **** Module Date: 4/10/2004
4:I2CInterface.c **** Module Auth: John Orlando
5:I2CInterface.c ****
6:I2CInterface.c **** Description: This module is responsible for providing a
7:I2CInterface.c **** low-level interface to the I2C hardware resident on the
8:I2CInterface.c **** mega8 processor (also known as the Two-Wire Interface,
9:I2CInterface.c **** or TWI). The interface is needed to configure the
10:I2CInterface.c **** needed registers in the OV6620 camera. This interface
11:I2CInterface.c **** is interrupt-driven based on the events that should
12:I2CInterface.c **** occur upon successful writing of an I2C register.
13:I2CInterface.c ****
14:I2CInterface.c **** Revision History:
15:I2CInterface.c **** Date Rel Ver. Notes
16:I2CInterface.c **** 4/10/2004 0.1 Module created
17:I2CInterface.c **** 6/30/2004 1.0 Initial release for Circuit Cellar
18:I2CInterface.c **** contest.
19:I2CInterface.c ****
20:I2CInterface.c **** ***********************************************************/
21:I2CInterface.c ****
22:I2CInterface.c **** /* Includes */
23:I2CInterface.c **** #include <avr/io.h>
24:I2CInterface.c **** #include "twi.h"
25:I2CInterface.c **** #include <avr/signal.h>
26:I2CInterface.c **** #include <avr/interrupt.h>
27:I2CInterface.c **** #include "CamConfig.h"
28:I2CInterface.c **** #include "CommonDefs.h"
29:I2CInterface.c ****
30:I2CInterface.c **** /* Local Variables */
31:I2CInterface.c ****
32:I2CInterface.c **** /* These variables are used as storage space for the current
33:I2CInterface.c **** I2C command being sent over the interface. They need to
34:I2CInterface.c **** be volatile since they are dealt with an the TWI ISR */
35:I2CInterface.c **** volatile static unsigned char twi_address;
36:I2CInterface.c **** volatile static unsigned char *twi_data;
37:I2CInterface.c **** volatile static unsigned char twi_ddr;
38:I2CInterface.c **** volatile static unsigned char twi_bytes;
39:I2CInterface.c **** volatile static unsigned char status;
40:I2CInterface.c **** volatile static unsigned char retry_cnt;
41:I2CInterface.c ****
42:I2CInterface.c **** /* Local Structures and Typedefs */
43:I2CInterface.c ****
44:I2CInterface.c **** /* Extern Variables */
45:I2CInterface.c ****
46:I2CInterface.c **** /* Definitions */
47:I2CInterface.c **** /* Bit definitions for the tw_status register */
48:I2CInterface.c **** #define MAX_TWI_RETRIES 2
49:I2CInterface.c **** #define BUSY 7
50:I2CInterface.c ****
51:I2CInterface.c **** /***********************************************************
52:I2CInterface.c **** Function Name: I2CInt_init
53:I2CInterface.c **** Function Description: This function is responsible
54:I2CInterface.c **** for setting up the registers needed for the TWI
55:I2CInterface.c **** interface
56:I2CInterface.c ****
57:I2CInterface.c **** Inputs: none
58:I2CInterface.c **** Outputs: none
59:I2CInterface.c **** ***********************************************************/
60:I2CInterface.c **** void I2CInt_init(void)
61:I2CInterface.c **** {
66 .LM1:
67 /* prologue: frame size=0 */
68 /* prologue end (size=0) */
62:I2CInterface.c **** TWSR = 0;
70 .LM2:
71 0000 1092 7100 sts 113,__zero_reg__
63:I2CInterface.c ****
64:I2CInterface.c **** /* init the speed of the I2C interface, running at
65:I2CInterface.c **** 100 Kbps */
66:I2CInterface.c **** TWBR = (FOSC / I2C_SPEED - 16)/2;
73 .LM3:
74 0004 88E4 ldi r24,lo8(72)
75 0006 8093 7000 sts 112,r24
76 /* epilogue: frame size=0 */
77 000a 0895 ret
78 /* epilogue end (size=1) */
79 /* function I2CInt_init size 6 (5) */
81 .Lscope0:
86 .global I2CInt_writeData
88 I2CInt_writeData:
67:I2CInterface.c **** }
68:I2CInterface.c ****
69:I2CInterface.c **** /***********************************************************
70:I2CInterface.c **** Function Name: I2CInt_writeData
71:I2CInterface.c **** Function Description: This function is responsible for
72:I2CInterface.c **** initiating the process of writing a sequence of bytes
73:I2CInterface.c **** an I2C slave address. This function will try to write
74:I2CInterface.c **** the data three times before giving up.
75:I2CInterface.c **** Inputs: address: the address of the I2C slave device
76:I2CInterface.c **** data: a pointer to the data to be written
77:I2CInterface.c **** to the slave...for camera interfacing,
78:I2CInterface.c **** the data follows a <register #><data>
79:I2CInterface.c **** format
80:I2CInterface.c **** bytes: the number of bytes to write
81:I2CInterface.c **** Outputs: none
82:I2CInterface.c **** ***********************************************************/
83:I2CInterface.c **** void I2CInt_writeData(unsigned char address, unsigned char *data, unsigned char bytes)
84:I2CInterface.c **** {
90 .LM4:
91 /* prologue: frame size=0 */
92 /* prologue end (size=0) */
93 000c 982F mov r25,r24
94 .L3:
85:I2CInterface.c **** while(status & (1<<BUSY)); /* Bus is busy wait (or exit with error code) */
96 .LM5:
97 000e 8091 0000 lds r24,status
98 0012 8823 tst r24
99 0014 E4F3 brlt .L3
100 .L6:
86:I2CInterface.c **** while(TWCR & (1<<TWSTO));
102 .LM6:
103 0016 8091 7400 lds r24,116
104 001a 84FD sbrc r24,4
105 001c FCCF rjmp .L6
87:I2CInterface.c ****
88:I2CInterface.c **** /* copy the needed data and state info to our local I2C command structure */
89:I2CInterface.c **** twi_address = address;
107 .LM7:
108 001e 9093 0000 sts twi_address,r25
90:I2CInterface.c **** twi_data = data;
110 .LM8:
111 0022 7093 0000 sts (twi_data)+1,r23
112 0026 6093 0000 sts twi_data,r22
91:I2CInterface.c **** twi_bytes = bytes;
114 .LM9:
115 002a 4093 0000 sts twi_bytes,r20
92:I2CInterface.c **** twi_ddr = TW_WRITE;
117 .LM10:
118 002e 1092 0000 sts twi_ddr,__zero_reg__
93:I2CInterface.c ****
94:I2CInterface.c **** retry_cnt = 0;
120 .LM11:
121 0032 1092 0000 sts retry_cnt,__zero_reg__
95:I2CInterface.c ****
96:I2CInterface.c **** /* Generate start condition, the remainder of the transfer is interrupt driven and
97:I2CInterface.c **** will be performed in the background */
98:I2CInterface.c **** TWCR = (1<<TWINT)|(1<<TWSTA)|(1<<TWEN)|(1<<TWIE);
123 .LM12:
124 0036 85EA ldi r24,lo8(-91)
125 0038 8093 7400 sts 116,r24
99:I2CInterface.c ****
100:I2CInterface.c **** status |= (1<<BUSY);
127 .LM13:
128 003c 8091 0000 lds r24,status
129 0040 8068 ori r24,lo8(-128)
130 0042 8093 0000 sts status,r24
131 /* epilogue: frame size=0 */
132 0046 0895 ret
133 /* epilogue end (size=1) */
134 /* function I2CInt_writeData size 31 (30) */
136 .Lscope1:
141 .global I2CInt_readData
143 I2CInt_readData:
101:I2CInterface.c **** }
102:I2CInterface.c ****
103:I2CInterface.c **** /***********************************************************
104:I2CInterface.c **** Function Name: I2CInt_readData
105:I2CInterface.c **** Function Description: This funcion is responsible for
106:I2CInterface.c **** reading the specified number of bytes from a slave
107:I2CInterface.c **** device.
108:I2CInterface.c **** Inputs: address: the slave address to read from
109:I2CInterface.c **** data: a pointer to where the data will be stored
110:I2CInterface.c **** bytes: the number of bytes to read
111:I2CInterface.c **** Outputs: none
112:I2CInterface.c **** ***********************************************************/
113:I2CInterface.c **** void I2CInt_readData(unsigned char address, unsigned char *data, unsigned char bytes)
114:I2CInterface.c **** {
145 .LM14:
146 /* prologue: frame size=0 */
147 /* prologue end (size=0) */
148 0048 982F mov r25,r24
149 .L10:
115:I2CInterface.c **** /* Bus is busy wait (or exit with error code) */
116:I2CInterface.c **** while(status & (1<<BUSY));
151 .LM15:
152 004a 8091 0000 lds r24,status
153 004e 8823 tst r24
154 0050 E4F3 brlt .L10
117:I2CInterface.c ****
118:I2CInterface.c **** twi_address = address;
156 .LM16:
157 0052 9093 0000 sts twi_address,r25
119:I2CInterface.c **** twi_data = data;
159 .LM17:
160 0056 7093 0000 sts (twi_data)+1,r23
161 005a 6093 0000 sts twi_data,r22
120:I2CInterface.c **** twi_bytes = bytes;
163 .LM18:
164 005e 4093 0000 sts twi_bytes,r20
121:I2CInterface.c **** twi_ddr = TW_READ;
166 .LM19:
167 0062 81E0 ldi r24,lo8(1)
168 0064 8093 0000 sts twi_ddr,r24
122:I2CInterface.c ****
123:I2CInterface.c **** retry_cnt = 0;
170 .LM20:
171 0068 1092 0000 sts retry_cnt,__zero_reg__
124:I2CInterface.c ****
125:I2CInterface.c **** /* Generate start condition, the remainder of the transfer is interrupt driven and
126:I2CInterface.c **** will be performed in the background */
127:I2CInterface.c **** TWCR = (1<<TWINT)|(1<<TWSTA)|(1<<TWEN)|(1<<TWIE);
173 .LM21:
174 006c 85EA ldi r24,lo8(-91)
175 006e 8093 7400 sts 116,r24
128:I2CInterface.c ****
129:I2CInterface.c **** status |= (1<<BUSY);
177 .LM22:
178 0072 8091 0000 lds r24,status
179 0076 8068 ori r24,lo8(-128)
180 0078 8093 0000 sts status,r24
181 /* epilogue: frame size=0 */
182 007c 0895 ret
183 /* epilogue end (size=1) */
184 /* function I2CInt_readData size 28 (27) */
186 .Lscope2:
188 .global I2CInt_isI2cBusy
190 I2CInt_isI2cBusy:
130:I2CInterface.c **** }
131:I2CInterface.c ****
132:I2CInterface.c **** /***********************************************************
133:I2CInterface.c **** Function Name: I2CInt_isI2cBusy
134:I2CInterface.c **** Function Description: This funcion is responsible for
135:I2CInterface.c **** indicating if the I2C bus is currently busy to external
136:I2CInterface.c **** modules.
137:I2CInterface.c **** device.
138:I2CInterface.c **** Inputs: none
139:I2CInterface.c **** Outputs: bool_t - indicating if bus is busy
140:I2CInterface.c **** ***********************************************************/
141:I2CInterface.c **** bool_t I2CInt_isI2cBusy(void)
142:I2CInterface.c **** {
192 .LM23:
193 /* prologue: frame size=0 */
194 /* prologue end (size=0) */
143:I2CInterface.c **** bool_t retVal = FALSE;
196 .LM24:
197 007e 90E0 ldi r25,lo8(0)
144:I2CInterface.c **** if ( (status & (1<<BUSY)) != 0)
199 .LM25:
200 0080 8091 0000 lds r24,status
201 0084 8823 tst r24
202 0086 0CF4 brge .L14
145:I2CInterface.c **** {
146:I2CInterface.c **** retVal = TRUE;
204 .LM26:
205 0088 91E0 ldi r25,lo8(1)
206 .L14:
147:I2CInterface.c **** }
148:I2CInterface.c ****
149:I2CInterface.c **** return(retVal);
150:I2CInterface.c **** }
208 .LM27:
209 008a 892F mov r24,r25
210 008c 9927 clr r25
211 /* epilogue: frame size=0 */
212 008e 0895 ret
213 /* epilogue end (size=1) */
214 /* function I2CInt_isI2cBusy size 9 (8) */
219 .Lscope3:
221 .global __vector_33
223 __vector_33:
151:I2CInterface.c ****
152:I2CInterface.c **** /***********************************************************
153:I2CInterface.c **** Function Name: <interrupt handler for I2C>
154:I2CInterface.c **** Function Description: This function is responsible for
155:I2CInterface.c **** implementing the control logic needed to perform a
156:I2CInterface.c **** read or write operation with an I2C slave.
157:I2CInterface.c **** Inputs: none
158:I2CInterface.c **** Outputs: none
159:I2CInterface.c **** ***********************************************************/
160:I2CInterface.c **** SIGNAL(SIG_2WIRE_SERIAL)
161:I2CInterface.c **** {
225 .LM28:
226 /* prologue: frame size=0 */
227 0090 1F92 push __zero_reg__
228 0092 0F92 push __tmp_reg__
229 0094 0FB6 in __tmp_reg__,__SREG__
230 0096 0F92 push __tmp_reg__
231 0098 1124 clr __zero_reg__
232 009a 8F93 push r24
233 009c 9F93 push r25
234 009e EF93 push r30
235 00a0 FF93 push r31
236 /* prologue end (size=9) */
162:I2CInterface.c **** unsigned char TWI_status = TWSR & TW_STATUS_MASK; /* grab just the status bits */
238 .LM29:
239 00a2 8091 7100 lds r24,113
240 00a6 887F andi r24,lo8(-8)
163:I2CInterface.c ****
164:I2CInterface.c **** /* the entire I2C handler is state-based...determine
165:I2CInterface.c **** what needs to be done based on TWI_status */
166:I2CInterface.c **** switch(TWI_status)
242 .LM30:
243 00a8 9927 clr r25
244 00aa 8832 cpi r24,40
245 00ac 9105 cpc r25,__zero_reg__
246 00ae 09F4 brne .+2
247 00b0 6AC0 rjmp .L23
249 .LM31:
250 00b2 8932 cpi r24,41
251 00b4 9105 cpc r25,__zero_reg__
252 00b6 84F4 brge .L34
253 00b8 8031 cpi r24,16
254 00ba 9105 cpc r25,__zero_reg__
255 00bc 31F1 breq .L18
256 00be 8131 cpi r24,17
257 00c0 9105 cpc r25,__zero_reg__
258 00c2 1CF4 brge .L35
259 00c4 0897 sbiw r24,8
260 00c6 09F1 breq .L18
261 00c8 DBC0 rjmp .L15
262 .L35:
263 00ca 8831 cpi r24,24
264 00cc 9105 cpc r25,__zero_reg__
265 00ce D9F1 breq .L20
266 00d0 8097 sbiw r24,32
267 00d2 09F4 brne .+2
268 00d4 4DC0 rjmp .L22
269 00d6 D4C0 rjmp .L15
270 .L34:
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