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📄 avrcam.lss

📁 mg128+Ov7620实现图象采集
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 76e:	08 95       	ret

00000770 <UIMgr_flushTxBuffer>:
	}
}

/***********************************************************
	Function Name: UIMgr_flushTxBuffer
	Function Description: This function is responsible for
	sending all data currently in the serial tx buffer
	to the user.
	Inputs:  none
	Outputs: none
***********************************************************/	
void UIMgr_flushTxBuffer(void)
{
	while(IS_DATA_IN_TX_FIFO() == TRUE)
	{
		UartInt_txByte(UIMgr_readTxFifo() );
 770:	90 91 15 01 	lds	r25, 0x0115
 774:	80 91 16 01 	lds	r24, 0x0116
 778:	98 17       	cp	r25, r24
 77a:	51 f0       	breq	.+20     	; 0x790
 77c:	0e 94 db 03 	call	0x7b6
 780:	0e 94 09 04 	call	0x812
 784:	90 91 15 01 	lds	r25, 0x0115
 788:	80 91 16 01 	lds	r24, 0x0116
 78c:	98 17       	cp	r25, r24
 78e:	b1 f7       	brne	.-20     	; 0x77c
 790:	08 95       	ret

00000792 <UIMgr_readRxFifo>:
	}
}

/***********************************************************
	Function Name: UIMgr_readRxFifo
	Function Description: This function is responsible for
	reading a single byte of data from the rx fifo, and
	updating the appropriate pointers.
	Inputs:  none 
	Outputs: unsigned char-the data read
***********************************************************/	
static unsigned char UIMgr_readRxFifo(void)
{
	unsigned char dataByte, tmpTail;
	
	/* just return the current tail from the rx fifo */
	DISABLE_INTS();
 792:	f8 94       	cli
	dataByte = UIMgr_rxFifo[UIMgr_rxFifoTail];	
 794:	20 91 14 01 	lds	r18, 0x0114
 798:	8f ee       	ldi	r24, 0xEF	; 239
 79a:	93 e0       	ldi	r25, 0x03	; 3
 79c:	fc 01       	movw	r30, r24
 79e:	e2 0f       	add	r30, r18
 7a0:	f1 1d       	adc	r31, r1
 7a2:	90 81       	ld	r25, Z
	tmpTail = (UIMgr_rxFifoTail+1) & (UI_MGR_RX_FIFO_MASK);
 7a4:	82 2f       	mov	r24, r18
 7a6:	8f 5f       	subi	r24, 0xFF	; 255
 7a8:	8f 71       	andi	r24, 0x1F	; 31
	UIMgr_rxFifoTail = tmpTail;
 7aa:	80 93 14 01 	sts	0x0114, r24
	ENABLE_INTS();
 7ae:	78 94       	sei
	
	return(dataByte);
}
 7b0:	89 2f       	mov	r24, r25
 7b2:	99 27       	eor	r25, r25
 7b4:	08 95       	ret

000007b6 <UIMgr_readTxFifo>:

/***********************************************************
	Function Name: UIMgr_readTxFifo
	Function Description: This function is responsible for
	reading a single byte of data from the tx fifo, and
	updating the appropriate pointers.
	Inputs:  none 
	Outputs: unsigned char-the data read
***********************************************************/	
static unsigned char UIMgr_readTxFifo(void)
{
	unsigned char dataByte, tmpTail;
	
	/* just return the current tail from the tx fifo */
	DISABLE_INTS();
 7b6:	f8 94       	cli
	dataByte = UIMgr_txFifo[UIMgr_txFifoTail];	
 7b8:	20 91 16 01 	lds	r18, 0x0116
 7bc:	8f e0       	ldi	r24, 0x0F	; 15
 7be:	94 e0       	ldi	r25, 0x04	; 4
 7c0:	fc 01       	movw	r30, r24
 7c2:	e2 0f       	add	r30, r18
 7c4:	f1 1d       	adc	r31, r1
 7c6:	90 81       	ld	r25, Z
	tmpTail = (UIMgr_txFifoTail+1) & (UI_MGR_TX_FIFO_MASK);
 7c8:	82 2f       	mov	r24, r18
 7ca:	8f 5f       	subi	r24, 0xFF	; 255
 7cc:	8f 73       	andi	r24, 0x3F	; 63
	UIMgr_txFifoTail = tmpTail;
 7ce:	80 93 16 01 	sts	0x0116, r24
	ENABLE_INTS();
 7d2:	78 94       	sei
	
	return(dataByte);
}
 7d4:	89 2f       	mov	r24, r25
 7d6:	99 27       	eor	r25, r25
 7d8:	08 95       	ret

000007da <UIMgr_writeTxFifo>:

/***********************************************************
	Function Name: UIMgr_writeTxFifo
	Function Description: This function is responsible for
	writing a single byte to the TxFifo and
	updating the appropriate pointers.
	Inputs:  data - the byte to write to the Fifo 
	Outputs: none
***********************************************************/	
void UIMgr_writeTxFifo(unsigned char data)
{
 7da:	38 2f       	mov	r19, r24
	unsigned char tmpHead;

	DISABLE_INTS();
 7dc:	f8 94       	cli
	UIMgr_txFifo[UIMgr_txFifoHead] = data;
 7de:	20 91 15 01 	lds	r18, 0x0115
 7e2:	8f e0       	ldi	r24, 0x0F	; 15
 7e4:	94 e0       	ldi	r25, 0x04	; 4
 7e6:	fc 01       	movw	r30, r24
 7e8:	e2 0f       	add	r30, r18
 7ea:	f1 1d       	adc	r31, r1
 7ec:	30 83       	st	Z, r19

    /* now move the head up */
    tmpHead = (UIMgr_txFifoHead + 1) & (UI_MGR_TX_FIFO_MASK);
 7ee:	82 2f       	mov	r24, r18
 7f0:	8f 5f       	subi	r24, 0xFF	; 255
 7f2:	8f 73       	andi	r24, 0x3F	; 63
    UIMgr_txFifoHead = tmpHead;
 7f4:	80 93 15 01 	sts	0x0115, r24
	ENABLE_INTS();
 7f8:	78 94       	sei
 7fa:	08 95       	ret

000007fc <UartInt_init>:
void UartInt_init(void)
{	
	/* set up the baud rate registers so the UART will operate
	at 115.2 Kbps */
	UBRR0H = 0x00;
 7fc:	10 92 90 00 	sts	0x0090, r1

    UBRR0L = 18;  /* 18 for double clocking at 115.2 kbps */  //0x2F
 800:	82 e1       	ldi	r24, 0x12	; 18
 802:	89 b9       	out	0x09, r24	; 9
    
	
	/* enable the tx and rx capabilities of the UART...as well 
		as the receive complete interrupt */
	UCSR0B = (1<<RXCIE0)|(1<<RXEN0)|(1<<TXEN0);	
 804:	88 e9       	ldi	r24, 0x98	; 152
 806:	8a b9       	out	0x0a, r24	; 10
	
	/* set up the control registers so the UART works at 8N1 */
	UCSR0C = (1<<UCSZ01)|(1<<UCSZ00);//数据位:8
 808:	86 e0       	ldi	r24, 0x06	; 6
 80a:	80 93 95 00 	sts	0x0095, r24
    
    /* set the baud rate to use the double-speed */
    UCSR0A = (0<<U2X0);		//1
 80e:	1b b8       	out	0x0b, r1	; 11
 810:	08 95       	ret

00000812 <UartInt_txByte>:
	
}

/***********************************************************
	Function Name: UartInt_txByte
	Function Description: This function is responsible for
	transmitting a single byte on the uart.  
	Inputs:  txByte - the byte to send
	Outputs: none
	NOTES: When the TX UDRE (data register empty) is set, there
	is puposefully no interrupt...thus, to send a string of
	data out, the calling routine needs to hold up the entire
	application while this takes place (or just send one
	byte at a time at strtegically timed intervals, like
	the stats data is sent out :-)
***********************************************************/
void UartInt_txByte(unsigned char txByte)
{
	/* Wait for empty transmit buffer */
	while ( !( UCSR0A & (1<<UDRE0)) );
 812:	5d 9b       	sbis	0x0b, 5	; 11
 814:	fe cf       	rjmp	.-4      	; 0x812
	/* Put data into buffer, sends the data */
	UDR0 = txByte;
 816:	8c b9       	out	0x0c, r24	; 12
 818:	08 95       	ret

0000081a <__vector_18>:
}

/***********************************************************
	Function Name: SIG_UART_RECV ISR
	Function Description: This function is responsible for
	handling the interrupt caused when a data byte is 
    received by the UART.
	Inputs:  none
	Outputs: none
	NOTES: This function was originally written in assembly,
    but moved over to C when the setting of the "T" bit at
    the end of the routine was no longer necessary (this
    theoretically allowed the AVRcam to respond to serial
    bytes in the middle of tracking or dumping a frame.
    But it wasn't really needed, and understanding the C
    is easier  :-)
***********************************************************/
SIGNAL(SIG_UART0_RECV)
{
 81a:	1f 92       	push	r1
 81c:	0f 92       	push	r0
 81e:	0f b6       	in	r0, 0x3f	; 63
 820:	0f 92       	push	r0
 822:	11 24       	eor	r1, r1
 824:	2f 93       	push	r18
 826:	8f 93       	push	r24
 828:	9f 93       	push	r25
 82a:	ef 93       	push	r30
 82c:	ff 93       	push	r31
    unsigned char tmpHead;
    /* read the data byte, put it in the serial queue, and
    post the event */
 
    UIMgr_rxFifo[UIMgr_rxFifoHead] = UDR0;
 82e:	20 91 13 01 	lds	r18, 0x0113
 832:	8f ee       	ldi	r24, 0xEF	; 239
 834:	93 e0       	ldi	r25, 0x03	; 3
 836:	fc 01       	movw	r30, r24
 838:	e2 0f       	add	r30, r18
 83a:	f1 1d       	adc	r31, r1
 83c:	8c b1       	in	r24, 0x0c	; 12
 83e:	80 83       	st	Z, r24

    /* now move the head up */
    tmpHead = (UIMgr_rxFifoHead + 1) & (UI_MGR_RX_FIFO_MASK);//31
 840:	2f 5f       	subi	r18, 0xFF	; 255
 842:	2f 71       	andi	r18, 0x1F	; 31
    UIMgr_rxFifoHead = tmpHead;
 844:	20 93 13 01 	sts	0x0113, r18
    
    /* write the serial received event to the event fifo */
    Exec_eventFifo[Exec_eventFifoHead] = EV_SERIAL_DATA_RECEIVED;
 848:	20 91 0e 01 	lds	r18, 0x010E
 84c:	87 ee       	ldi	r24, 0xE7	; 231
 84e:	93 e0       	ldi	r25, 0x03	; 3
 850:	fc 01       	movw	r30, r24
 852:	e2 0f       	add	r30, r18
 854:	f1 1d       	adc	r31, r1
 856:	81 e0       	ldi	r24, 0x01	; 1
 858:	80 83       	st	Z, r24

    /* now move the head up */
    tmpHead = (Exec_eventFifoHead + 1) & (EXEC_EVENT_FIFO_MASK);
 85a:	28 0f       	add	r18, r24
 85c:	27 70       	andi	r18, 0x07	; 7
    Exec_eventFifoHead = tmpHead;
 85e:	20 93 0e 01 	sts	0x010E, r18
 862:	ff 91       	pop	r31
 864:	ef 91       	pop	r30
 866:	9f 91       	pop	r25
 868:	8f 91       	pop	r24
 86a:	2f 91       	pop	r18
 86c:	0f 90       	pop	r0
 86e:	0f be       	out	0x3f, r0	; 63
 870:	0f 90       	pop	r0
 872:	1f 90       	pop	r1
 874:	18 95       	reti

00000876 <I2CInt_init>:
	Outputs: none
***********************************************************/	
void I2CInt_init(void)
{
	TWSR = 0;
 876:	10 92 71 00 	sts	0x0071, r1
    
	/* init the speed of the I2C interface, running at
    100 Kbps */
	TWBR = (FOSC / I2C_SPEED - 16)/2;
 87a:	88 e4       	ldi	r24, 0x48	; 72
 87c:	80 93 70 00 	sts	0x0070, r24
 880:	08 95       	ret

00000882 <I2CInt_writeData>:
}

/***********************************************************
	Function Name: I2CInt_writeData
	Function Description: This function is responsible for
	initiating the process of writing a sequence of bytes
	an I2C slave address.  This function will try to write
	the data three times before giving up.
	Inputs: address: the address of the I2C slave device
			data: a pointer to the data to be written 
				  to the slave...for camera interfacing,
				  the data follows a <register #><data>
				  format
			bytes: the number of bytes to write 
	Outputs: none
***********************************************************/
void I2CInt_writeData(unsigned char address, unsigned char *data, unsigned char bytes)
{
 882:	98 2f       	mov	r25, r24
	while(status & (1<<BUSY));		/* Bus is busy wait (or exit with error code) */
 884:	80 91 63 01 	lds	r24, 0x0163
 888:	88 23       	and	r24, r24
 88a:	e4 f3       	brlt	.-8      	; 0x884
	while(TWCR & (1<<TWSTO));
 88c:	80 91 74 00 	lds	r24, 0x0074
 890:	84 fd       	sbrc	r24, 4
 892:	fc cf       	rjmp	.-8      	; 0x88c
	
	/* copy the needed data and state info to our local I2C command structure */
	twi_address = address;
 894:	90 93 5e 01 	sts	0x015E, r25
	twi_data = data;
 898:	70 93 60 01 	sts	0x0160, r23
 89c:	60 93 5f 01 	sts	0x015F, r22
	twi_bytes = bytes;
 8a0:	40 93 62 01 	sts	0x0162, r20
	twi_ddr = TW_WRITE;
 8a4:	10 92 61 01 	sts	0x0161, r1

	retry_cnt = 0;
 8a8:	10 92 64 01 	sts	0x0164, r1
	
	/* Generate start condition, the remainder of the transfer is interrupt driven and
	   will be performed in the background */
	TWCR = (1<<TWINT)|(1<<TWSTA)|(1<<TWEN)|(1<<TWIE);
 8ac:	85 ea       	ldi	r24, 0xA5	; 165
 8ae:	80 93 74 00 	sts	0x0074, r24
	
	status |= (1<<BUSY);
 8b2:	80 91 63 01 	lds	r24, 0x0163
 8b6:	80 68       	ori	r24, 0x80	; 128
 8b8:	80 93 63 01 	sts	0x0163, r24
 8bc:	08 95       	ret

000008be <I2CInt_readData>:
}

/***********************************************************
	Function Name: I2CInt_readData
	Function Description: This funcion is responsible for
	reading the specified number of bytes from a slave
	device.
	Inputs:  address: the slave address to read from
			 data: a pointer to where the data will be stored
			 bytes: the number of bytes to read
	Outputs: none
***********************************************************/
void I2CInt_readData(unsigned char address, unsigned char *data, unsigned char bytes)
{
 8be:	98 2f       	mov	r25, r24
    /* Bus is busy wait (or exit with error code) */
	while(status & (1<<BUSY));									
 8c0:	80 91 63 01 	lds	r24, 0x0163
 8c4:	88 23       	and	r24, r24
 8c6:	e4 f3       	brlt	.-8      	; 0x8c0

	twi_address = address;
 8c8:	90 93 5e 01 	sts	0x015E, r25
	twi_data = data;
 8cc:	70 93 60 01 	sts	0x0160, r23
 8d0:	60 93 5f 01 	sts	0x015F, r22
	twi_bytes = bytes;
 8d4:	40 93 62 01 	sts	0x0162, r20
	twi_ddr = TW_READ;
 8d8:	81 e0       	ldi	r24, 0x01	; 1
 8da:	80 93 61 01 	sts	0x0161, r24

	retry_cnt = 0;
 8de:	10 92 64 01 	sts	0x0164, r1
	
	/* Generate start condition, the remainder of the transfer is interrupt driven and
	   will be performed in the background */
	TWCR = (1<<TWINT)|(1<<TWSTA)|(1<<TWEN)|(1<<TWIE);
 8e2:	85 ea       	ldi	r24, 0xA5	; 165
 8e4:	80 93 74 00 	sts	0x0074, r24
	
	status |= (1<<BUSY);
 8e8:	80 91 63 01 	lds	r2

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