📄 avrcam.lss
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AVRCam.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .data 0000000e 00800100 00000db0 00000e44 2**0
CONTENTS, ALLOC, LOAD, DATA
1 .text 00000db0 00000000 00000000 00000094 2**0
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .bss 00000351 0080010e 0080010e 00000e52 2**0
ALLOC
3 .noinit 00000000 0080045f 0080045f 00000e52 2**0
CONTENTS
4 .eeprom 00000000 00810000 00810000 00000e52 2**0
CONTENTS
5 .stab 00002c34 00000000 00000000 00000e54 2**2
CONTENTS, READONLY, DEBUGGING
6 .stabstr 0000120f 00000000 00000000 00003a88 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00000000 <__vectors>:
0: 0c 94 46 00 jmp 0x8c
4: 0c 94 63 00 jmp 0xc6
8: 0c 94 63 00 jmp 0xc6
c: 0c 94 63 00 jmp 0xc6
10: 0c 94 63 00 jmp 0xc6
14: 0c 94 63 00 jmp 0xc6
18: 0c 94 63 00 jmp 0xc6
1c: 0c 94 63 00 jmp 0xc6
20: 0c 94 63 00 jmp 0xc6
24: 0c 94 63 00 jmp 0xc6
28: 0c 94 63 00 jmp 0xc6
2c: 0c 94 63 00 jmp 0xc6
30: 0c 94 63 00 jmp 0xc6
34: 0c 94 63 00 jmp 0xc6
38: 0c 94 8e 06 jmp 0xd1c
3c: 0c 94 63 00 jmp 0xc6
40: 0c 94 63 00 jmp 0xc6
44: 0c 94 63 00 jmp 0xc6
48: 0c 94 0d 04 jmp 0x81a
4c: 0c 94 63 00 jmp 0xc6
50: 0c 94 63 00 jmp 0xc6
54: 0c 94 63 00 jmp 0xc6
58: 0c 94 63 00 jmp 0xc6
5c: 0c 94 63 00 jmp 0xc6
60: 0c 94 63 00 jmp 0xc6
64: 0c 94 63 00 jmp 0xc6
68: 0c 94 63 00 jmp 0xc6
6c: 0c 94 63 00 jmp 0xc6
70: 0c 94 63 00 jmp 0xc6
74: 0c 94 63 00 jmp 0xc6
78: 0c 94 63 00 jmp 0xc6
7c: 0c 94 63 00 jmp 0xc6
80: 0c 94 63 00 jmp 0xc6
84: 0c 94 83 04 jmp 0x906
88: 0c 94 63 00 jmp 0xc6
0000008c <__ctors_end>:
8c: 11 24 eor r1, r1
8e: 1f be out 0x3f, r1 ; 63
90: cf ef ldi r28, 0xFF ; 255
92: d0 e1 ldi r29, 0x10 ; 16
94: de bf out 0x3e, r29 ; 62
96: cd bf out 0x3d, r28 ; 61
00000098 <__do_copy_data>:
98: 11 e0 ldi r17, 0x01 ; 1
9a: a0 e0 ldi r26, 0x00 ; 0
9c: b1 e0 ldi r27, 0x01 ; 1
9e: e0 eb ldi r30, 0xB0 ; 176
a0: fd e0 ldi r31, 0x0D ; 13
a2: 00 e0 ldi r16, 0x00 ; 0
a4: 0b bf out 0x3b, r16 ; 59
a6: 02 c0 rjmp .+4 ; 0xac
000000a8 <.__do_copy_data_loop>:
a8: 07 90 elpm r0, Z+
aa: 0d 92 st X+, r0
000000ac <.__do_copy_data_start>:
ac: ae 30 cpi r26, 0x0E ; 14
ae: b1 07 cpc r27, r17
b0: d9 f7 brne .-10 ; 0xa8
000000b2 <__do_clear_bss>:
b2: 14 e0 ldi r17, 0x04 ; 4
b4: ae e0 ldi r26, 0x0E ; 14
b6: b1 e0 ldi r27, 0x01 ; 1
b8: 01 c0 rjmp .+2 ; 0xbc
000000ba <.do_clear_bss_loop>:
ba: 1d 92 st X+, r1
000000bc <.do_clear_bss_start>:
bc: af 35 cpi r26, 0x5F ; 95
be: b1 07 cpc r27, r17
c0: e1 f7 brne .-8 ; 0xba
c2: 0c 94 87 00 jmp 0x10e
000000c6 <__bad_interrupt>:
c6: 0c 94 95 06 jmp 0xd2a
000000ca <CamInt_init>:
***********************************************************/
void CamInt_init(void)
{
CAM_CONTROL_PORT_DIR &= 0xFB; /* make sure bit2 is clear (input) VSYNC interrupt*/
ca: 8a 98 cbi 0x11, 2 ; 17
//CAM_CONTROL_PORT &= 0x7F; /* set reset line low */
CAM_G_BUS_DIR &= 0x00; /* 8-bit G bus all inputs PortC*/
cc: 84 b3 in r24, 0x14 ; 20
ce: 14 ba out 0x14, r1 ; 20
DDRB |= 0x0A; /* disable the pull-up on PB1 and PB3 */
d0: 87 b3 in r24, 0x17 ; 23
d2: 8a 60 ori r24, 0x0A ; 10
d4: 87 bb out 0x17, r24 ; 23
CAM_RB_BUS_DIR &= 0x00; /* 8-bit RB bus all inputs PortA*/
d6: 8a b3 in r24, 0x1a ; 26
d8: 1a ba out 0x1a, r1 ; 26
/* ensure that timer1 is disabled to start...eventually, when PCLK needs
to feed timer1 through the external counter, it will be enabled on an
"as needed" basis...*/
TCCR1B &= ~( (1<<CS12)|(1<<CS11)|(1<<CS10) );
da: 8e b5 in r24, 0x2e ; 46
dc: 88 7f andi r24, 0xF8 ; 248
de: 8e bd out 0x2e, r24 ; 46
/* we'll turn on the interrupt after we assign the initial TCNT value */
/* set up External Interrupt1 to interrupt us on rising edges (HREF)...
this is needed to indicate when the first pixel of each line is about to start, so
we can synch up with it...this interrupt will be disabled once HREF goes high */
EICRA |= (1<<ISC31) | (1<<ISC30); /* rising edge interrupt *///EICRA
e0: 80 91 6a 00 lds r24, 0x006A
e4: 80 6c ori r24, 0xC0 ; 192
e6: 80 93 6a 00 sts 0x006A, r24
/* the interrupt will be enabled when we are ready to detect the rising edge of
HREF...its now primed and ready to go */
/* set up External Interrupt0 to interrupt us on rising edges (VSYNC) */
EICRA |= (1<<ISC21) | (1<<ISC20); /* rising edge interrupt */
ea: 80 91 6a 00 lds r24, 0x006A
ee: 80 63 ori r24, 0x30 ; 48
f0: 80 93 6a 00 sts 0x006A, r24
EIMSK |= (1<<INT2); /* VSYNC interrupt request enabled */
f4: 89 b7 in r24, 0x39 ; 57
f6: 84 60 ori r24, 0x04 ; 4
f8: 89 bf out 0x39, r24 ; 57
/* set up TimerO to count and be clocked from an external pulse source
(HREF) on falling edges...eventually, we need to enable the interrupt
for this! FIX THIS */
TCCR2 = (1<<CS02)|(1<<CS01)|(0<<CS00);
fa: 86 e0 ldi r24, 0x06 ; 6
fc: 85 bd out 0x25, r24 ; 37
/* setting up the PCLK counter with Timer1 will be done right after
we start receiving pixels in each line...we sacrifice the first pixel
in each line, but we'll account for it...*/
/* set up the mega8 so that its sleep mode puts it in an IDLE sleep
mode, where it can wake up as fast as possible */
set_sleep_mode(SLEEP_MODE_IDLE);
fe: 85 b7 in r24, 0x35 ; 53
100: 83 7e andi r24, 0xE3 ; 227
102: 85 bf out 0x35, r24 ; 53
/* umm....we need to actually enable the sleep mode...*/
MCUCR |= (1<<SE);
104: 85 b7 in r24, 0x35 ; 53
106: 80 62 ori r24, 0x20 ; 32
108: 85 bf out 0x35, r24 ; 53
10a: 08 95 ret
0000010c <CamInt_resetCam>:
}
/***********************************************************
Function Name: CamInt_resetCam
Function Description: This function is responsible
for resetting the camera. This is accomplished by
toggling the reset line on the OV6620 for ~100 mS.
Inputs: none
Outputs: none
IMPORTANT NOTE: This function has effectively been removed
since resetting the camera now causes the camera to not
output the clock signal. Thus, if we reset the cam, the
AVR has no clock, and thus doesn't run...
***********************************************************/
void CamInt_resetCam(void)
{
10c: 08 95 ret
0000010e <main>:
Inputs: none
Outputs: int
***********************************************************/
int main(void)
{
10e: cf ef ldi r28, 0xFF ; 255
110: d0 e1 ldi r29, 0x10 ; 16
112: de bf out 0x3e, r29 ; 62
114: cd bf out 0x3d, r28 ; 61
/* initialize all of the interface modules */
//DebugInt_init();
UartInt_init();
116: 0e 94 fe 03 call 0x7fc
I2CInt_init();
11a: 0e 94 3b 04 call 0x876
CamInt_init();
11e: 0e 94 65 00 call 0xca
//
/* initialize the remaining modules that will process
data...interrupts need to be on for these */
ENABLE_INTS();
122: 78 94 sei
CamConfig_init();
124: 0e 94 84 05 call 0xb08
UIMgr_init();
128: 0e 94 f9 01 call 0x3f2
FrameMgr_init();
12c: 0e 94 11 01 call 0x222
/* provide a short delay for the camera to stabilize before
we let the executive start up */
Utility_delay(1000);
130: 88 ee ldi r24, 0xE8 ; 232
132: 93 e0 ldi r25, 0x03 ; 3
134: 0e 94 fe 05 call 0xbfc
/* the rest of the application will be under the
control of the Executive. */
Exec_run();
138: 0e 94 a2 00 call 0x144
/* this should never be reached */
return(0);
}
13c: 80 e0 ldi r24, 0x00 ; 0
13e: 90 e0 ldi r25, 0x00 ; 0
140: 0c 94 d7 06 jmp 0xdae
00000144 <Exec_run>:
Inputs: none
Outputs: none
***********************************************************/
void Exec_run(void)
{
144: cf 93 push r28
unsigned char eventGenerated;
while(1)
{
if (fastEventBitmask)//初值0x00
146: 80 91 10 01 lds r24, 0x0110
14a: 88 23 and r24, r24
14c: d1 f0 breq .+52 ; 0x182
{
/* an event needing fast processing has been received */
/* a received line needs to be processed...this
needs to be processed as quickly as possible */
if (fastEventBitmask & FEV_ACQUIRE_LINE_COMPLETE)//定时器中断，到此
14e: 80 ff sbrs r24, 0
150: 0b c0 rjmp .+22 ; 0x168
{
DISABLE_INTS();
152: f8 94 cli
fastEventBitmask &= ~FEV_ACQUIRE_LINE_COMPLETE;
154: 80 91 10 01 lds r24, 0x0110
158: 8e 7f andi r24, 0xFE ; 254
15a: 80 93 10 01 sts 0x0110, r24
ENABLE_INTS();
15e: 78 94 sei
FrameMgr_processLine();
160: 0e 94 62 01 call 0x2c4
/* also check if serial data needs to be sent
out through UIMgr */
UIMgr_transmitPendingData();
164: 0e 94 23 02 call 0x446
/* we can't just call acquire line again here,
since we don't know if we need to acquire another
line or not (it depends on the FrameMgr to figure
this out) */
}
if (fastEventBitmask & FEV_PROCESS_LINE_COMPLETE)
168: 80 91 10 01 lds r24, 0x0110
16c: 81 ff sbrs r24, 1
16e: 09 c0 rjmp .+18 ; 0x182
{
DISABLE_INTS();
170: f8 94 cli
fastEventBitmask &= ~FEV_PROCESS_LINE_COMPLETE;
172: 80 91 10 01 lds r24, 0x0110
176: 8d 7f andi r24, 0xFD ; 253
178: 80 93 10 01 sts 0x0110, r24
ENABLE_INTS();
17c: 78 94 sei
FrameMgr_acquireLine();
17e: 0e 94 27 01 call 0x24e
}
}
if (IS_DATA_IN_EVENT_FIFO() == TRUE)
182: 90 91 0e 01 lds r25, 0x010E
186: 80 91 0f 01 lds r24, 0x010F
18a: 98 17 cp r25, r24
18c: e1 f2 breq .-72 ; 0x146
{
eventGenerated = Exec_readEventFifo();
18e: 0e 94 ee 00 call 0x1dc
192: c8 2f mov r28, r24
switch(eventGenerated)
194: 99 27 eor r25, r25
196: 82 30 cpi r24, 0x02 ; 2
198: 91 05 cpc r25, r1
19a: 69 f0 breq .+26 ; 0x1b6
19c: 83 30 cpi r24, 0x03 ; 3
19e: 91 05 cpc r25, r1
1a0: 1c f4 brge .+6 ; 0x1a8
1a2: 01 97 sbiw r24, 0x01 ; 1
1a4: 81 f0 breq .+32 ; 0x1c6
1a6: cf cf rjmp .-98 ; 0x146
1a8: 84 30 cpi r24, 0x04 ; 4
1aa: 91 05 cpc r25, r1
1ac: 41 f0 breq .+16 ; 0x1be
1ae: 80 39 cpi r24, 0x90 ; 144
1b0: 91 05 cpc r25, r1
1b2: 81 f0 breq .+32 ; 0x1d4
1b4: c8 cf rjmp .-112 ; 0x146
{
case (EV_DUMP_FRAME):
FrameMgr_dispatchEvent(eventGenerated);
1b6: 8c 2f mov r24, r28
1b8: 0e 94 12 01 call 0x224
break;
1bc: c4 cf rjmp .-120 ; 0x146
case (EV_PROCESS_FRAME_COMPLETE):
FrameMgr_dispatchEvent(eventGenerated);
1be: 8c 2f mov r24, r28
1c0: 0e 94 12 01 call 0x224
break;
1c4: c0 cf rjmp .-128 ; 0x146
case (EV_SERIAL_DATA_RECEIVED)://串口中断，转到此
UIMgr_dispatchEvent(eventGenerated);
1c6: 8c 2f mov r24, r28
1c8: 0e 94 14 02 call 0x428
FrameMgr_dispatchEvent(eventGenerated);
1cc: 8c 2f mov r24, r28
1ce: 0e 94 12 01 call 0x224
break;
1d2: b9 cf rjmp .-142 ; 0x146
case (EV_SERIAL_DATA_PENDING_TX)://
UIMgr_dispatchEvent(eventGenerated);
1d4: 8c 2f mov r24, r28
1d6: 0e 94 14 02 call 0x428
break;
1da: b5 cf rjmp .-150 ; 0x146
000001dc <Exec_readEventFifo>:
default:
break;
}
}
/* toggle the debug line */
}
}
/***********************************************************
Function Name: Exec_readEventFifo
Function Description: This function is responsible for
reading a single event out of the event fifo.
Inputs: none
Outputs: unsigned char-the data read
***********************************************************/
static unsigned char Exec_readEventFifo(void)
{
unsigned char dataByte, tmpTail;
DISABLE_INTS();
1dc: f8 94 cli
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