📄 twi.h
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/* Copyright (c) 2002, Marek Michalkiewicz All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. * Neither the name of the copyright holders nor the names of contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *//* $Id: twi.h,v 1.1 2004/12/31 15:05:47 joerg_wunsch Exp $ *//* copied from: Id: avr/twi.h,v 1.4 2004/11/01 21:19:54 arcanum Exp *//* compat/twi.h - definitions for TWI: Two-Wire Interface or Twi Was I2c(tm). Contributors: Created by Marek Michalkiewicz <marekm@linux.org.pl> Based on advance information Atmel datasheet Rev. 1142A-10/00 (ATmega163). */#ifndef _AVR_TWI_H_#define _AVR_TWI_H_ 1#include <avr/io.h>/* TWSR values (not bits) *//* Master */#define TW_START 0x08#define TW_REP_START 0x10/* Master Transmitter */#define TW_MT_SLA_ACK 0x18#define TW_MT_SLA_NACK 0x20#define TW_MT_DATA_ACK 0x28#define TW_MT_DATA_NACK 0x30#define TW_MT_ARB_LOST 0x38/* Master Receiver */#define TW_MR_ARB_LOST 0x38#define TW_MR_SLA_ACK 0x40#define TW_MR_SLA_NACK 0x48#define TW_MR_DATA_ACK 0x50#define TW_MR_DATA_NACK 0x58/* Slave Transmitter */#define TW_ST_SLA_ACK 0xA8#define TW_ST_ARB_LOST_SLA_ACK 0xB0#define TW_ST_DATA_ACK 0xB8#define TW_ST_DATA_NACK 0xC0#define TW_ST_LAST_DATA 0xC8/* Slave Receiver */#define TW_SR_SLA_ACK 0x60#define TW_SR_ARB_LOST_SLA_ACK 0x68#define TW_SR_GCALL_ACK 0x70#define TW_SR_ARB_LOST_GCALL_ACK 0x78#define TW_SR_DATA_ACK 0x80#define TW_SR_DATA_NACK 0x88#define TW_SR_GCALL_DATA_ACK 0x90#define TW_SR_GCALL_DATA_NACK 0x98#define TW_SR_STOP 0xA0/* Misc */#define TW_NO_INFO 0xF8#define TW_BUS_ERROR 0x00/* * The lower 3 bits of TWSR are reserved on the ATmega163. * The 2 LSB carry the prescaler bits on the newer ATmegas. */#define TW_STATUS_MASK (_BV(TWS7)|_BV(TWS6)|_BV(TWS5)|_BV(TWS4)|\ _BV(TWS3))#define TW_STATUS (TWSR & TW_STATUS_MASK)/* * R/~W bit in SLA+R/W address field. */#define TW_READ 1#define TW_WRITE 0#endif /* _AVR_TWI_H_ */
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