reg5509a.h

PCM 脉冲编码调制的C源代码

//*************************************************************
// *文件名称：reg5509a.h
// *文件标示：C格式
// *摘    要：本文件内容为TMS320VC5509A DSP 寄存器定义头文件
// *当前版本：
// *作    者：
// *完成日期：
// *
// *************************************************************
#ifndef	_REG5509A_H
#define	_REG5509A_H
#endif
typedef unsigned char      uchar;
typedef unsigned int       uint;
typedef unsigned long int  ulint;
//**********************************************************************
//--------------------------------------------------------------
// CPU存储器映射寄存器定义 (Memory mapped registers)
//--------------------------------------------------------------
//***********************************************************************

//------------------------------------------------------
#define  IER0    (*(volatile unsigned int*)0x0000)//Interrupt Enable Register 0
#define  IFR0    (*(volatile unsigned int*)0x0001)//Interrupt Flag Register 0
//------------------------------------------------------     
#define  ST0_55  (*(volatile unsigned int*)0x0002)//Status Register 0 for C55x   
#define  ST1_55  (*(volatile unsigned int*)0x0003)//Status Register 1 for C55x    
#define  ST3_55  (*(volatile unsigned int*)0x0004)//Status Register 3 for C55x  
//------------   0x0005h Reserved    -------------------
#define  ST0     (*(volatile unsigned int*)0x0006)//Status Register ST0
#define  ST1     (*(volatile unsigned int*)0x0007)//Status Register ST1
//------------------------------------------------------
#define  AC0L    (*(volatile unsigned int*)0x0008)//AC0[15-0]
#define  AC0H    (*(volatile unsigned int*)0x0009)//AC0[31-16]
#define  AC0G    (*(volatile unsigned int*)0x000a)//AC0[39-32]
#define  AC1L    (*(volatile unsigned int*)0x000b)//AC1[15-0]
#define  AC1H    (*(volatile unsigned int*)0x000c)//AC1[31-16]
#define  AC1G    (*(volatile unsigned int*)0x000d)//AC1[39-32]      
//-----------------------------------------------------       
#define  T3      (*(volatile unsigned int*)0x000e)//Temporary Register
#define  TRN0    (*(volatile unsigned int*)0x000f)//Transition Register
//-----------------------------------------------------
#define  AR0     (*(volatile unsigned int*)0x0010)//Auxiliary Register 0     
#define  AR1     (*(volatile unsigned int*)0x0011)//Auxiliary Register 1      
#define  AR2     (*(volatile unsigned int*)0x0012)//Auxiliary Register 2     
#define  AR3     (*(volatile unsigned int*)0x0013)//Auxiliary Register 3       
#define  AR4     (*(volatile unsigned int*)0x0014)//Auxiliary Register 4     
#define  AR5     (*(volatile unsigned int*)0x0015)//Auxiliary Register 5      
#define  AR6     (*(volatile unsigned int*)0x0016)//Auxiliary Register 6     
#define  AR7     (*(volatile unsigned int*)0x0017)//Auxiliary Register 7     
//-----------------------------------------------------     
#define  SP      (*(volatile unsigned int*)0x0018)//Stack Pointer Register
//-----------------------------------------------------     
#define  BK03    (*(volatile unsigned int*)0x0019)//Circular Buffer Size Register
#define  BRC0    (*(volatile unsigned int*)0x001a)//Block Repeat Counter
#define  RSA0L   (*(volatile unsigned int*)0x001b)//Block Repeat Start Address
#define  REA0L   (*(volatile unsigned int*)0x001c)//Block Repeat End Address
//-----------------------------------------------------     
#define  PMST    (*(volatile unsigned int*)0x001d)//Processor Mode Status Register
//-----------------------------------------------------
#define  XPC     (*(volatile unsigned int*)0x001e)//Program Counter Extension Register
//--------     0x001f     Reserved    -----------------
#define  T0      (*(volatile unsigned int*)0x0020)//Temporary Data Register 0
#define  T1      (*(volatile unsigned int*)0x0021)//Temporary Data Register 1
#define  T2      (*(volatile unsigned int*)0x0022)//Temporary Data Register 2
//#define  T3      (*(volatile unsigned int*)0x0023)//Temporary Data Register 3
//-----------------------------------------------------
#define  AC2L    (*(volatile unsigned int*)0x0024)//AC2[15-0]
#define  AC2H    (*(volatile unsigned int*)0x0025)//AC2[31-16] 
#define  AC2G    (*(volatile unsigned int*)0x0026)//AC2[39-32]
//-----------------------------------------------------
#define  CDP     (*(volatile unsigned int*)0x0027)//Coefficient Data Pointer
//-----------------------------------------------------     
#define  AC3L    (*(volatile unsigned int*)0x0028)//AC3[15-0]
#define  AC4H    (*(volatile unsigned int*)0x0029)//AC3[31-16] 
#define  AC5G    (*(volatile unsigned int*)0x002a)//AC3[39-32]
//-----------------------------------------------------    
#define  DPH     (*(volatile unsigned int*)0x002b)//Extended Data Page Pointer
//-----------------------------------------------------
//#define  #2ch,MDP05  //Reserved
//#define  #2dh,MDP67  //Reserved
//-----------------------------------------------------
#define  DP      (*(volatile unsigned int*)0x002e)//Memory Data Page Start Address  
#define  PDP     (*(volatile unsigned int*)0x002f)//Peripheral Data Page Start Address
//-----------------------------------------------------
#define  BK47    (*(volatile unsigned int*)0x0030)//Circular Buffer Size Register for AR[4.7]
#define  BKC     (*(volatile unsigned int*)0x0031)//Circular Buffer Size Register for CDP
#define  BSA01   (*(volatile unsigned int*)0x0032)//Circular Buffer Start Address Register for AR[0.1]
#define  BSA23   (*(volatile unsigned int*)0x0033)//Circular Buffer Start Address Register for AR[2.3]
#define  BSA45   (*(volatile unsigned int*)0x0034)//Circular Buffer Start Address Register for AR[4.5]
#define  BSA67   (*(volatile unsigned int*)0x0035)//Circular Buffer Start Address Register for AR[6.7]
#define  BSAC    (*(volatile unsigned int*)0x0036)//Circular Buffer Coefficient Start Address Register
//------------------------------------------------------      
#define  BIOS    (*(volatile unsigned int*)0x0037)//Data Page Pointer Storage Location for 128-word Data Table            
//------------------------------------------------------      
#define  TRN1    (*(volatile unsigned int*)0x0038)//Transition Register 1
//------------------------------------------------------      
#define  BRC1    (*(volatile unsigned int*)0x0039)//Block Repeat Counter 1
#define  BRS1    (*(volatile unsigned int*)0x003a)//Block Repeat Save 1
#define  CSR     (*(volatile unsigned int*)0x003b)//Computed Single Repeat
//-----------------------------------------------------      
#define  RSA0H   (*(volatile unsigned int*)0x003c)//Repeat Start Address 0
//#define  RSA0L   (*(volatile unsigned int*)0x003d)
#define  REA0H   (*(volatile unsigned int*)0x003e)//Repeat End Address 0
//#define  REA0L   (*(volatile unsigned int*)0x003f)
#define  RSA1H   (*(volatile unsigned int*)0x0040)//Repeat Start Address 1
#define  RSA1L   (*(volatile unsigned int*)0x0041)
#define  REA1H   (*(volatile unsigned int*)0x0042)//Repeat End Address 1
#define  REA1L   (*(volatile unsigned int*)0x0043)     
#define  RPTC    (*(volatile unsigned int*)0x0044)//Repeat Counter
//-----------------------------------------------------      
#define  IER1    (*(volatile unsigned int*)0x0045)//Interrupt Enable Register 1
#define  IFR1    (*(volatile unsigned int*)0x0046)//Interrupt Flag Register 1
//-----------------------------------------------------
#define  DBIER0  (*(volatile unsigned int*)0x0047)//Debug IER0           
#define  DBIER1  (*(volatile unsigned int*)0x0048)//Debug IER1  
//-----------------------------------------------------
#define  IVPD    (*(volatile unsigned int*)0x0049)//Interrupt Vector Pointer DSP
#define  IVPH    (*(volatile unsigned int*)0x004a)//Interrupt Vector Pointer HOST
//----------------------------------------------------
#define  ST2_55  (*(volatile unsigned int*)0x004b)//Status Register 2 for C55x
//----------------------------------------------------
#define  SSP     (*(volatile unsigned int*)0x004c)//System Stack Pointer
//#define  SP      (*(volatile unsigned int*)0x004d)//User Stack Pointer
#define  SPH     (*(volatile unsigned int*)0x004e)//Extended Data Page Pointer for the SP and the SSP
#define  CDPH    (*(volatile unsigned int*)0x004f)//Main Data Page Pointer for the CDP
//以上寄存器映射在data空间，范围为00～4F
//************************************************************************** 


//**************************************************************************      
//--------------------------------------------------------------------
// IO外围寄存器定义 (IO mapped registers) 在C和汇编中用专用的指令访问
//--------------------------------------------------------------------     
//**************************************************************************
//--------------------------------------------------------------------
//--------------Idle Control, Status, and System Registers------------
#define  ICR     (*(ioport unsigned int *)0x0001)//Idle Control Register
#define  ISTR    (*(ioport unsigned int *)0x0002)//Idle Status Register 
//#define  SYSR  (*(ioport unsigned int *)0x0003)//System Register定义错了，跟下面的重复 
//----------------------System Register-------------------------------
#define SYSR     (*(ioport unsigned int *)0x07fd)
//--------------------------------------------------------------------
//-------------External Memory Interface Registers--------------------
#define EGCR     (*(ioport unsigned int *)0x0800)//EMIF Global Control Register
#define	EMIRST   (*(ioport unsigned int *)0x0801)//EMIF Global Reset Register
#define EMIBE    (*(ioport unsigned int *)0x0802)//EMIF Bus Error Status Register
#define CE01     (*(ioport unsigned int *)0x0803)//EMIF CE0 Space Control Register 1
#define	CE02     (*(ioport unsigned int *)0x0804)//EMIF CE0 Space Control Register 2
#define	CE03     (*(ioport unsigned int *)0x0805)//EMIF CE0 Space Control Register 3
#define	CE11     (*(ioport unsigned int *)0x0806)//EMIF CE1 Space Control Register 1
#define	CE12     (*(ioport unsigned int *)0x0807)//EMIF CE2 Space Control Register 2
#define	CE13     (*(ioport unsigned int *)0x0808)//EMIF CE3 Space Control Register 3
#define	CE21     (*(ioport unsigned int *)0x0809)//EMIF CE2 Space Control Register 1
#define	CE22     (*(ioport unsigned int *)0x080a)//EMIF CE2 Space Control Register 2
#define	CE23     (*(ioport unsigned int *)0x080b)//EMIF CE2 Space Control Register 3
#define	CE31     (*(ioport unsigned int *)0x080c)//EMIF CE3 Space Control Register 1
#define	CE32     (*(ioport unsigned int *)0x080d)//EMIF CE3 Space Control Register 2
#define	CE33     (*(ioport unsigned int *)0x080e)//EMIF CE3 Space Control Register 3