pmac_feature.c

ARM 嵌入式 系统 设计与实例开发 实验教材 二源码

	else
		return -ENODEV;

	/* Sorry for the brute-force locking, but this is only used during
	 * sleep and the timing seem to be critical
	 */
	LOCK(flags);
	if (value) {
		/* Turn ON */
		if (number == 0) {
			MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
			(void)MACIO_IN32(KEYLARGO_FCR0);
			UNLOCK(flags);
			mdelay(1);
			LOCK(flags);
			MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
		} else {
			MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
			UNLOCK(flags);
			(void)MACIO_IN32(KEYLARGO_FCR0);
			mdelay(1);
			LOCK(flags);
			MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
		}
		reg = MACIO_IN32(KEYLARGO_FCR4);
		reg &=	~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
			KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number));
		reg &=	~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
			KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1));
		MACIO_OUT32(KEYLARGO_FCR4, reg);
		(void)MACIO_IN32(KEYLARGO_FCR4);
		udelay(10);
	} else {
		/* Turn OFF */
		reg = MACIO_IN32(KEYLARGO_FCR4);
		reg |=	KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
			KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number);
		reg |=	KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
			KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1);
		MACIO_OUT32(KEYLARGO_FCR4, reg);
		(void)MACIO_IN32(KEYLARGO_FCR4);
		udelay(1);
		if (number == 0) {
			MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
			(void)MACIO_IN32(KEYLARGO_FCR0);
			udelay(1);
			MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
			(void)MACIO_IN32(KEYLARGO_FCR0);
		} else {
			MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
			(void)MACIO_IN32(KEYLARGO_FCR0);
			udelay(1);
			MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
			(void)MACIO_IN32(KEYLARGO_FCR0);
		}
		udelay(1);
	}
	UNLOCK(flags);

	return 0;
}

static int __pmac
core99_firewire_enable(struct device_node* node, int param, int value)
{
	unsigned long flags;
	struct macio_chip* macio;

	macio = &macio_chips[0];
	if (macio->type != macio_keylargo && macio->type != macio_pangea)
		return -ENODEV;
	if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
		return -ENODEV;
	
	LOCK(flags);
	if (value) {
		UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
		(void)UN_IN(UNI_N_CLOCK_CNTL);
	} else {
		UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
		(void)UN_IN(UNI_N_CLOCK_CNTL);
	}
	UNLOCK(flags);
	mdelay(1);

	return 0;
}

static int __pmac
core99_firewire_cable_power(struct device_node* node, int param, int value)
{
	unsigned long flags;
	struct macio_chip* macio;

	/* Trick: we allow NULL node */
	if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0)
	    	return -ENODEV;
	macio = &macio_chips[0];
	if (macio->type != macio_keylargo && macio->type != macio_pangea)
		return -ENODEV;
	if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
		return -ENODEV;
	
	LOCK(flags);
	if (value) {
		MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0);
		MACIO_IN8(KL_GPIO_FW_CABLE_POWER);
		udelay(10);
	} else {
		MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4);
		MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10);
	}
	UNLOCK(flags);
	mdelay(1);

	return 0;
}

static int __pmac
core99_read_gpio(struct device_node* node, int param, int value)
{
	struct macio_chip* macio = &macio_chips[0];
	
	return MACIO_IN8(param);
}


static int __pmac
core99_write_gpio(struct device_node* node, int param, int value)
{
	struct macio_chip* macio = &macio_chips[0];

	MACIO_OUT8(param, (u8)(value & 0xff));
	return 0;
}

static void __pmac
keylargo_shutdown(struct macio_chip* macio, int restart)
{
	u32 temp;

	mdelay(1);
	MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND);
	(void)MACIO_IN32(KEYLARGO_FCR0);
	mdelay(100);

	MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
				KL0_SCC_CELL_ENABLE |
		      		KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE |
		      		KL0_IRDA_CLK19_ENABLE);

	(void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
	MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
	(void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);

	MACIO_BIC(KEYLARGO_FCR1,
		KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
		KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
		KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
		KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
		KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
		KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N |
		KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N |
		KL1_UIDE_ENABLE);
	(void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);

	MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
 	udelay(10);
 	MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE);
 	udelay(10);
	temp = MACIO_IN32(KEYLARGO_FCR3);
	if (macio->rev >= 2)
		temp |= (KL3_SHUTDOWN_PLL2X | KL3_SHUTDOWN_PLL_TOTAL);
		
	temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
		KL3_SHUTDOWN_PLLKW35 | KL3_SHUTDOWN_PLLKW12;
	temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE
		| KL3_CLK31_ENABLE | KL3_TIMER_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE
		| KL3_I2S0_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);
	MACIO_OUT32(KEYLARGO_FCR3, temp);
	(void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
}

static void __pmac
pangea_shutdown(struct macio_chip* macio, int restart)
{
	u32 temp;

	MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
				KL0_SCC_CELL_ENABLE |
				KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE);

	(void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
	MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
	(void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);

	MACIO_BIC(KEYLARGO_FCR1,
		KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
		KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
		KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
		KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
		KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
		KL1_UIDE_ENABLE);
	(void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);

	MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
 	udelay(10);
	temp = MACIO_IN32(KEYLARGO_FCR3);
	temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
		KL3_SHUTDOWN_PLLKW35;
	temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE
		| KL3_CLK31_ENABLE | KL3_TIMER_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE
		| KL3_I2S0_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);
	MACIO_OUT32(KEYLARGO_FCR3, temp);
	(void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
}

static int __pmac
core99_sleep(void)
{
	struct macio_chip* macio;
	int i;

	macio = &macio_chips[0];
	if (macio->type != macio_keylargo && macio->type != macio_pangea)
		return -ENODEV;
	
	/* We power off the wireless slot in case it was not done
	 * by the driver. We don't power it on automatically however
	 */
	if (macio->flags & MACIO_FLAG_AIRPORT_ON)
		core99_airport_enable(macio->of_node, 0, 0);

	/* We power off the FW cable. Should be done by the driver... */
	if (macio->flags & MACIO_FLAG_FW_SUPPORTED) {
		core99_firewire_enable(NULL, 0, 0);
		core99_firewire_cable_power(NULL, 0, 0);
	}

	/* We make sure int. modem is off (in case driver lost it) */
	core99_modem_enable(macio->of_node, 0, 0);
	/* We make sure the sound is off as well */
	core99_sound_chip_enable(macio->of_node, 0, 0);
	 
	/*
	 * Save various bits of KeyLargo
	 */

	/* Save the state of the various GPIOs */
	save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0);
	save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1);
	for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
		save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i);
	for (i=0; i<KEYLARGO_GPIO_CNT; i++)
		save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i);

	/* Save the FCRs */
	save_mbcr = MACIO_IN32(KEYLARGO_MBCR);
	save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0);
	save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1);
	save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2);
	save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3);
	save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4);

	/* Save state & config of DBDMA channels */
	dbdma_save(macio, save_dbdma);
	
	/*
	 * Turn off as much as we can
	 */
	if (macio->type == macio_pangea)
		pangea_shutdown(macio, 0);
	else if (macio->type == macio_keylargo)
		keylargo_shutdown(macio, 0);
	
	/* 
	 * Put the host bridge to sleep
	 */

	save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL);
	UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl &
		~(UNI_N_CLOCK_CNTL_GMAC|UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/));
	udelay(100);
	UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
	UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP);

	/*
	 * FIXME: A bit of black magic with OpenPIC (don't ask me why)
	 */
	if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
		MACIO_BIS(0x506e0, 0x00400000);
		MACIO_BIS(0x506e0, 0x80000000);
	}
	return 0;
}

static int __pmac
core99_wake_up(void)
{
	struct macio_chip* macio;
	int i;

	macio = &macio_chips[0];
	if (macio->type != macio_keylargo && macio->type != macio_pangea)
		return -ENODEV;

	/*
	 * Wakeup the host bridge
	 */
	UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
	udelay(10);
	UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
	udelay(10);
	
	/*
	 * Restore KeyLargo
	 */
	 
	MACIO_OUT32(KEYLARGO_MBCR, save_mbcr);
	(void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);
	MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]);
	(void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
	MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]);
	(void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);
	MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]);
	(void)MACIO_IN32(KEYLARGO_FCR2); udelay(10);
	MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]);
	(void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
	MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]);
	(void)MACIO_IN32(KEYLARGO_FCR4); udelay(10);

	dbdma_restore(macio, save_dbdma);

	MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]);
	MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]);
	for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
		MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]);
	for (i=0; i<KEYLARGO_GPIO_CNT; i++)
		MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]);

	/* FIXME more black magic with OpenPIC ... */
	if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
		MACIO_BIC(0x506e0, 0x00400000);
		MACIO_BIC(0x506e0, 0x80000000);
	}

	UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl);
	udelay(100);

	return 0;
}

static int __pmac
core99_sleep_state(struct device_node* node, int param, int value)
{
	if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
		return -EPERM;
	if (value == 1)
		return core99_sleep();
	else if (value == 0)
		return core99_wake_up();
	return 0;
}

static int __pmac
pangea_modem_enable(struct device_node* node, int param, int value)
{
	struct macio_chip*	macio;
	u8			gpio;
	unsigned long		flags;
	
	macio = macio_find(node, 0);
	if (!macio)
		return -ENODEV;
	gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
	gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
	gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
	
	if (!value) {
		LOCK(flags);
		MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
		UNLOCK(flags);
		(void)MACIO_IN8(KL_GPIO_MODEM_RESET);
		mdelay(250);
	}
    	LOCK(flags);
	if (value) {
		MACIO_OUT8(KL_GPIO_MODEM_POWER,
			KEYLARGO_GPIO_OUTPUT_ENABLE);
    		UNLOCK(flags);
	    	(void)MACIO_IN32(KEYLARGO_FCR2);
		mdelay(250);
	} else {
		MACIO_OUT8(KL_GPIO_MODEM_POWER,
			KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
    		UNLOCK(flags);
	}
	if (value) {
		LOCK(flags);
		MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
		(void)MACIO_IN8(KL_GPIO_MODEM_RESET);
	    	UNLOCK(flags); mdelay(250); LOCK(flags);
		MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
		(void)MACIO_IN8(KL_GPIO_MODEM_RESET);
	    	UNLOCK(flags); mdelay(250); LOCK(flags);
		MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
		(void)MACIO_IN8(KL_GPIO_MODEM_RESET);
	    	UNLOCK(flags); mdelay(250); LOCK(flags);
	}
	return 0;
}


static int __pmac
generic_get_mb_info(struct device_node* node, int param, int value)
{
	switch(param) {
		case PMAC_MB_INFO_MODEL:
			return pmac_mb.model_id;
		case PMAC_MB_INFO_FLAGS:
			return pmac_mb.board_flags;
		case PMAC_MB_INFO_NAME:	
			/* hack hack hack... but should work */
			return (int)pmac_mb.model_name;
	}
	return 0;
}


/* 
 * Table definitions
 */
 
/* Used on any machine
 */
static struct feature_table_entry any_features[]  __pmacdata = {
	{ PMAC_FTR_GET_MB_INFO,		generic_get_mb_info },
	{ 0, NULL }
};

/* OHare based motherboards. Currently, we only use these on the
 * 2400,3400 and 3500 series powerbooks. Some older desktops seem
 * to have issues with turning on/off those asic cells
 */
static struct feature_table_entry ohare_features[]  __pmacdata = {
	{ PMAC_FTR_SCC_ENABLE,		ohare_scc_enable },
	{ PMAC_FTR_SWIM3_ENABLE,	ohare_floppy_enable },
	{ PMAC_FTR_MESH_ENABLE,		ohare_mesh_enable },
	{ PMAC_FTR_IDE_ENABLE,		ohare_ide_enable},
	{ PMAC_FTR_IDE_RESET,		ohare_ide_reset},
	{ PMAC_FTR_SLEEP_STATE,		ohare_sleep_state },
	{ 0, NULL }
};

/* Heathrow desktop machines (Beige G3).
 * Separated as some features couldn't be properly tested
 * and the serial port control bits appear to confuse it.
 */
static struct feature_table_entry heathrow_desktop_features[]  __pmacdata = {
	{ PMAC_FTR_SWIM3_ENABLE,	heathrow_floppy_enable },
	{ PMAC_FTR_MESH_ENABLE,		heathrow_mesh_enable },
	{ PMAC_FTR_IDE_ENABLE,		heathrow_ide_enable },
	{ PMAC_FTR_IDE_RESET,		heathrow_ide_reset },
	{ PMAC_FTR_BMAC_ENABLE,		heathrow_bmac_enable },
	{ 0, NULL }
};

/* Heathrow based laptop, that is the Wallstreet and mainstreet
 * powerbooks.
 */
static struct feature_table_entry heathrow_laptop_features[]  __pmacdata = {
	{ PMAC_FTR_SCC_ENABLE,		heathrow_scc_enable },
	{ PMAC_FTR_MODEM_ENABLE,	heathrow_modem_enable },
	{ PMAC_FTR_SWIM3_ENABLE,	heathrow_floppy_enable },
	{ PMAC_FTR_MESH_ENABLE,		heathrow_mesh_enable },
	{ PMAC_FTR_IDE_ENABLE,		heathrow_ide_enable },
	{ PMAC_FTR_IDE_RESET,		heathrow_ide_reset },
	{ PMAC_FTR_BMAC_ENABLE,		heathrow_bmac_enable },
	{ PMAC_FTR_SOUND_CHIP_ENABLE,	heathrow_sound_enable },
	{ PMAC_FTR_SLEEP_STATE,		heathrow_sleep_state },
	{ 0, NULL }
};

/* Paddington based machines
 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
 */
static struct feature_table_entry paddington_features[]  __pmacdata = {
	{ PMAC_FTR_SCC_ENABLE,		heathrow_scc_enable },
	{ PMAC_FTR_MODEM_ENABLE,	heathrow_modem_enable },
	{ PMAC_FTR_SWIM3_ENABLE,	heathrow_floppy_enable },
	{ PMAC_FTR_MESH_ENABLE,		heathrow_mesh_enable },
	{ PMAC_FTR_IDE_ENABLE,		heathrow_ide_enable },
	{ PMAC_FTR_IDE_RESET,		heathrow_ide_reset },
	{ PMAC_FTR_BMAC_ENABLE,		heathrow_bmac_enable },
	{ PMAC_FTR_SOUND_CHIP_ENABLE,	heathrow_sound_enable },
	{ PMAC_FTR_SLEEP_STATE,		heathrow_sleep_state },
	{ 0, NULL }
};

/* Core99 & MacRISC 2 machines (all machines released since the
 * iBook (included), that is all AGP machines, except pangea
 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
 * used on iBook2 & iMac "flow power".
 */
static struct feature_table_entry core99_features[]  __pmacdata = {
	{ PMAC_FTR_SCC_ENABLE,		core99_scc_enable },
	{ PMAC_FTR_MODEM_ENABLE,	core99_modem_enable },
	{ PMAC_FTR_IDE_ENABLE,		core99_ide_enable },
	{ PMAC_FTR_IDE_RESET,		core99_ide_reset },
	{ PMAC_FTR_GMAC_ENABLE,		core99_gmac_enable },
	{ PMAC_FTR_GMAC_PHY_RESET,	core99_gmac_phy_reset },
	{ PMAC_FTR_SOUND_CHIP_ENABLE,	core99_sound_chip_enable },
	{ PMAC_FTR_AIRPORT_ENABLE,	core99_airport_enable },
	{ PMAC_FTR_USB_ENABLE,		core99_usb_enable },
	{ PMAC_FTR_1394_ENABLE,		core99_firewire_enable },
	{ PMAC_FTR_1394_CABLE_POWER,	core99_firewire_cable_power },
	{ PMAC_FTR_SLEEP_STATE,		core99_sleep_state },
#ifdef CONFIG_SMP
	{ PMAC_FTR_RESET_CPU,		core99_reset_cpu },
#endif /* CONFIG_SMP */
	{ PMAC_FTR_READ_GPIO,		core99_read_gpio },
	{ PMAC_FTR_WRITE_GPIO,		core99_write_gpio },
	{ 0, NULL }
};

/* Pangea features
 */
static struct feature_table_entry pangea_features[]  __pmacdata = {
	{ PMAC_FTR_SCC_ENABLE,		core99_scc_enable },
	{ PMAC_FTR_MODEM_ENABLE,	pangea_modem_enable },
	{ PMAC_FTR_IDE_ENABLE,		core99_ide_enable },