📄 danxiangbanqiao.mdl
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BlockType Constant
Value "1"
VectorParams1D on
OutDataTypeMode "Inherit from 'Constant value'"
OutDataType "sfix(16)"
ConRadixGroup "Use specified scaling"
OutScaling "2^0"
SampleTime "inf"
}
Block {
BlockType DataTypeConversion
OutDataTypeMode "Inherit via back propagation"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
ConvertRealWorld "Real World Value (RWV)"
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Demux
Outputs "4"
DisplayOption "none"
BusSelectionMode off
}
Block {
BlockType DiscretePulseGenerator
PulseType "Sample based"
TimeSource "Use simulation time"
Amplitude "1"
Period "2"
PulseWidth "1"
PhaseDelay "0"
SampleTime "1"
VectorParams1D on
}
Block {
BlockType EnablePort
StatesWhenEnabling "held"
ShowOutputPort off
ZeroCross on
}
Block {
BlockType From
IconDisplay "Tag"
}
Block {
BlockType Gain
Gain "1"
Multiplication "Element-wise(K.*u)"
ParameterDataTypeMode "Same as input"
ParameterDataType "sfix(16)"
ParameterScalingMode "Best Precision: Matrix-wise"
ParameterScaling "2^0"
OutDataTypeMode "Same as input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Goto
IconDisplay "Tag"
}
Block {
BlockType Ground
}
Block {
BlockType Inport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchByCopyingInsideSignal off
Interpolate on
}
Block {
BlockType Integrator
ExternalReset "none"
InitialConditionSource "internal"
InitialCondition "0"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
IgnoreLimit off
ZeroCross on
}
Block {
BlockType Memory
X0 "0"
InheritSampleTime off
LinearizeMemory off
StateMustResolveToSignalObject off
RTWStateStorageClass "Auto"
}
Block {
BlockType Mux
Inputs "4"
DisplayOption "none"
UseBusObject off
BusObject "BusObject"
NonVirtualBus off
}
Block {
BlockType Outport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType PMComponent
SubClassName "unknown"
}
Block {
BlockType PMIOPort
}
Block {
BlockType Product
Inputs "2"
Multiplication "Element-wise(.*)"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Saturate
UpperLimit "0.5"
LowerLimit "-0.5"
LinearizeAsGain on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Scope
ModelBased off
TickLabels "OneTimeTick"
ZoomMode "on"
Grid "on"
TimeRange "auto"
YMin "-5"
YMax "5"
SaveToWorkspace off
SaveName "ScopeData"
LimitDataPoints on
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "-1"
}
Block {
BlockType "S-Function"
FunctionName "system"
SFunctionModules "''"
PortCounts "[]"
}
Block {
BlockType SubSystem
ShowPortLabels on
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Switch
Criteria "u2 >= Threshold"
Threshold "0"
InputSameDT on
OutDataTypeMode "Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Terminator
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "arial"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "arial"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "danxiangbanqiao"
Location [2, 74, 1014, 722]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "80"
ReportName "simulink-default.rpt"
Block {
BlockType Reference
Name "Current Measurement"
Ports [0, 1, 0, 0, 0, 1, 1]
Position [535, 518, 560, 542]
SourceBlock "powerlib/Measurements/Current Measurement"
SourceType "Current Measurement"
ShowPortLabels on
PhasorSimulation off
OutputType "Complex"
PSBequivalent "0"
}
Block {
BlockType Reference
Name "DC Voltage Source"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [20, 295, 40, 330]
Orientation "up"
SourceBlock "powerlib/Electrical\nSources/DC Voltage Source"
SourceType "DC Voltage Source"
ShowPortLabels on
Amplitude "60"
Measurements "Voltage"
}
Block {
BlockType Reference
Name "Diode"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [435, 130, 475, 185]
Orientation "up"
SourceBlock "powerlib/Power\nElectronics/Diode"
SourceType "Diode"
ShowPortLabels on
Ron "0.001"
Lon "0"
Vf "0.8"
IC "0"
Rs "500"
Cs "250e-9"
Measurements off
}
Block {
BlockType Reference
Name "Diode1"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [435, 315, 475, 370]
Orientation "up"
SourceBlock "powerlib/Power\nElectronics/Diode"
SourceType "Diode"
ShowPortLabels on
Ron "0.001"
Lon "0"
Vf "0.8"
IC "0"
Rs "500"
Cs "250e-9"
Measurements off
}
Block {
BlockType Reference
Name "IGBT"
Ports [1, 1, 0, 0, 0, 1, 1]
Position [320, 135, 375, 175]
SourceBlock "powerlib/Power\nElectronics/IGBT"
SourceType "IGBT"
ShowPortLabels on
Ron "0.001"
Lon "0"
Vf "1"
Tf "1e-6"
Tt "2e-6"
IC "0"
Rs "1e5"
Cs "inf"
Measurements on
}
Block {
BlockType Reference
Name "IGBT1"
Ports [1, 1, 0, 0, 0, 1, 1]
Position [315, 305, 370, 345]
SourceBlock "powerlib/Power\nElectronics/IGBT"
SourceType "IGBT"
ShowPortLabels on
Ron "0.001"
Lon "0"
Vf "1"
Tf "1e-6"
Tt "2e-6"
IC "0"
Rs "1e5"
Cs "inf"
Measurements on
}
Block {
BlockType DiscretePulseGenerator
Name "Pulse\nGenerator"
Ports [0, 1]
Position [15, 433, 60, 467]
PulseType "Time based"
Period "0.004"
PulseWidth "50"
}
Block {
BlockType DiscretePulseGenerator
Name "Pulse\nGenerator1"
Ports [0, 1]
Position [15, 533, 60, 567]
PulseType "Time based"
Period "0.004"
PulseWidth "50"
PhaseDelay "0.002"
}
Block {
BlockType Scope
Name "Scope"
Ports [4]
Position [980, 535, 1255, 750]
Floating off
Location [5, 45, 1021, 729]
Open off
NumInputPorts "4"
ZoomMode "yonly"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
axes2 "%<SignalLabel>"
axes3 "%<SignalLabel>"
axes4 "%<SignalLabel>"
}
YMin "-1~0.95~-5~-5"
YMax "1~1.05~5~5"
DataFormat "StructureWithTime"
SampleTime "0"
}
Block {
BlockType Reference
Name "Series RLC Branch"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [255, 221, 325, 249]
SourceBlock "powerlib/Elements/Series RLC Branch"
SourceType "Series RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "__new0"
RConnTagsString "__new0"
BranchType "RL"
Resistance "10"
Inductance "0.003"
SetiL0 off
InitialCurrent "0"
Capacitance "1e-6"
Setx0 off
InitialVoltage "0"
Measurements "Branch voltage and current"
}
Block {
BlockType Reference
Name "Series RLC Branch1"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [183, 145, 197, 210]
Orientation "down"
NamePlacement "alternate"
SourceBlock "powerlib/Elements/Series RLC Branch"
SourceType "Series RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "__new0"
RConnTagsString "__new0"
BranchType "C"
Resistance "0.00001"
Inductance "1e-3"
SetiL0 off
InitialCurrent "0"
Capacitance "10"
Setx0 off
InitialVoltage "0"
Measurements "None"
}
Block {
BlockType Reference
Name "Series RLC Branch2"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [183, 290, 197, 355]
Orientation "down"
NamePlacement "alternate"
SourceBlock "powerlib/Elements/Series RLC Branch"
SourceType "Series RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
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