ddstest.bdf

FPGA实现DDS

/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2008 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/
//#pragma file_not_in_maxplusii_format
(header "graphic" (version "1.3"))
(pin
	(input)
	(rect -48 176 128 192)
	(text "INPUT" (rect 141 0 169 10)(font "Arial" (font_size 6)))
	(text "pin_name3[21..0]" (rect 5 0 89 12)(font "Arial" ))
	(pt 176 8)
	(drawing
		(line (pt 100 12)(pt 125 12)(line_width 1))
		(line (pt 100 4)(pt 125 4)(line_width 1))
		(line (pt 129 8)(pt 176 8)(line_width 1))
		(line (pt 100 12)(pt 100 4)(line_width 1))
		(line (pt 125 4)(pt 129 8)(line_width 1))
		(line (pt 125 12)(pt 129 8)(line_width 1))
	)
	(text "VCC" (rect 144 7 164 17)(font "Arial" (font_size 6)))
)
(pin
	(input)
	(rect -32 144 136 160)
	(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
	(text "clk" (rect 5 0 19 12)(font "Arial" ))
	(pt 168 8)
	(drawing
		(line (pt 92 12)(pt 117 12)(line_width 1))
		(line (pt 92 4)(pt 117 4)(line_width 1))
		(line (pt 121 8)(pt 168 8)(line_width 1))
		(line (pt 92 12)(pt 92 4)(line_width 1))
		(line (pt 117 4)(pt 121 8)(line_width 1))
		(line (pt 117 12)(pt 121 8)(line_width 1))
	)
	(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
)
(pin
	(output)
	(rect 576 144 752 160)
	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
	(text "sin_out[13..0]" (rect 90 0 157 12)(font "Arial" ))
	(pt 0 8)
	(drawing
		(line (pt 0 8)(pt 52 8)(line_width 1))
		(line (pt 52 4)(pt 78 4)(line_width 1))
		(line (pt 52 12)(pt 78 12)(line_width 1))
		(line (pt 52 12)(pt 52 4)(line_width 1))
		(line (pt 78 4)(pt 82 8)(line_width 1))
		(line (pt 82 8)(pt 78 12)(line_width 1))
		(line (pt 78 12)(pt 82 8)(line_width 1))
	)
)
(symbol
	(rect 256 120 528 216)
	(text "dds" (rect 5 0 22 12)(font "Arial" ))
	(text "inst" (rect 8 80 25 92)(font "Arial" ))
	(port
		(pt 0 32)
		(input)
		(text "SYSCLK" (rect 0 0 43 12)(font "Arial" ))
		(text "SYSCLK" (rect 21 27 64 39)(font "Arial" ))
		(line (pt 0 32)(pt 16 32)(line_width 1))
	)
	(port
		(pt 0 48)
		(input)
		(text "NCLR" (rect 0 0 30 12)(font "Arial" ))
		(text "NCLR" (rect 21 43 51 55)(font "Arial" ))
		(line (pt 0 48)(pt 16 48)(line_width 1))
	)
	(port
		(pt 0 64)
		(input)
		(text "FCW[fcw_width-1..0]" (rect 0 0 103 12)(font "Arial" ))
		(text "FCW[fcw_width-1..0]" (rect 21 59 124 71)(font "Arial" ))
		(line (pt 0 64)(pt 16 64)(line_width 3))
	)
	(port
		(pt 272 32)
		(output)
		(text "SIN_OUT[rom_width..0]" (rect 0 0 116 12)(font "Arial" ))
		(text "SIN_OUT[rom_width..0]" (rect 135 27 251 39)(font "Arial" ))
		(line (pt 272 32)(pt 256 32)(line_width 3))
	)
	(parameter
		"FCW_WIDTH"
		"22"
		""
	)
	(parameter
		"ROM_WIDTH"
		"13"
		""
	)
	(parameter
		"ROM_WIDTHAD"
		"9"
		""
	)
	(parameter
		"SIN_ROM_FILE"
		"S\"sin.mif\""
		""
	)
	(drawing
		(rectangle (rect 16 16 256 80)(line_width 1))
	)
	(annotation_block (parameter)(rect 528 48 664 120))
)
(symbol
	(rect 160 32 192 48)
	(text "VCC" (rect 7 0 27 10)(font "Arial" (font_size 6)))
	(text "inst1" (rect 3 5 26 17)(font "Arial" )(invisible))
	(port
		(pt 16 16)
		(output)
		(text "1" (rect 19 7 24 19)(font "Courier New" (bold))(invisible))
		(text "1" (rect 19 7 24 19)(font "Courier New" (bold))(invisible))
		(line (pt 16 16)(pt 16 8)(line_width 1))
	)
	(drawing
		(line (pt 8 8)(pt 24 8)(line_width 1))
	)
)
(connector
	(pt 256 168)
	(pt 176 168)
)
(connector
	(pt 176 48)
	(pt 176 168)
)
(connector
	(pt 528 152)
	(pt 576 152)
	(bus)
)
(connector
	(pt 136 152)
	(pt 256 152)
)
(connector
	(pt 128 184)
	(pt 256 184)
	(bus)
)