stp1.stp

FPGA实现DDS

<session jtag_chain="USB-Blaster [USB-0]" jtag_device="@1: EP2C5 (0x020B10DD)" sof_file="dds.sof" top_level_entity="dds">
  <display_tree gui_logging_enabled="0">
    <display_branch instance="auto_signaltap_0" log="USE_GLOBAL_TEMP" signal_set="USE_GLOBAL_TEMP" trigger="USE_GLOBAL_TEMP"/>
  </display_tree>
  <instance entity_name="sld_signaltap" is_auto_node="yes" is_expanded="true" name="auto_signaltap_0" source_file="sld_signaltap.vhd">
    <node_ip_info instance_id="0" mfg_id="110" node_id="0" version="6"/>
    <signal_set global_temp="1" is_expanded="true" name="signal_set: 2009/05/04 22:16:24  #0">
      <clock name="SYSCLK" polarity="posedge" tap_mode="classic"/>
      <config ram_type="M4K" reserved_data_nodes="0" reserved_trigger_nodes="0" sample_depth="2048" trigger_in_enable="no" trigger_out_enable="no"/>
      <top_entity/>
      <signal_vec>
        <trigger_input_vec>
          <wire name="FCW[0]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[10]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[11]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[12]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[13]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[14]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[15]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[16]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[17]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[18]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[19]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[1]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[20]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[21]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[2]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[3]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[4]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[5]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[6]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[7]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[8]" tap_mode="classic" type="input pin"/>
          <wire name="FCW[9]" tap_mode="classic" type="input pin"/>
          <wire name="NCLR" tap_mode="classic" type="input pin"/>
          <wire name="SIN_OUT[0]" tap_mode="classic" type="output pin"/>
          <wire name="SIN_OUT[10]" tap_mode="classic" type="output pin"/>
          <wire name="SIN_OUT[11]" tap_mode="classic" type="output pin"/>