dds.map.summary

来自「FPGA实现DDS」· SUMMARY 代码 · 共 15 行

Analysis & Synthesis Status : Successful - Fri May 08 23:20:32 2009
Quartus II Version : 8.0 Build 231 07/10/2008 SP 1 SJ Full Version
Revision Name : dds
Top-level Entity Name : dds
Family : Cyclone II
Total logic elements : 69
    Total combinational functions : 68
    Dedicated logic registers : 69
Total registers : 69
Total pins : 38
Total virtual pins : 0
Total memory bits : 6,656
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0