dds.fit.summary

来自「FPGA实现DDS」· SUMMARY 代码 · 共 17 行

Fitter Status : Successful - Fri May 08 23:20:40 2009
Quartus II Version : 8.0 Build 231 07/10/2008 SP 1 SJ Full Version
Revision Name : dds
Top-level Entity Name : dds
Family : Cyclone II
Device : EP2C5Q208C8
Timing Models : Final
Total logic elements : 69 / 4,608 ( 1 % )
    Total combinational functions : 68 / 4,608 ( 1 % )
    Dedicated logic registers : 69 / 4,608 ( 1 % )
Total registers : 69
Total pins : 38 / 142 ( 27 % )
Total virtual pins : 0
Total memory bits : 6,656 / 119,808 ( 6 % )
Embedded Multiplier 9-bit elements : 0 / 26 ( 0 % )
Total PLLs : 0 / 2 ( 0 % )