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📁 Actel Fusion System Management Development Kit UART Example. Contains Libero design using CoreABC. P
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when "001000" =>
CPWMl0l <= pwm_poSEDGE_OUt_wire(3*Apb_dwidth downto 2*aPB_DWIDth+1);
when "001001" =>
CPWML0L <= PWM_Negedge_out_WIRE(3*APB_Dwidth downto 2*apb_dwidth+1);
when others =>
CPWML0L <= ( others => '0');
end case;
end process;
end generate;
CPWMio0:
if (pwM_NUM = 4)
generate
process (PADDR,pwm_posEDGE_OUT_wire,pWM_NEGEDge_out_wiRE)
begin
case (paddr) is
when "000100" =>
CPWMl0l <= PWM_posedge_oUT_WIRE(1*APB_dwidth downto 0*APB_dwidth+1);
when "000101" =>
CPWMl0l <= pwm_NEGEDGE_out_wire(1*APB_DWIdth downto 0*APB_DWIDth+1);
when "000110" =>
CPWML0L <= pwm_posEDGE_OUT_wire(2*apb_dwIDTH downto 1*apb_dwidtH+1);
when "000111" =>
CPWML0L <= PWm_negedge_oUT_WIRE(2*APB_DWidth downto 1*apb_dwidth+1);
when "001000" =>
CPWMl0l <= PWM_posedge_ouT_WIRE(3*APB_DWidth downto 2*apB_DWIDTH+1);
when "001001" =>
CPWMl0L <= pwM_NEGEDGe_out_wirE(3*Apb_dwidth downto 2*apb_dwiDTH+1);
when "001010" =>
CPWML0L <= pwm_posEDGE_OUt_wire(4*Apb_dwidth downto 3*apb_dwIDTH+1);
when "001011" =>
CPWML0l <= Pwm_negedge_OUT_WIRe(4*apb_dWIDTH downto 3*APB_dwidth+1);
when others =>
CPWMl0l <= ( others => '0');
end case;
end process;
end generate;
CPWMOL0:
if (PWM_Num = 5)
generate
process (PAddr,pwm_POSEDGE_out_wire,PWM_NEgedge_out_WIRE)
begin
case (pADDR) is
when "000100" =>
CPWMl0l <= PWM_Posedge_out_WIRE(1*apb_DWIDTH downto 0*apB_DWIDTH+1);
when "000101" =>
CPWML0l <= pwm_NEGEDGE_out_wire(1*aPB_DWIDth downto 0*apb_dWIDTH+1);
when "000110" =>
CPWMl0l <= PWM_posedge_oUT_WIRE(2*Apb_dwidth downto 1*APB_DWidth+1);
when "000111" =>
CPWMl0l <= PWM_negedge_ouT_WIRE(2*apb_dwIDTH downto 1*APB_dwidth+1);
when "001000" =>
CPWMl0l <= PWM_POSedge_out_wIRE(3*APB_DWidth downto 2*apb_dwIDTH+1);
when "001001" =>
CPWMl0l <= PWM_Negedge_out_WIRE(3*APB_dwidth downto 2*APB_dwidth+1);
when "001010" =>
CPWMl0l <= pwm_pOSEDGE_out_wire(4*apb_dwidth downto 3*apb_DWIDTH+1);
when "001011" =>
CPWML0L <= PWM_negedge_ouT_WIRE(4*APB_Dwidth downto 3*APb_dwidth+1);
when "001100" =>
CPWMl0l <= PWM_posedge_out_WIRE(5*aPB_DWIDTH downto 4*Apb_dwidth+1);
when "001101" =>
CPWMl0l <= pwm_negeDGE_OUT_wire(5*APB_DWIDth downto 4*Apb_dwidth+1);
when others =>
CPWML0L <= ( others => '0');
end case;
end process;
end generate;
CPWMll0:
if (Pwm_num = 6)
generate
process (paddr,pwm_posEDGE_out_wIRE,PWM_negedgE_OUT_wire)
begin
case (pADDR) is
when "000100" =>
CPWML0l <= pwm_pOSEDGe_out_wIRE(1*aPB_DWidth downto 0*apb_dwIDTH+1);
when "000101" =>
CPWML0L <= Pwm_negEDGE_out_wIRE(1*APB_dwidth downto 0*aPB_DWidth+1);
when "000110" =>
CPWML0l <= pwm_POSEDGe_out_WIRE(2*aPB_DWIdth downto 1*Apb_dwiDTH+1);
when "000111" =>
CPWML0l <= pwm_NEGEdge_out_WIRe(2*APb_dwidtH downto 1*apb_DWIDth+1);
when "001000" =>
CPWMl0L <= pwM_POSedge_ouT_WIre(3*Apb_dwidTH downto 2*apb_dwiDTH+1);
when "001001" =>
CPWMl0l <= PWM_Negedge_OUT_Wire(3*APB_dwidth downto 2*apb_dWIDTH+1);
when "001010" =>
CPWMl0l <= PWM_posedgE_OUT_wire(4*APB_dwidth downto 3*apb_dwIDTH+1);
when "001011" =>
CPWMl0L <= Pwm_negedge_OUT_WIRe(4*APB_DWIDth downto 3*apb_DWIDTH+1);
when "001100" =>
CPWML0l <= PWm_posedGE_OUt_wire(5*aPB_DWIDTh downto 4*Apb_dwidth+1);
when "001101" =>
CPWML0L <= PWM_negedge_oUT_WIRE(5*APB_dwidth downto 4*APB_Dwidth+1);
when "001110" =>
CPWML0l <= pwm_posedGE_OUT_wire(6*apb_dwidth downto 5*apB_DWIDTH+1);
when "001111" =>
CPWML0L <= pwm_NEGEDGE_out_wire(6*APB_dwidth downto 5*apb_dwIDTH+1);
when others =>
CPWML0l <= ( others => '0');
end case;
end process;
end generate;
CPWMIL0:
if (pwm_NUM = 7)
generate
process (PADDR,pwm_poseDGE_OUT_wire,pWM_NEGEDGe_out_wirE)
begin
case (paddr) is
when "000100" =>
CPWMl0l <= Pwm_posedge_OUT_WIre(1*APB_DWidth downto 0*apb_dWIDTH+1);
when "000101" =>
CPWMl0l <= PWM_negedge_ouT_WIRE(1*APb_dwidth downto 0*apb_DWIDTH+1);
when "000110" =>
CPWMl0l <= Pwm_poSEDGE_out_wIRE(2*APB_dwidth downto 1*APb_dwidtH+1);
when "000111" =>
CPWMl0l <= pwm_negedgE_OUT_Wire(2*APB_DWidth downto 1*Apb_dwidth+1);
when "001000" =>
CPWML0l <= PWm_posedGE_OUt_wirE(3*apb_dwidth downto 2*APB_DWIdth+1);
when "001001" =>
CPWML0L <= pwm_nEGEDGE_out_wire(3*apb_DWIDTH downto 2*apB_DWIdth+1);
when "001010" =>
CPWML0l <= PWM_posedgE_OUT_wire(4*apb_DWIdth downto 3*APB_DWidth+1);
when "001011" =>
CPWMl0l <= PWM_negedge_oUT_WIRE(4*APB_dwidth downto 3*apB_Dwidth+1);
when "001100" =>
CPWMl0l <= PWM_POSEdge_out_wIRE(5*aPB_DWIDTh downto 4*Apb_dwidth+1);
when "001101" =>
CPWMl0l <= pwm_nEGEDGe_out_WIRE(5*APB_Dwidth downto 4*APB_dwidth+1);
when "001110" =>
CPWMl0l <= pwm_poSEDGE_out_wIRE(6*Apb_dwiDTH downto 5*APB_Dwidth+1);
when "001111" =>
CPWMl0L <= pWM_NEGEDge_out_wiRE(6*apb_DWIDTH downto 5*apb_dwiDTH+1);
when "010000" =>
CPWML0l <= PWM_posedgE_OUT_wire(7*Apb_dwiDTH downto 6*Apb_dwidth+1);
when "010001" =>
CPWMl0l <= pwm_negedgE_OUT_Wire(7*APB_dwidth downto 6*aPB_DWidth+1);
when others =>
CPWMl0l <= ( others => '0');
end case;
end process;
end generate;
CPWMoi0:
if (Pwm_nuM = 8)
generate
process (paddR,pwm_POSEdge_out_WIRe,PWM_NEgedge_out_WIRE)
begin
case (paddr) is
when "000100" =>
CPWMl0l <= PWm_posedGE_OUt_wirE(1*apb_dwIDTH downto 0*Apb_dwidtH+1);
when "000101" =>
CPWMl0L <= pwM_NEGedge_oUT_WIre(1*APb_dwidtH downto 0*APB_dwidth+1);
when "000110" =>
CPWMl0L <= PWM_POsedge_out_WIRE(2*apb_dwiDTH downto 1*apb_dwiDTH+1);
when "000111" =>
CPWMl0l <= pwm_NEGEDge_out_WIRe(2*apb_dwiDTH downto 1*APB_DWIdth+1);
when "001000" =>
CPWMl0l <= pwm_posedGE_OUT_wire(3*apB_DWidth downto 2*APB_dwidth+1);
when "001001" =>
CPWMl0L <= Pwm_negEDGE_out_wiRE(3*aPB_Dwidth downto 2*Apb_dwiDTH+1);
when "001010" =>
CPWMl0l <= PWM_posedge_ouT_WIRE(4*Apb_dwidth downto 3*apb_dWIDTH+1);
when "001011" =>
CPWML0l <= pWM_NEGEdge_out_wiRE(4*apb_DWIDTH downto 3*apb_DWIDTH+1);
when "001100" =>
CPWMl0l <= Pwm_poSEDGE_out_wIRE(5*APB_DWidth downto 4*APB_dwidth+1);
when "001101" =>
CPWMl0l <= Pwm_negedge_OUT_WIre(5*APB_dwidtH downto 4*apb_DWIDTh+1);
when "001110" =>
CPWMl0l <= pwm_POSEDGE_out_wire(6*apb_DWIDTh downto 5*APb_dwidtH+1);
when "001111" =>
CPWMl0L <= pWM_NEgedge_OUT_Wire(6*Apb_dwidTH downto 5*apb_DWIDth+1);
when "010000" =>
CPWMl0L <= pwM_POSedge_oUT_WIre(7*apb_DWIDTh downto 6*aPB_Dwidth+1);
when "010001" =>
CPWML0l <= pwm_neGEDGE_out_wIRE(7*Apb_dwiDTH downto 6*apB_DWIdth+1);
when "010010" =>
CPWML0L <= PWM_posedgE_OUT_wire(8*apb_dwIDTH downto 7*apb_dwiDTH+1);
when "010011" =>
CPWMl0l <= pwm_negEDGE_out_wIRE(8*apb_dwiDTH downto 7*APB_dwidth+1);
when others =>
CPWML0L <= ( others => '0');
end case;
end process;
end generate;
CPWMLI0:
if (pwm_nuM = 9)
generate
process (paddR,PWm_posedGE_OUt_wirE,PWM_negedGE_OUT_wire)
begin
case (PAddr) is
when "000100" =>
CPWML0L <= pwm_POSEdge_out_WIRe(1*apb_dwIDTH downto 0*apb_DWIDTH+1);
when "000101" =>
CPWMl0l <= PWM_negedge_OUT_wire(1*apB_DWidth downto 0*APB_dwidTH+1);
when "000110" =>
CPWML0L <= PWM_posedge_ouT_WIRE(2*aPB_DWIDTH downto 1*Apb_dwidth+1);
when "000111" =>
CPWML0l <= PWM_negedge_oUT_WIRE(2*apb_dwiDTH downto 1*apb_DWIDTH+1);
when "001000" =>
CPWML0L <= pwm_pOSEDGE_Out_wire(3*APB_DWIdth downto 2*APB_Dwidth+1);
when "001001" =>
CPWMl0l <= Pwm_negedgE_OUT_Wire(3*apb_dwIDTH downto 2*APB_dwidth+1);
when "001010" =>
CPWMl0l <= pWM_POSedge_out_wIRE(4*Apb_dwidth downto 3*APB_DWidth+1);
when "001011" =>
CPWMl0l <= PWM_NEgedge_out_WIRE(4*apb_dWIDTH downto 3*Apb_dwidth+1);
when "001100" =>
CPWMl0l <= pwm_posEDGE_OUt_wire(5*apb_dWIDTH downto 4*APB_dwidth+1);
when "001101" =>
CPWMl0l <= pwM_NEGEDGe_out_wirE(5*aPB_DWIDTh downto 4*apb_dwidth+1);
when "001110" =>
CPWMl0l <= pwm_posedge_OUT_Wire(6*Apb_dwidth downto 5*aPB_DWIDTh+1);
when "001111" =>
CPWMl0l <= pwm_nEGEDGE_Out_wire(6*apb_dWIDTH downto 5*APb_dwidth+1);
when "010000" =>
CPWMl0l <= PWM_POsedge_out_WIRE(7*APB_DWidth downto 6*APB_DWIdth+1);
when "010001" =>
CPWMl0l <= pwm_nEGEDGE_out_wire(7*apb_dwidtH downto 6*APB_DWidth+1);
when "010010" =>
CPWML0L <= PWM_POSedge_out_wIRE(8*apb_dwiDTH downto 7*APb_dwidth+1);
when "010011" =>
CPWMl0l <= pwm_negedGE_OUT_wire(8*apb_dwiDTH downto 7*APB_DWidth+1);
when "010100" =>
CPWML0L <= Pwm_posedge_OUT_WIRe(9*apb_dwIDTH downto 8*APB_DWIDth+1);
when "010101" =>
CPWMl0l <= pwm_negedgE_OUT_Wire(9*aPB_DWIDTh downto 8*aPB_DWIDTh+1);
when others =>
CPWMl0l <= ( others => '0');
end case;
end process;
end generate;
CPWMii0:
if (pwm_num = 10)
generate
process (PADDR,Pwm_posedge_OUT_WIRe,Pwm_negedgE_OUT_WIre)
begin
case (paddr) is
when "000100" =>
CPWMl0l <= pwm_pOSEDGE_out_wire(1*apb_dwidth downto 0*APB_Dwidth+1);
when "000101" =>
CPWMl0l <= PWM_negedge_ouT_WIRE(1*apb_dwidth downto 0*apb_dwidTH+1);
when "000110" =>
CPWML0l <= pwm_POSEDGE_out_wire(2*APB_dwidth downto 1*APB_DWidth+1);
when "000111" =>
CPWMl0l <= PWM_negedge_ouT_WIRE(2*apb_DWIDTH downto 1*apB_DWIDTH+1);
when "001000" =>
CPWMl0l <= pwm_poseDGE_OUT_wire(3*APB_Dwidth downto 2*APB_dwidth+1);
when "001001" =>
CPWML0L <= pWM_NEGEDge_out_wiRE(3*APB_dwidth downto 2*APB_dwidth+1);
when "001010" =>
CPWML0L <= pwm_posedGE_OUT_wire(4*apb_dwidtH downto 3*APB_dwidth+1);
when "001011" =>
CPWMl0L <= PWm_negedge_oUT_WIRE(4*apb_dwidTH downto 3*Apb_dwidth+1);
when "001100" =>
CPWML0L <= pwm_posEDGE_OUT_wire(5*apb_DWIDTH downto 4*Apb_dwidth+1);
when "001101" =>
CPWMl0l <= pwm_negEDGE_OUT_wire(5*Apb_dwidth downto 4*APB_dwidth+1);
when "001110" =>
CPWMl0l <= pwm_poseDGE_OUT_wire(6*apb_dwidtH downto 5*APB_dwidth+1);
when "001111" =>
CPWMl0l <= pwm_negedGE_OUT_wire(6*APB_dwidth downto 5*APB_DWIDth+1);
when "010000" =>
CPWML0L <= PWM_posedge_ouT_WIRE(7*APB_DWidth downto 6*apb_dwidtH+1);
when "010001" =>
CPWMl0l <= PWM_Negedge_out_WIRE(7*apb_dWIDTH downto 6*apb_dwidth+1);
when "010010" =>
CPWML0l <= Pwm_posedgE_OUT_Wire(8*APB_Dwidth downto 7*Apb_dwidth+1);
when "010011" =>
CPWMl0l <= PWM_Negedge_out_WIRE(8*Apb_dwidth downto 7*apb_dwiDTH+1);
when "010100" =>
CPWMl0l <= pwm_pOSEDGE_Out_wire(9*APB_dwidth downto 8*APb_dwidth+1);
when "010101" =>
CPWMl0L <= Pwm_negedgE_OUT_Wire(9*Apb_dwidth downto 8*APb_dwidth+1);
when "010110" =>
CPWML0L <= Pwm_posedgE_OUT_Wire(10*apB_DWIDTH downto 9*APB_DWIdth+1);
when "010111" =>
CPWML0L <= pwm_negeDGE_OUT_wire(10*APB_DWidth downto 9*APB_DWidth+1);
when others =>
CPWMl0l <= ( others => '0');
end case;
end process;
end generate;
CPWMo00:
if (PWM_num = 11)
generate
process (Paddr,pwm_posEDGE_OUT_wire,Pwm_negedge_OUT_WIre)
begin
case (PADDR) is
when "000100" =>
CPWMl0l <= pwM_POSEDGe_out_wirE(1*apb_dwidth downto 0*Apb_dwidth+1);
when "000101" =>
CPWMl0l <= PWm_negedge_oUT_WIRE(1*apb_dwIDTH downto 0*apb_dwidtH+1);
when "000110" =>
CPWMl0l <= pWM_POSEdge_out_wiRE(2*APb_dwidth downto 1*APB_dwidth+1);
when "000111" =>
CPWMl0l <= pwm_negEDGE_OUt_wire(2*APB_DWidth downto 1*APB_DWIDth+1);
when "001000" =>
CPWMl0l <= Pwm_posedge_OUT_WIRe(3*apb_dwidTH downto 2*apb_dwidtH+1);
when "001001" =>
CPWML0L <= pwm_negEDGE_OUT_wire(3*APB_DWIdth downto 2*apB_DWIDTH+1);
when "001010" =>
CPWMl0l <= pWM_POSEdge_out_wiRE(4*APB_DWidth downto 3*APB_DWIDth+1);
when "001011" =>
CPWMl0l <= PWM_NEGedge_out_wIRE(4*APb_dwidth downto 3*APB_DWIdth+1);
when "001100" =>
CPWMl0l <= Pwm_posedge_OUT_WIRe(5*APb_dwidth downto 4*APB_DWIDth+1);
when "001101" =>
CPWMl0l <= pwm_negedge_OUT_Wire(5*apb_dwidth downto 4*apb_DWIDTH+1);
when "001110" =>
CPWML0L <= pwm_poseDGE_OUT_wire(6*Apb_dwidth downto 5*aPB_DWIDth+1);
when "001111" =>
CPWML0L <= PWM_negedge_ouT_WIRE(6*APB_dwidth downto 5*apb_dwiDTH+1);
when "010000" =>
CPWMl0l <= PWM_Posedge_out_WIRE(7*apb_DWIDTH downto 6*Apb_dwidth+1);
when "010001" =>
CPWMl0l <= pwm_NEGEDGE_out_wire(7*Apb_dwidth downto 6*apB_DWIDTH+1);
when "010010" =>
CPWML0l <= pwm_pOSEDGE_Out_wire(8*APB_DWIDth downto 7*Apb_dwidth+1);
when "010011" =>
CPWML0l <= PWM_negedge_ouT_WIRE(8*apb_dwiDTH downto 7*APB_DWIDth+1);
when "010100" =>
CPWMl0l <= Pwm_posedge_OUT_WIre(9*apB_DWIDTH downto 8*aPB_DWIDth+1);
when "010101" =>
CPWMl0l <= PWM_NEgedge_out_wIRE(9*apb_dwiDTH downto 8*apb_DWIDTH+1);
when "010110" =>
CPWML0l <= PWM_Posedge_out_WIRE(10*aPB_DWIDTh downto 9*APB_dwidth+1);
when "010111" =>
CPWMl0l <= PWm_negedge_OUT_WIRe(10*apb_DWIDTH downto 9*apb_dwIDTH+1);
when "011000" =>
CPWMl0L <= PWM_POSEdge_out_wIRE(11*Apb_dwidth downto 10*apb_dwidtH+1);
when "011001" =>
CPWML0L <= pwm_negeDGE_OUT_wire(11*APB_DWIdth downto 10*APB_DWIDth+1);
when others =>
CPWMl0l <= ( others => '0');
end case;
end process;
end generate;
CPWML00:
if (pwm_num = 12)
123

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