initcfg_xc.vhd

Actel Fusion System Management Development Kit UART Example. Contains Libero design using CoreABC. P

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-- (c) Copyright 2005 Actel Corporation
--
-- name:		initcfg_xc.vhd
-- function:	SMARTgen IP
-- Rev:			1.4 28Nov05
--
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library ieee;use ieee.std_logic_1164.all;use ieee.numeric_std.all;entity
ffppvfwnggt is generic(rptpxqccxqw:integer:=4;gvwtbkksmbj:integer:=2;
zpzqwtrdvbp:integer:=10);port(hfnmhrgtvbw:in std_logic_vector((9*rptpxqccxqw)-1
downto 0);wckgrvdkczt:in std_logic_vector(rptpxqccxqw-1 downto 0);
ttgsznzrpgx:in std_logic;xphmpqnjghg:in std_logic_vector(gvwtbkksmbj-1 downto 0)
;xgqdtrbtfwr:in std_logic;rpwbwmfxnmj:in std_logic;mvgxfgvjfzn:in
std_logic_vector(gvwtbkksmbj-1 downto 0);tvwdrtjvkxv:in std_logic_vector(17
downto 0);npsdqxpcbcc:in std_logic_vector(rptpxqccxqw-1 downto 0);
tpbpwgndqfj:in std_logic_vector((zpzqwtrdvbp*rptpxqccxqw)-1 downto 0);
cggbcgzpbqb:in std_logic_vector((18*rptpxqccxqw)-1 downto 0);mkhhsrjxbqw:in
std_logic_vector(rptpxqccxqw-1 downto 0);grmnwjxgzvw:in std_logic_vector((
2*rptpxqccxqw)-1 downto 0);khvrbwfjxgg:in std_logic;ztfzcgnjxwm:in std_logic;
cwzmcmgmsdx:in std_logic;qhgxjbmgjjn:in std_logic;xztgfqxcvsn:in
std_logic_vector(17 downto 0);rvbtjpmttrw:in std_logic;mswqwhrrdnb:in
std_logic_vector(31 downto 0);phsjbhqdwhn:in std_logic;hgzbzvwmwjp:in std_logic;
dfdndrvffdg:in std_logic;rkqgvdgjjdm:in std_logic;sqmfmgjzzhj:in std_logic;
wszzgxmvfsb:in std_logic;mzkpttkkbsv:in std_logic;gtkwrtbsnbf:in std_logic;
nttmbcpkzph:in std_logic;ssqsspnkgjd:in std_logic;ctfxpdkwmzk:in std_logic;
hxkpgrwmgnc:in std_logic;ptqrpngxpps:in std_logic;twnbxjfbtqk:in
std_logic_vector(1 downto 0);tqxwgtnnjfs:in std_logic;wnfdjdhrdwv:in std_logic;
sdcfzkxtrzd:in std_logic;bjwbtkbjdsk:in std_logic;srdtcqsfmmm:out
std_logic_vector(17 downto 0);vbcmhtxvscg:out std_logic;nsdtxdxbqqg:out
std_logic_vector(31 downto 0);mjvwhrnznxb:out std_logic;spjddpncmkp:out
std_logic;jntbmncwjrh:out std_logic;pjmnhvnmvsc:out std_logic;zcqrjbdxdgn:out
std_logic;htfzmbpzfrs:out std_logic;rfrnsffpskk:out std_logic;twxmgvvpbgm:out
std_logic;zfstbsgfjch:out std_logic;wtggfgzpwqq:out std_logic;hhjmdcbhztg:out
std_logic;zsnhxwvhdkk:out std_logic;ctfnrvvgdns:out std_logic;hbqjhzzrbnr:out
std_logic_vector(1 downto 0);cpnkrsdhxsx:out std_logic;vvnvwmwdrjc:out
std_logic_vector(17 downto 0);bdtcqrsdjzd:out std_logic;sbtztkvwzpx:out
std_logic_vector(1 downto 0);drznfbqbzdw:out std_logic;mczmrrzffjt:out
std_logic;tvsvpgphqff:out std_logic_vector(zpzqwtrdvbp-1 downto 0);
qhmktczfjpq:out std_logic;cbfkvdxnxdp:out std_logic;ttkcwbrgmjd:out std_logic);
end ffppvfwnggt;architecture zgctkkxfnjk of ffppvfwnggt is signal
pqmzrrnpzvx:std_logic_vector(1 downto 0);signal zdcgqbjqvvz:std_logic_vector(1
downto 0);signal gmvpvmvhgsk:std_logic_vector(8 downto 0);signal
hcmmkfggqvf:std_logic_vector(17 downto 0);signal nkvgsknmttb:std_logic_vector(
17 downto 0);signal jvsdsgckbcw:std_logic_vector(zpzqwtrdvbp-1 downto 0);signal
nwpqgptcgtk:std_logic_vector(zpzqwtrdvbp-1 downto 0);signal
pqwkvrnjpgr:std_logic_vector(1 downto 0);signal pxfbwcdjghv:std_logic_vector(1
downto 0);signal gsfgwqpgnjz:std_logic_vector((9*rptpxqccxqw)-1 downto 0);
signal xrbjgmxdfvs:std_logic_vector(rptpxqccxqw-1 downto 0);signal
pzxrwrrghjp:std_logic;signal whtqjkrvqhz:std_logic_vector(gvwtbkksmbj-1 downto
0);signal xjhztzzsptg:std_logic;signal bqcjhjznrrk:std_logic;signal
wrdsgpbpffr:std_logic_vector(gvwtbkksmbj-1 downto 0);signal
mstwmxvjjjj:std_logic_vector(17 downto 0);signal fgrwbhfgbdr:std_logic_vector(
rptpxqccxqw-1 downto 0);signal jmqbtcrmtbc:std_logic_vector((
zpzqwtrdvbp*rptpxqccxqw)-1 downto 0);signal jpwmbghfxsf:std_logic_vector((
18*rptpxqccxqw)-1 downto 0);signal kscptwbprxp:std_logic_vector(rptpxqccxqw-1
downto 0);signal bwnnbzmgmdd:std_logic_vector((2*rptpxqccxqw)-1 downto 0);
signal tkkjzrbfzcp:std_logic;signal wcjdkrjwxww:std_logic;signal
gwtrbrhqntn:std_logic;signal tktsqctdscn:std_logic;signal
tkxbtrtwbvj:std_logic_vector(17 downto 0);signal mrkkngvmwhz:std_logic;signal
vfrpsxnmfzc:std_logic_vector(31 downto 0);signal qpxcfnstvqw:std_logic;signal
xswqvtvwdpv:std_logic;signal rwpkppxdtxh:std_logic;signal gvhwvqqspzv:std_logic;
signal cvjdmtswkkp:std_logic;signal fksjbpqtwgw:std_logic;signal
vmtqjbqqjcs:std_logic;signal qrfptxnrgnv:std_logic;signal prfwdgvqqtd:std_logic;
signal dftgvmdgdvk:std_logic;signal jkmjprqwcph:std_logic;signal
rpgtbpqsqrc:std_logic;signal rphpdvfvgtp:std_logic;signal
gxkwbxcqvpq:std_logic_vector(1 downto 0);signal jdsfxrrjxpz:std_logic;signal
xkchnvrpmwp:std_logic;signal wxqqqsndpvg:std_logic;signal zzpfqcmdqzq:std_logic;
signal ngdspksjjpt:std_logic_vector(17 downto 0);signal gkctznwcrvw:std_logic;
signal gsrsvcdmswx:std_logic_vector(31 downto 0);signal ghgvftjwxjj:std_logic;
signal khtmnzqrmnj:std_logic;signal zmkhctbgmsw:std_logic;signal
cdgxttdqxhx:std_logic;signal cxxrzhsvrbd:std_logic;signal dmzzmqsqnsw:std_logic;
signal bjcmhfnnsxz:std_logic;signal phchxmqrjkq:std_logic;signal
mgjxrzbrbpz:std_logic;signal pfpvqvtqjrf:std_logic;signal gwxkmmhqxqq:std_logic;
signal jrfrmmpsrws:std_logic;signal tvkmzbtjcnr:std_logic;signal
dwcmbrvwjsc:std_logic_vector(1 downto 0);signal hrzmvjtgbdf:std_logic;signal
hrdbnmzftpn:std_logic_vector(17 downto 0);signal dqwznvdhpnz:std_logic;signal
bfkrkghvcjk:std_logic_vector(1 downto 0);signal spvtvgmxprb:std_logic;signal
phzmjbbksvq:std_logic;signal cpqqthwwhvc:std_logic_vector(zpzqwtrdvbp-1 downto
0);signal ksrtmtcfcwj:std_logic;signal kswswprpfgw:std_logic;signal
dfnxtgvkvjr:std_logic;begin gsfgwqpgnjz<=hfnmhrgtvbw;xrbjgmxdfvs<=wckgrvdkczt;
pzxrwrrghjp<=ttgsznzrpgx;whtqjkrvqhz<=xphmpqnjghg;xjhztzzsptg<=xgqdtrbtfwr;
bqcjhjznrrk<=rpwbwmfxnmj;wrdsgpbpffr<=mvgxfgvjfzn;mstwmxvjjjj<=tvwdrtjvkxv;
fgrwbhfgbdr<=npsdqxpcbcc;jmqbtcrmtbc<=tpbpwgndqfj;jpwmbghfxsf<=cggbcgzpbqb;
kscptwbprxp<=mkhhsrjxbqw;bwnnbzmgmdd<=grmnwjxgzvw;tkkjzrbfzcp<=khvrbwfjxgg;
wcjdkrjwxww<=ztfzcgnjxwm;gwtrbrhqntn<=cwzmcmgmsdx;tktsqctdscn<=qhgxjbmgjjn;
tkxbtrtwbvj<=xztgfqxcvsn;mrkkngvmwhz<=rvbtjpmttrw;vfrpsxnmfzc<=mswqwhrrdnb;
qpxcfnstvqw<=phsjbhqdwhn;xswqvtvwdpv<=hgzbzvwmwjp;rwpkppxdtxh<=dfdndrvffdg;
gvhwvqqspzv<=rkqgvdgjjdm;cvjdmtswkkp<=sqmfmgjzzhj;fksjbpqtwgw<=wszzgxmvfsb;
vmtqjbqqjcs<=mzkpttkkbsv;qrfptxnrgnv<=gtkwrtbsnbf;prfwdgvqqtd<=nttmbcpkzph;
dftgvmdgdvk<=ssqsspnkgjd;jkmjprqwcph<=ctfxpdkwmzk;rpgtbpqsqrc<=hxkpgrwmgnc;
rphpdvfvgtp<=ptqrpngxpps;gxkwbxcqvpq<=twnbxjfbtqk;jdsfxrrjxpz<=tqxwgtnnjfs;
xkchnvrpmwp<=wnfdjdhrdwv;wxqqqsndpvg<=sdcfzkxtrzd;zzpfqcmdqzq<=bjwbtkbjdsk;
srdtcqsfmmm<=ngdspksjjpt;vbcmhtxvscg<=gkctznwcrvw;nsdtxdxbqqg<=gsrsvcdmswx;
mjvwhrnznxb<=ghgvftjwxjj;spjddpncmkp<=khtmnzqrmnj;jntbmncwjrh<=zmkhctbgmsw;
pjmnhvnmvsc<=cdgxttdqxhx;zcqrjbdxdgn<=cxxrzhsvrbd;htfzmbpzfrs<=dmzzmqsqnsw;
rfrnsffpskk<=bjcmhfnnsxz;twxmgvvpbgm<=phchxmqrjkq;zfstbsgfjch<=mgjxrzbrbpz;
wtggfgzpwqq<=pfpvqvtqjrf;hhjmdcbhztg<=gwxkmmhqxqq;zsnhxwvhdkk<=jrfrmmpsrws;
ctfnrvvgdns<=tvkmzbtjcnr;hbqjhzzrbnr<=dwcmbrvwjsc;cpnkrsdhxsx<=hrzmvjtgbdf;
vvnvwmwdrjc<=hrdbnmzftpn;bdtcqrsdjzd<=dqwznvdhpnz;sbtztkvwzpx<=bfkrkghvcjk;
drznfbqbzdw<=spvtvgmxprb;mczmrrzffjt<=phzmjbbksvq;tvsvpgphqff<=cpqqthwwhvc;
qhmktczfjpq<=ksrtmtcfcwj;cbfkvdxnxdp<=kswswprpfgw;ttkcwbrgmjd<=dfnxtgvkvjr;
bfkrkghvcjk<=pqmzrrnpzvx;zdcgqbjqvvz<=pqmzrrnpzvx;tgpbgnnfbxn:for i in 0 to 8
generate gmvpvmvhgsk(i)<=gsfgwqpgnjz((9*to_integer(unsigned(wrdsgpbpffr)))+i);
end generate;fbbktrwjsfz:for i in 0 to 17 generate hcmmkfggqvf(i)<=jpwmbghfxsf((
18*to_integer(unsigned(whtqjkrvqhz)))+i);end generate;hsqbbkcrhtz:for i in 7 to
17 generate nkvgsknmttb(i)<=jpwmbghfxsf((18*to_integer(unsigned(wrdsgpbpffr)))
+i);end generate;kmmcjftffcb:for i in 0 to 6 generate nkvgsknmttb(i)<='0';end
generate;qdsrcxnjmqd:for i in 0 to zpzqwtrdvbp-1 generate jvsdsgckbcw(i)
<=jmqbtcrmtbc((zpzqwtrdvbp*to_integer(unsigned(whtqjkrvqhz)))+i);end generate;
zxzfdgsvvwt:for i in 0 to zpzqwtrdvbp-1 generate nwpqgptcgtk(i)<=jmqbtcrmtbc((
zpzqwtrdvbp*to_integer(unsigned(wrdsgpbpffr)))+i);end generate;mrnhkstpdfd:for
i in 0 to 1 generate pqwkvrnjpgr(i)<=bwnnbzmgmdd((2*to_integer(unsigned(
whtqjkrvqhz)))+i);end generate;dbgvvmtsxbh:for i in 0 to 1 generate pxfbwcdjghv(
i)<=bwnnbzmgmdd((2*to_integer(unsigned(wrdsgpbpffr)))+i);end generate;