mpmc_pl175_sdr.s.svn-base

Spearhead2000 的 USB驱动程序

    STR     a2, [a1, #0]

    ; /* Set Dynamic memory clock enable, issue NOP command
    ;  * and for Micron SyncFlash set the RP value HIGH
    ;  */
    ; ((PL175_sRegisters *) eBase)->DynamicControl =
    ;	  apBIT_BUILD( PL175_DYNAMIC_CONTROL_CE,   apPL175_CLK_DRIVEN_HIGH )   |
    ;	  apBIT_BUILD( PL175_DYNAMIC_CONTROL_CS,   apPL175_CLKOUT_RUNS ) |
    ;	  apBIT_BUILD( PL175_DYNAMIC_CONTROL_SR,   apPL175_NORMAL_MODE )       |
    ;	  apBIT_BUILD( PL175_DYNAMIC_CONTROL_SRMCC,  apPL175_CLKOUT_SREF_RUN )   |
    ;	  apBIT_BUILD( PL175_DYNAMIC_CONTROL_IMCC, apPL175_NCLKOUT_ENABLED )   |
    ;	  apBIT_BUILD( PL175_DYNAMIC_CONTROL_MCC,  apPL175_CLKOUT_ENABLED )    |
    ;	  apBIT_BUILD( PL175_DYNAMIC_CONTROL_I,    apPL175_INIT_NOP )	       |
    ;	  apBIT_BUILD( PL175_DYNAMIC_CONTROL_DC,   apPL175_DLL_HANDSHAKING_DISABLED )  |
    ;	  apBIT_BUILD( PL175_DYNAMIC_CONTROL_DE,   apPL175_DLL_HANDSHAKING_DISABLED )  |
    ;	  apBIT_BUILD( PL175_DYNAMIC_CONTROL_DP,   apPL175_NORMAL_OPERATION )  |
    ;	  apBIT_BUILD( PL175_DYNAMIC_CONTROL_NRP,  apPL175_RP_HIGH )		|
    ;	  apBIT_BUILD( PL175_DYNAMIC_CONTROL_RPV,  apPL175_RPVHH_NORMAL );

    LDR     a2, =0x418b
    LDR     a1, =MPMCDynamicControl
    STR     a2, [a1, #0]
    
    ; /* Wait */
    ; apOS_TIMER_Wait( pInitial->PauseMemInit );
    LDR     a1, =PAUSE_MEM_INIT
    ;BL      TimerWait

    ;/* Issue PALL */
    ;((PL175_sRegisters *) eBase)->DynamicControl =
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_CE,   apPL175_CLK_DRIVEN_HIGH )   |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_CS,   apPL175_CLKOUT_RUNS ) |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_SR,   apPL175_NORMAL_MODE )       |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_SRMCC,  apPL175_CLKOUT_SREF_RUN )	|
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_IMCC, apPL175_NCLKOUT_ENABLED )   |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_MCC,  apPL175_CLKOUT_ENABLED )    |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_I,    apPL175_INIT_PALL )	      |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_DC,   apPL175_DLL_HANDSHAKING_DISABLED )  |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_DE,   apPL175_DLL_HANDSHAKING_DISABLED )  |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_DP,   apPL175_NORMAL_OPERATION )  |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_NRP,  apPL175_RP_HIGH )	      |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_RPV,  apPL175_RPVHH_NORMAL );

    LDR     a2, =0x410b
    LDR     a1, =MPMCDynamicControl
    STR     a2, [a1, #0]

    ; /* Set initial refresh timer value */
    ; ((PL175_sRegisters *) eBase)->DynamicRefresh = PL175_REFRESH_INIT;

    LDR     a2, =0x2
    LDR     a1, =MPMCDynamicRefresh
    STR     a2, [a1, #0]

    ; /* Wait */
    ; apOS_TIMER_Wait( pInitial->PauseRefresh );
    LDR     a1, =PAUSE_REFRESH_INIT
    ;BL      TimerWait

    ; /* Program the operational value into the refresh timer */
    ; ((PL175_sRegisters *) eBase)->DynamicRefresh = pInitial->sConfig.DynamicRefreshTime;

    LDR     a2, =PL175_DYNAMIC_REFRESH_TIME_INIT
    LDR     a1, =MPMCDynamicRefresh
    STR     a2, [a1, #0]

    ; /* Program MPMCConfig register */
    ; ((PL175_sRegisters *) eBase)->Config =
    ;     apBIT_BUILD( PL175_CONFIG_N,   pInitial->sConfig.eEndianMode );

    LDR     a2, =PL175_ENDIANITY
    LDR     a1, =MPMCConfig
    STR     a2, [a1, #0]

    ; /* Program MPMCReadConfig register */
    ; ((PL175_sRegisters *) eBase)->DynamicReadConfig =
    ;    apBIT_BUILD( PL175_READ_DATA_SRD , pInitial->sConfig.eReadDataStrategySDR) |
    ;    apBIT_BUILD( PL175_READ_DATA_SRP , pInitial->sConfig.eReadDataPolaritySDR) |
    ;    apBIT_BUILD( PL175_READ_DATA_DRD , pInitial->sConfig.eReadDataStrategyDDR) |
    ;    apBIT_BUILD( PL175_READ_DATA_DRP , pInitial->sConfig.eReadDataPolarityDDR) ;

    LDR     a2, =PL175_DATA_STRATEGY
    LDR     a1, =MPMCDynamicReadConfig
    STR     a2, [a1, #0]

    ; /* Program MPMCDynamictRP register */
    ; ((PL175_sRegisters *) eBase)->DynamictRP = pInitial->sConfig.DynamictRP; 
  
    LDR     a2, =PL175_DYNAMIC_TRP_INIT
    LDR     a1, =MPMCDynamictRP
    STR     a2, [a1, #0]

    ; /* Program MPMCDynamictRAS register */
    ; ((PL175_sRegisters *) eBase)->DynamictRAS = pInitial->sConfig.DynamictRAS;
  
    LDR     a2, =PL175_DYNAMIC_TRAS_INIT
    LDR     a1, =MPMCDynamictRAS
    STR     a2, [a1, #0]

    ; /* Program MPMCDynamictSREX register */
    ; ((PL175_sRegisters *) eBase)->DynamictSREX = pInitial->sConfig.DynamictSREX;
  
    LDR     a2, =PL175_DYNAMIC_TSREX_INIT
    LDR     a1, =MPMCDynamictSREX
    STR     a2, [a1, #0]

    ; /* Program MPMCDynamictWR register */
    ; ((PL175_sRegisters *) eBase)->DynamictWR = pInitial->sConfig.DynamictWR;
  
    LDR     a2, =PL175_DYNAMIC_TWR_INIT
    LDR     a1, =MPMCDynamictWR
    STR     a2, [a1, #0]

    ; /* Program MPMCDynamictRC register */
    ; ((PL175_sRegisters *) eBase)->DynamictRC = pInitial->sConfig.DynamictRC;
  
    LDR     a2, =PL175_DYNAMIC_TRC_INIT
    LDR     a1, =MPMCDynamictRC
    STR     a2, [a1, #0]

    ; /* Program MPMCDynamictRFC register */
    ; ((PL175_sRegisters *) eBase)->DynamictRFC = pInitial->sConfig.DynamictRFC;
  
    LDR     a2, =PL175_DYNAMIC_TRFC_INIT
    LDR     a1, =MPMCDynamictRFC
    STR     a2, [a1, #0]

    ; /* Program MPMCDynamictXSR register */
    ; ((PL175_sRegisters *) eBase)->DynamictXSR = pInitial->sConfig.DynamictXSR;
  
    LDR     a2, =PL175_DYNAMIC_TXSR_INIT
    LDR     a1, =MPMCDynamictXSR
    STR     a2, [a1, #0]
  
    ; /* Program MPMCDynamictRRD register */
    ; ((PL175_sRegisters *) eBase)->DynamictRRD = pInitial->sConfig.DynamictRRD;
  
    LDR     a2, =PL175_DYNAMIC_TRRD_INIT
    LDR     a1, =MPMCDynamictRRD
    STR     a2, [a1, #0]

    ; /* Program MPMCDynamictMRD register */
    ; ((PL175_sRegisters *) eBase)->DynamictMRD = pInitial->sConfig.DynamictMRD;
  
    LDR     a2, =PL175_DYNAMIC_TMRD_INIT
    LDR     a1, =MPMCDynamictMRD
    STR     a2, [a1, #0]

    ; /* Program MPMCDynamictCDLR register */
    ; ((PL175_sRegisters *) eBase)->DynamictCDLR = pInitial->sConfig.DynamictCDLR;
  
    LDR     a2, =PL175_DYNAMIC_TCDLR_INIT
    LDR     a1, =MPMCDynamictCDLR
    STR     a2, [a1, #0]

    ; /* Program MPMCStaticExtendedWait register */
    ; ((PL175_sRegisters *) eBase)->StaticExtendedWait = pInitial->sConfig.StaticExtendedWait;


    ;;;;;;;;;;;;;;;;;;;;;;;;;;;;
    ; Program Dynamic memory #0
    ;;;;;;;;;;;;;;;;;;;;;;;;;;;;
    
    ; /* Program MPMCDynamicRasCas register[] */									      
    ; ((PL175_sDynamicRegs *) pMemRegs)->DynamicRasCas =								      
    ; 	apBIT_BUILD( PL175_DYNAMIC_RASCAS_RAS, ((apPL175_sDynamicConfig *)pMemConfig)->eDynamicRASLatency ) |	      
    ;	apBIT_BUILD( PL175_DYNAMIC_RASCAS_CAS, ((apPL175_sDynamicConfig *)pMemConfig)->eDynamicCASLatency );	      
  
    LDR     a2, =PL175_RAS_CAS_LATENCY
    LDR     a1, =MPMCDynamicRasCas0
    STR     a2, [a1, #0]

    ; /* Program MPMCDynamicConfig[] register */									      
    ; ((PL175_sDynamicRegs *) pMemRegs)->DynamicConfig =								      
    ;	apBIT_BUILD( PL175_DYNAMIC_CONFIG_MD, ((apPL175_sDynamicConfig *)pMemConfig)->eDynamicMemoryDevice   ) |      
    ;	apBIT_BUILD( PL175_DYNAMIC_CONFIG_AM, ((apPL175_sDynamicConfig *)pMemConfig)->eDynamicAddressMapping ) |      
    ;	apBIT_BUILD( PL175_DYNAMIC_CONFIG_P,  ((apPL175_sDynamicConfig *)pMemConfig)->eDynamicWriteProtect   );       
  
    LDR     a2, =PL175_CONFIG0
    LDR     a1, =MPMCDynamicConfig0
    STR     a2, [a1, #0]
   
    ;/* Select command write mode */
    ;((PL175_sRegisters *) eBase)->DynamicControl =
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_CE,   apPL175_CLK_DRIVEN_HIGH )   |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_CS,   apPL175_CLKOUT_RUNS ) |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_SR,   apPL175_NORMAL_MODE )       |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_SRMCC,  apPL175_CLKOUT_SREF_RUN )	|
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_IMCC, apPL175_NCLKOUT_ENABLED )   |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_MCC,  apPL175_CLKOUT_ENABLED )    |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_I,    apPL175_INIT_MODE )	      |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_DC,   apPL175_DLL_HANDSHAKING_DISABLED )  |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_DE,   apPL175_DLL_HANDSHAKING_DISABLED )  |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_DP,   apPL175_NORMAL_OPERATION )  |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_NRP,  apPL175_RP_HIGH )	      |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_RPV,  apPL175_RPVHH_NORMAL );

    LDR     a2, =0x408b
    LDR     a1, =MPMCDynamicControl
    STR     a2, [a1, #0]

    ;;;;;;;;;;;;;;;;;;;;;;;;;;;;
    ; Program Mode and ExtMode registers for dynamic #0
    ;;;;;;;;;;;;;;;;;;;;;;;;;;;;
    
    ; /* If the Extended Mode Register has been set , perform additional read	         
    ;  * to program the SDRAM extended mode register.				         
    ;  * For DDR memories should disable DLL.					         
    ;  */									         
    ; if( pInitial->uSDRAMExtModeConfig[ 0 ] != 0 )				         
    ; {										         
    ; 	 (void) *((volatile UWORD32 *) pInitial->uSDRAMExtModeConfig[ I ]);	         
    ; }										         

    LDR     a1, =uSDRAMExtModeConfig0
    CMP     a1, #0x0
    LDRNE   a2, [a1, #0]

    ; /* Perform read to each device. 						         
    ;  * The address of the read is used to configure the SDRAM memories mode register.   
    ;  * For DDR memories should reset DLL.					         
    ;  */									         
    ; if( pInitial->uSDRAMModeConfig[ 0 ] != 0 ) 				         
    ; {										         
    ; 	 (void) *((volatile UWORD32 *) pInitial->uSDRAMModeConfig[ I ]);	         
    ; }										         

    LDR     a1, =uSDRAMModeConfig0
    CMP     a1, #0x0
    LDRNE   a2, [a1, #0]
            
    ; /* Wait */
    ; apOS_TIMER_Wait( pInitial->PauseMemInit );
    LDR     a1, =PAUSE_MEM_INIT
    
	 ;BL      TimerWait

    ;/* Issue PALL */
    ;((PL175_sRegisters *) eBase)->DynamicControl =
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_CE,   apPL175_CLK_DRIVEN_HIGH )   |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_CS,   apPL175_CLKOUT_RUNS ) |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_SR,   apPL175_NORMAL_MODE )       |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_SRMCC,  apPL175_CLKOUT_SREF_RUN )	|
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_IMCC, apPL175_NCLKOUT_ENABLED )   |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_MCC,  apPL175_CLKOUT_ENABLED )    |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_I,    apPL175_INIT_PALL )	      |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_DC,   apPL175_DLL_HANDSHAKING_DISABLED )  |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_DE,   apPL175_DLL_HANDSHAKING_DISABLED )  |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_DP,   apPL175_NORMAL_OPERATION )  |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_NRP,  apPL175_RP_HIGH )	      |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_RPV,  apPL175_RPVHH_NORMAL );

    LDR     a2, =0x410b
    LDR     a1, =MPMCDynamicControl
    STR     a2, [a1, #0]

    ; /* Wait */
    ; apOS_TIMER_Wait( pInitial->PauseRefresh );
    LDR     a1, =PAUSE_REFRESH_INIT
    ;BL      TimerWait

    ;/* Select command write mode */
    ;((PL175_sRegisters *) eBase)->DynamicControl =
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_CE,   apPL175_CLK_DRIVEN_HIGH )   |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_CS,   apPL175_CLKOUT_RUNS ) |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_SR,   apPL175_NORMAL_MODE )       |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_SRMCC,  apPL175_CLKOUT_SREF_RUN )	|
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_IMCC, apPL175_NCLKOUT_ENABLED )   |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_MCC,  apPL175_CLKOUT_ENABLED )    |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_I,    apPL175_INIT_MODE )	      |
    ;	 apBIT_BUILD( PL175_DYNAMIC_CONTROL_DC,   apPL175_DLL_HANDSHAKING_DISABLED )  |