mac.c.arma.svn-base

Spearhead2000 的 USB驱动程序

	// Program the DMA_MAC interrupts
	*DmaMac_IntEn	= 
			(	
			DmaMac_MACInt |
			DmaMac_RxCurrDone | 
			DmaMac_TxCurrDone | 
			0);

	init_descrs();

      	intctlIntRegister(ITC_MAC_int, MAC_IRQ_Handler, 1);
}
/********************************************/

/************ MAC Read Routine **************/
int MAC_Read(char* frame_p)
{
   	unsigned        DmaStat;
   	DmaMacDescr*    DmaDesc_p = MAC_ALIAS_MEMORY | (int)&(RX_MAC_DescrTable[RX_MAC_currDescNum]);
   	MACFrame*       Frame_Hdr_p;
   
   	if (MAC_event_rx == 0) return(-1); 		  
   	MAC_event_rx = 0;

   	/* Read the Control and Status field of the current DMA descriptor */
   	DmaStat = DmaDesc_p->TxRx_Status;            
   
   	/* Check  if the owner is the CPU */
   	if (DmaStat & DmaMac_Valid) return(-1);       

   	/* WARNING: Missed Frame */			            
   	if (DmaStat & Mac_MissedFrm) return(-1);	               						            
   	
   	/*** control for a single source address ***/
   	Frame_Hdr_p = (MACFrame*)DmaDesc_p->DmaMac_Addr;
//   	if (memcmp(Frame_Hdr_p->MAC_DstAddr, MAC_Addr_alt, 6) == 0)   //trial for promiscus mode
   	if (memcmp(Frame_Hdr_p->MAC_DstAddr, MAC_Addr, 6) == 0)
   	{  
   		memcpy(frame_p, DmaDesc_p->DmaMac_Addr, (DmaStat & Mac_FrmLen));

   		/* Make the current descriptor valid again and go to the next one */ 						     
   		DmaDesc_p->TxRx_Status |= DmaMac_Valid;						     

   		/* Test the wrap-around condition. */										     
   		if (++RX_MAC_currDescNum >= RX_MAC_DESCR_NUM) RX_MAC_currDescNum = 0;						     

    		// enable interrupts!!!
    		intctlIntEnable(ITC_MAC_int);

   		return((DmaStat & Mac_FrmLen));														     
   	}
   	/*******************************************/

   	/* Make the current descriptor valid again and go to the next one */ 						     
   	DmaDesc_p->TxRx_Status |= DmaMac_Valid;						     

   	/* Test the wrap-around condition. */										     
   	if (++RX_MAC_currDescNum >= RX_MAC_DESCR_NUM) RX_MAC_currDescNum = 0;						     

   	// enable interrupts!!!
   	intctlIntEnable(ITC_MAC_int);

   	return(-1);														     
}
/********************************************/

/*********** MAC Write Routine **************/
int MAC_Write(char* frame_p, unsigned int len)
{
    	unsigned        DmaStat;
   	DmaMacDescr*    DmaDesc_p = MAC_ALIAS_MEMORY | (int)&(TX_MAC_DescrTable[TX_MAC_currDescNum]);

	DmaStat = DmaDesc_p->TxRx_Status;

    	/* Check  if the owner is the CPU */
    	if (DmaStat & DmaMac_Valid) return(-1);                                                        

    	/* Check if we reached the maximum TX window size */
    	// if (MAC_TX_WinSize >= TX_MAC_DESCR_NUM) return(-1);

    	/* Prepare the Frame to send. */
    	memcpy(DmaDesc_p->DmaMac_Addr, frame_p, len);
    	DmaDesc_p->DmaMac_Cntl =  DmaMac_NxtEn |                                                                                                  
                              	  (len & DmaMac_XferCntMsk) |                           
                              	  ((32 * DmaMac_EntryTrigU) & DmaMac_EntryTrigMsk);          
    	DmaDesc_p->TxRx_Status = DmaMac_Valid;

    	*DmaMac_TxDMAStart |= DmaMac_StartFetch | 
                              ((1000 * DmaMac_DFetchDlyU) & DmaMac_DFetchDlyMsk);

    	/* Test the wrap-around condition. */
    	if (++TX_MAC_currDescNum >= TX_MAC_DESCR_NUM) TX_MAC_currDescNum = 0;

    	return(0);
}
/********************************************/
#if 0
/*********** MAC Write Routine **************/
int MAC_Write(char* frame_p, unsigned int len)
{
    	unsigned        DmaStat;
   	DmaMacDescr*    DmaDesc_p = MAC_ALIAS_MEMORY | (int)&(TX_MAC_DescrTable[TX_MAC_currDescNum]);

	DmaStat = DmaDesc_p->TxRx_Status;

    	/* Check  if the owner is the CPU */
    	if (DmaStat & DmaMac_Valid) return(-1);                                                        

    	/* Check if we reached the maximum TX window size */
    	// if (MAC_TX_WinSize >= TX_MAC_DESCR_NUM) return(-1);

    	/********************** Prepare the 1st Frame to send. **********************/
    	memcpy(DmaDesc_p->DmaMac_Addr, frame_p, len);
    	DmaDesc_p->DmaMac_Cntl =  DmaMac_NxtEn |                                                                                                  
                              	  (len & DmaMac_XferCntMsk) |                           
                              	  ((32 * DmaMac_EntryTrigU) & DmaMac_EntryTrigMsk);          
    	DmaDesc_p->TxRx_Status = DmaMac_Valid;
    	/* Test the wrap-around condition. */
    	if (++TX_MAC_currDescNum >= TX_MAC_DESCR_NUM) TX_MAC_currDescNum = 0;

    	/********************** Prepare the 2nd Frame to send. ***************************/
    	DmaDesc_p = MAC_ALIAS_MEMORY | (int)&(TX_MAC_DescrTable[TX_MAC_currDescNum]);
	memcpy(DmaDesc_p->DmaMac_Addr, frame_p, len);
    	DmaDesc_p->DmaMac_Cntl =  DmaMac_NxtEn |                                                                                                  
                              	  (len & DmaMac_XferCntMsk) |                           
                              	  ((32 * DmaMac_EntryTrigU) & DmaMac_EntryTrigMsk);          
    	DmaDesc_p->TxRx_Status = DmaMac_Valid;
    	/* Test the wrap-around condition. */
    	if (++TX_MAC_currDescNum >= TX_MAC_DESCR_NUM) TX_MAC_currDescNum = 0;

    	/********************** Prepare the 3rd Frame to send. **********************/
    	DmaDesc_p = MAC_ALIAS_MEMORY | (int)&(TX_MAC_DescrTable[TX_MAC_currDescNum]);
    	memcpy(DmaDesc_p->DmaMac_Addr, frame_p, len);
    	DmaDesc_p->DmaMac_Cntl =  DmaMac_NxtEn |                                                                                                  
                              	  (len & DmaMac_XferCntMsk) |                           
                              	  ((32 * DmaMac_EntryTrigU) & DmaMac_EntryTrigMsk);          
    	DmaDesc_p->TxRx_Status = DmaMac_Valid;
    	/* Test the wrap-around condition. */
    	if (++TX_MAC_currDescNum >= TX_MAC_DESCR_NUM) TX_MAC_currDescNum = 0;

    	/********************** Prepare the 4th Frame to send. **********************/
    	DmaDesc_p = MAC_ALIAS_MEMORY | (int)&(TX_MAC_DescrTable[TX_MAC_currDescNum]);
    	memcpy(DmaDesc_p->DmaMac_Addr, frame_p, len);
    	DmaDesc_p->DmaMac_Cntl =  DmaMac_NxtEn |                                                                                                  
                              	  (len & DmaMac_XferCntMsk) |                           
                              	  ((32 * DmaMac_EntryTrigU) & DmaMac_EntryTrigMsk);          
    	DmaDesc_p->TxRx_Status = DmaMac_Valid;
    	/* Test the wrap-around condition. */
    	if (++TX_MAC_currDescNum >= TX_MAC_DESCR_NUM) TX_MAC_currDescNum = 0;

    	/********************** Prepare the 5th Frame to send. **********************/
    	DmaDesc_p = MAC_ALIAS_MEMORY | (int)&(TX_MAC_DescrTable[TX_MAC_currDescNum]);
    	memcpy(DmaDesc_p->DmaMac_Addr, frame_p, len);
    	DmaDesc_p->DmaMac_Cntl =  DmaMac_NxtEn |                                                                                                  
                              	  (len & DmaMac_XferCntMsk) |                           
                              	  ((32 * DmaMac_EntryTrigU) & DmaMac_EntryTrigMsk);          
    	DmaDesc_p->TxRx_Status = DmaMac_Valid;
    	/* Test the wrap-around condition. */
    	if (++TX_MAC_currDescNum >= TX_MAC_DESCR_NUM) TX_MAC_currDescNum = 0;

    	/********************** Prepare the 6th Frame to send. **********************/
    	DmaDesc_p = MAC_ALIAS_MEMORY | (int)&(TX_MAC_DescrTable[TX_MAC_currDescNum]);
    	memcpy(DmaDesc_p->DmaMac_Addr, frame_p, len);
    	DmaDesc_p->DmaMac_Cntl =  DmaMac_NxtEn |                                                                                                  
                              	  (len & DmaMac_XferCntMsk) |                           
                              	  ((32 * DmaMac_EntryTrigU) & DmaMac_EntryTrigMsk);          
    	DmaDesc_p->TxRx_Status = DmaMac_Valid;
    	/* Test the wrap-around condition. */
    	if (++TX_MAC_currDescNum >= TX_MAC_DESCR_NUM) TX_MAC_currDescNum = 0;

    	/********************** Prepare the 7th Frame to send. **********************/
    	DmaDesc_p = MAC_ALIAS_MEMORY | (int)&(TX_MAC_DescrTable[TX_MAC_currDescNum]);
    	memcpy(DmaDesc_p->DmaMac_Addr, frame_p, len);
    	DmaDesc_p->DmaMac_Cntl =  DmaMac_NxtEn |                                                                                                  
                              	  (len & DmaMac_XferCntMsk) |                           
                              	  ((32 * DmaMac_EntryTrigU) & DmaMac_EntryTrigMsk);          
    	DmaDesc_p->TxRx_Status = DmaMac_Valid;
    	/* Test the wrap-around condition. */
    	if (++TX_MAC_currDescNum >= TX_MAC_DESCR_NUM) TX_MAC_currDescNum = 0;

    	/********************** Prepare the 8th Frame to send. **********************/
    	DmaDesc_p = MAC_ALIAS_MEMORY | (int)&(TX_MAC_DescrTable[TX_MAC_currDescNum]);
    	memcpy(DmaDesc_p->DmaMac_Addr, frame_p, len);
    	DmaDesc_p->DmaMac_Cntl =  DmaMac_NxtEn |                                                                                                  
                              	  (len & DmaMac_XferCntMsk) |                           
                              	  ((32 * DmaMac_EntryTrigU) & DmaMac_EntryTrigMsk);          
    	DmaDesc_p->TxRx_Status = DmaMac_Valid;
    	/* Test the wrap-around condition. */
    	if (++TX_MAC_currDescNum >= TX_MAC_DESCR_NUM) TX_MAC_currDescNum = 0;


    	/********************** Start **********************/
    	*DmaMac_TxDMAStart |= DmaMac_StartFetch | 
                              ((1000 * DmaMac_DFetchDlyU) & DmaMac_DFetchDlyMsk);

    	return(0);
}
/********************************************/
#endif
static unsigned char frame1[MAC_MAX_FRAME_SZ];
static MACFrame  frame2;
#define I2C_MAC_ADDR 0x20
/**************** MAC test ******************/
void mac_test (void)
{
    	static char schedule;
	static int len = 0;
	static char* frame_ptr = frame1;
	static MACFrame* frame_swap = &frame2;
	static char frame_dst[6];
	static char frame_src[6];
	unsigned char mac_addr_temp[6];
	unsigned char new_mac_addr[6];

	UART_tx_vec("current MAC Address is:",strlen("current MAC Address is:"));
     	i2c_rx(mac_addr_temp,I2C_MAC_ADDR,6,0xa0);
	UART_print_mac_addr(mac_addr_temp);
//////// Need to read next addr
//	memcpy(new_mac_addr,MAC_Addr , 6);
//	i2c_tx(new_mac_addr,I2C_MAC_ADDR,6,0xa0);

	UART_tx_vec("press s to stop r to run",strlen("press s to stop r to run"));
	while (!(UART_getc(&schedule)));

	UART_tx_vec("starting frame echo",strlen("starting frame echo"));

	while(schedule != 's')
	{
		if((len = MAC_Read(frame_ptr)) >= 0) 
		{
		int i;
			memcpy(frame_swap, frame_ptr, 12);		

			memcpy(frame_dst, frame_swap->MAC_DstAddr, 6);
			memcpy(frame_src, frame_swap->MAC_SrcAddr, 6);
			
			memcpy(frame_swap->MAC_DstAddr, frame_src, 6);
			memcpy(frame_swap->MAC_SrcAddr, frame_dst, 6);
	
			memcpy(frame_ptr, frame_swap, 12);
	
//			while(1) {MAC_Write(frame_ptr, len);}  //Continue to send frame to detect bandwidth
			MAC_Write(frame_ptr, len);

		}
		UART_getc(&schedule);
	}

	while (!(UART_putc(13)));
	while (!(UART_putc(10)));	
}