📄 sdram.c.svn-base
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#include "sdram.h"#include "uart.h"#include <apb_configuration.h>void test_sdram(void){ unsigned int *loop; unsigned int i,fail; static char schedule; UART_tx_vec("SDRAM test with and without cache",strlen("SDRAM test with and without cache")); UART_tx_vec("press e to end r to run",strlen("press e to end r to run")); while (!(UART_getc(&schedule))); if(schedule != 'e') { loop = (unsigned int *)SDRAM_START_ADDRESS; /* write memory */ for (i = 0; i < (SDRAM_END_ADDRESS - SDRAM_START_ADDRESS)/4; i++) { *(loop + i) = (unsigned int) (loop + i); } fail=0; /* read memory */ for (i = 0; i < (SDRAM_END_ADDRESS - SDRAM_START_ADDRESS)/4; i++) { if(*(loop + i) != (unsigned int)(loop + i)) { UART_tx_vec("error writing without cache", strlen("error writing without cache")); fail=1; UART_print_ex((unsigned int)(loop + i)); } } if (fail==0){ UART_tx_vec("SDRAM test without cache OK", strlen("SDRAM test without cache OK")); } UART_tx_vec("test without cache END (press a key to continue)", strlen("test without cache END (press a key to continue)")); while (!(UART_getc(&schedule))); loop = (unsigned int *)(SDRAM_ALIAS + SDRAM_START_ADDRESS); /* write memory */ for (i = 0; i < (SDRAM_END_ADDRESS - SDRAM_START_ADDRESS)/4; i++) { *(loop + i) = (unsigned int) (loop + i); } fail=0; /* read memory */ for (i = 0; i < (SDRAM_END_ADDRESS - SDRAM_START_ADDRESS)/4; i++) { if(*(loop + i) != (unsigned int)(loop + i)) { UART_tx_vec("error writing with cache", strlen("error writing with cache")); fail=1; UART_print_ex((unsigned int)(loop + i)); } } if (fail==0) UART_tx_vec("SDRAM test with cache OK", strlen("SDRAM test with cache OK")); UART_tx_vec("test with cache END (press a key to continue)", strlen("test with cache END (press a key to continue)")); while (!(UART_getc(&schedule))); } while (!(UART_putc(13))); while (!(UART_putc(10)));}voidwrite_burst() {//__asm { __asm__("MOV R1,#0x10000000"); __asm__("MOV R11,#0x10FFFFFF");__asm__("RamLoop:");/* AND R2,R1,#0xFFF CMP R2,#0x800 BNE STORE ADD R1,R1,#0x800 STORE: */ __asm__("MOV R3,R1"); __asm__("ADD R7,R1,#0x4"); __asm__("MOV R4,R7"); __asm__("ADD R7,R7,#0x4"); __asm__("MOV R5,R7"); __asm__("ADD R7,R7,#0x4"); __asm__("MOV R6,R7"); __asm__("STMIA R1!,{R3 - R6} "); __asm__("CMP R1,R11"); __asm__("BLT RamLoop");// };} voidread_burst(unsigned int * address) {//__asm ( __asm__(" MOV R1, #0x10000000"); __asm__("MOV R11, #0x10FFFFFF");// __asm__("MOV R12, #0xc0c0b0b0"); __asm__("LDR R12, =0xc0c0b0b0"); __asm__("ReadRamLoop:"); /* AND R2,R1,#0xFFF CMP R2,#0x800 BNE LOAD ADD R1,R1,#0x800 LOAD: */ __asm__("LDMIA R1,{R3 - R6}"); __asm__("CMP R3,R1"); __asm__("BNE EXIT_0"); __asm__("ADD R7,R1,#0x4"); __asm__("CMP R4,R7"); __asm__("BNE EXIT_0"); __asm__("ADD R7,R7,#0x4"); __asm__("CMP R5,R7"); __asm__("BNE EXIT_0"); __asm__("ADD R7,R7,#0x4"); __asm__("CMP R6,R7"); __asm__("BNE EXIT_0"); __asm__("ADD R1,R1,#0x10"); __asm__("CMP R1,R11"); __asm__("BLT ReadRamLoop"); __asm__("B EXIT_1");__asm__("EXIT_0:"); __asm__("STR R1,[R0]");__asm__("EXIT_1:"); __asm__("STR R12,[R0]");// );} void test_burst(void){ unsigned int address; static char schedule; UART_tx_vec("SDRAM burst test",strlen("SDRAM burst test")); UART_tx_vec("press e to end r to run",strlen("press e to end r to run")); while (!(UART_getc(&schedule))); if(schedule != 'e') { /********************** parte da aggiustare ***************************/ write_burst(); read_burst(&address); if (address == 0xc0c0b0b0 ) UART_tx_vec("burst OK", strlen("burst OK")); else UART_tx_vec("burst error", strlen("burst error")); /**********************************************************************/ UART_tx_vec("SDRAM test using BURSTS END (press a key to continue)", strlen("SDRAM test using BURSTS END (press a key to continue)")); while (!(UART_getc(&schedule))); } while (!(UART_putc(13))); while (!(UART_putc(10)));}
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