irq.h.svn-base

Spearhead2000 的 USB驱动程序

/*****************************************************************************/
/* This confidential and proprietary software may be used only as authorized */
/* by a licensing agreement from STMicroelectronics.                         */
/* In the event of publication, the following notice is applicable:          */
/*                                                                           */
/*                   (C) COPYRIGHT 2003 STMicroelectronics                   */
/*                Innovative Systems Design Group - Central R&D              */
/*                            ALL RIGHTS RESERVED                            */
/*                                                                           */
/* The entire notice above must be reproduced on all authorized copies.      */
/*                                                                           */
/* -- File:                  irq.h                                           */
/* -- Author:                Francesco Lertora  <[e-mail]>   */
/* -- Description:           Interrupt Controller Header Driver              */
/*                                                                           */
/* -- Modification History: - 1.1 (04/11/2002)                               */
/*                          - 1.2 Adding new USB (replacing IEEE1284)        */
/*                          - 1.3 Bug Fix on ITC_DMA_int                     */
/*                          - 1.4 Adding eASIC prog int DMA interrupt        */
/*                          - 1.5 (23/05/2003)                               */
/*                                Add some labels needed to handle           */
/*                                eASIC/SCoRE CoWare Interrupts              */
/*****************************************************************************/

// $Id: irq.h,v 1.1 2005/06/27 14:15:39 sp_head Exp $

// $Log: irq.h,v $
// Revision 1.1  2005/06/27 14:15:39  sp_head
// apb_configuration.h
//
// Revision 1.1.1.2  2004/12/03 15:34:24  spear
// First import from CRD
//
// Revision 1.1.1.1  2004/12/02 11:07:22  spear
// First import from CRD
//
// 
//  Revision: 1.1 Tue Nov 23 10:14:07 2004 gazzina
//  first release
// 
//  Revision: 1.5 Fri May 23 09:03:40 2003 lert
//  Add eASIC/CoWare Interrupts  Added some new labels
// 
//  Revision: 1.4 Thu Mar 13 10:27:07 2003 gazzina
//  Adding eASIC prog int DMA interrupt  eASIC prog int DMA interrupt added
// 
//  Revision: 1.3 Thu Dec 19 15:53:35 2002 lert
//  ...working on i2c int.  Bug Fix on ITC_DMA_int
// 
//  Revision: 1.2 Thu Nov 14 18:44:34 2002 gazzina
//  Adding new USB  New USB added
// 
//  Revision: 1.1 Mon Nov  4 18:08:34 2002 lert
//  First Version

#ifndef __IRQ_H_
#define __IRQ_H_

// Registro Richiesta Interrupt PRICe

// ------------------------------------------
//    0       - Not Used       MAC              DISABILITATO
//    1       eASIC PI DMA     old USB          
//    2       - Not Used       USB              was IEEE1284
//    3       - Not Used       I2C
//    4       - Not Used       UART
//    5       - Not Used       RTC
//    6       - Not Used       Timer1
//    7       - Not Used       Timer2
//    8       - Not Used       nXIRQ_in0
//    9       - Not Used       nXIRQ_in1
//   10       DMA
//   11       - Not Used
//   12       - Not Used
//   13       - Not Used
//   14       - Not Used
//   15       - Not Used

//   ----------------------------------------
//   eASIC Interrupts
//   ----------------------------------------
//   16       p_INT16   
//   17       p_INT17   
//   18       p_INT18   
//   19       p_INT19   
//   20       p_INT20   
//   21       p_INT21   

//   22       p_INT22 
//   23       p_INT23 
//   24       p_INT24 
//   25       p_INT25 
//   26       p_INT26 
//   27       p_INT27 
//   28       p_INT28 
//   29       p_INT29 
//   30       p_INT30 
//   31       p_INT31 

#define APB_IRQ_Base 0x30000000


typedef struct IRQController
{
  unsigned int ITC_Control_Register;
  unsigned int IRQ_Status_Register;
  unsigned int IFQ_Status_Register;
  unsigned int Pending_Register;
  unsigned int Config_Reg_Req_7_0;
  unsigned int Config_Reg_Req_15_8;
  unsigned int Config_Reg_Req_23_16;
  unsigned int Config_Reg_Req_31_24;
  unsigned int Enable_Register;
  unsigned char __fill_0[12];
  unsigned int Soft_Interrupt_Register;
} IRQController;

#define IRQCntl ((volatile struct IRQController*) (APB_IRQ_Base))

#define ITC_MAC_int           0x0001 // Disabled...For Now...
#define ITC_eASIC_PI_DMA      0x0002 // was oldUSB
#define ITC_USB_int           0x0004 // was ITC_IEEE1284_int      
#define ITC_I2C_int           0x0008
#define ITC_UART_int          0x0010
#define ITC_RTC_int           0x0020
#define ITC_TIMER1_int        0x0040
#define ITC_TIMER2_int        0x0080
#define ITC_XIRQ0_int         0x0100 
#define ITC_XIRQ1_int         0x0200
#define ITC_DMA_int           0x00000400U

#define ITC_MAC_mask          0x07ff // Disabled...For Now...
#define ITC_eASIC_PI_DMA_mask 0x07fe // was ITC_oldUSB_mask
#define ITC_USB_mask          0x07fc // was ITC_IEEE1284_mask
#define ITC_I2C_mask          0x07f8
#define ITC_UART_mask         0x07f0
#define ITC_RTC_mask          0x07e0
#define ITC_TIMER1_mask       0x07c0
#define ITC_TIMER2_mask       0x0780
#define ITC_XIRQ0_mask        0x0700
#define ITC_XIRQ1_mask        0x0600
#define ITC_DMA_mask          0x00000400U

#define ITC_GLOBAL_ENABLE     0x00000001U

#define ITC_SCoRE_SAMPLE_ITR  0x00100000U
#define ITC_eASIC_DMA_ITR     0x00200000U
#define ITC_SCoRE_BUFFER_EPD  0x00040000U

#endif