mac.h.svn-base

Spearhead2000 的 USB驱动程序

		short	MAC_Len;
	} MACFrame;

#define	MACHEADERSZ	14
#define	MACCRCSZ	4

/*****************************************************************************
 * Ethernet MAC110 RcvFrame Status
 *****************************************************************************/
#define Mac_FrmLen			0x00003FFF
#define Mac_WdogTmout		0x00004000
#define Mac_RuntFrm			0x00008000
#define Mac_FrmTooLong		0x00010000
#define Mac_ColSeen			0x00020000
#define Mac_FrmType			0x00040000
#define Mac_MIIErr			0x00080000
#define Mac_DribBit			0x00100000
#define Mac_CRCErr			0x00200000
#define Mac_1LVLANFrm		0x00400000
#define Mac_2LVLANFrm		0x00800000
#define Mac_LenErr			0x01000000
#define Mac_CtrlFrm			0x02000000
#define Mac_BadCtrlFrm		0x04000000
#define Mac_MCastFrm		0x08000000
#define Mac_BCastFrm		0x10000000
#define Mac_FilterErr		0x20000000
#define Mac_FilterOK		0x40000000
#define Mac_MissedFrm		0x80000000

/*****************************************************************************
 * Ethernet MAC110 core Registers
 *****************************************************************************/

// MAC Base Address
#define MAC_Base	DmaMac_Base+0x400	  // I/O Base Address of MAC110 core 


/* MAC Control Register Addresses*/

#define Mac_Ctrl			((volatile unsigned int *) (MAC_Base + 0x000))
#define Mac_Ctrl_Msk		0xd8ffbdec
#define Mac_Ctrl_Rst		0x00040000

				/* ... Values */
#define Mac_RxEn			0x00000004
#define Mac_TxEn			0x00000008
#define Mac_DfrChk			0x00000020
#define Mac_BckOff_10		0x00000000
#define Mac_BckOff_08		0x00000040
#define Mac_BckOff_04		0x00000080
#define Mac_BckOff_01		0x000000C0
#define Mac_AutoPadStrip	0x00000100
#define Mac_NoRty			0x00000400
#define Mac_NoRxBrd			0x00000800
#define Mac_LateColCtrl		0x00001000
#define Mac_ImperfFiltON	0x00002000
#define Mac_HashOnlyFilter	0x00008000
#define Mac_PassBadFrms		0x00010000
#define Mac_InvFilter		0x00020000
#define Mac_PrmscMode		0x00040000
#define Mac_PassAllMCast	0x00080000
#define Mac_FullDplxMode	0x00100000
#define Mac_LoopMode_nrm	0x00000000
#define Mac_LoopMode_int	0x00200000
#define Mac_LoopMode_ext	0x00400000
#define Mac_NoRxOwn			0x00800000
#define Mac_PortSlct		0x08000000
#define Mac_NoHeartBeat		0x10000000
#define Mac_BigEndMode		0x40000000
#define Mac_RxAll			0x80000000


/* MAC Address_HI Register Addresses*/

#define Mac_AddrHI			((volatile unsigned int *) (MAC_Base + 0x004))
#define Mac_AddrHI_Msk		0x0000ffff
#define Mac_AddrHI_Rst		0x0000ffff


/* MAC Address_LO Register Addresses*/

#define Mac_AddrLO			((volatile unsigned int *) (MAC_Base + 0x008))
#define Mac_AddrLO_Msk		0xffffffff
#define Mac_AddrLO_Rst		0xffffffff


/* MAC Multicast Address_HI Register Addresses*/

#define Mac_MCAddrHI		((volatile unsigned int *) (MAC_Base + 0x00C))
#define Mac_MCAddrHI_Msk	0xffffffff
#define Mac_MCAddrHI_Rst	0x00000000


/* MAC Multicast Address_LO Register Addresses*/

#define Mac_MCAddrLO		((volatile unsigned int *) (MAC_Base + 0x010))
#define Mac_MCAddrLO_Msk	0xffffffff
#define Mac_MCAddrLO_Rst	0x00000000


/* MAC MII Registers*/

#define Mii_AddrReg			((volatile unsigned int *) (MAC_Base + 0x014))
#define Mii_AddrReg_Msk		0x0000ffc3

				/* ... Values */ 
#define Mii_Busy		0x00000001
#define Mii_Write		0x00000002
#define Mii_RegisterMsk		0x000007c0
#define Mii_RegisterU		0x00000040
#define Phy_AddrMsk		0x0000f800
#define Phy_AddrU		0x00000800

#define Mii_DataReg			((volatile unsigned int *) (MAC_Base + 0x018))
#define Mii_DataReg_Msk		0x0000ffff


/* MAC Flow Control Registers*/

#define Mii_FlwCtrlReg		((volatile unsigned int *) (MAC_Base + 0x01C))
#define Mii_FlwCtrlReg_Msk	0xffff0007

				/* ... Values */
#define Mii_FlwCtrlBusy		0x00000001
#define Mii_FlwCtrlEn		0x00000002
#define Mii_PassCtrlFrms	0x00000004
#define Mii_PauseTimeMsk	0xffff0000
#define Mii_PauseTimeU		0x00010000



/* MMC Statistic Control Registers*/

#define Mmc_CtrlReg			((volatile unsigned int *) (MAC_Base + 0x100))
#define Mmc_CtrlReg_Msk		0x00003fff

				/* ... Values */
#define Mmc_Reset			0x00000001
#define Mmc_RollOver		0x00000002
#define Mmc_ResetOnRd		0x00000004
#define Mmc_MaxFrmSzMsk		0x00003ff8
#define Mmc_MaxFrmSzU		0x00000008


/* MMC Statistic Int HI Registers*/

#define Mmc_IntHiReg		((volatile unsigned int *) (MAC_Base + 0x104))
#define Mmc_IntHiReg_Msk	0x00000fff
#define Mmc_IntMskHiReg		((volatile unsigned int *) (MAC_Base + 0x10C))
#define Mmc_IntMskHiReg_Msk	0x00000fff

				/* ... Values */
#define Mmc_UnicastInt		0x00000001
#define Mmc_MulticastInt	0x00000002
#define Mmc_BroadcastInt	0x00000004


/* MMC Statistic Int LO Registers*/

#define Mmc_IntLoReg		((volatile unsigned int *) (MAC_Base + 0x108))
#define Mmc_IntLoReg_Msk	0xffffffff
#define Mmc_IntMskLoReg		((volatile unsigned int *) (MAC_Base + 0x110))
#define Mmc_IntMskLoReg_Msk	0xffffffff

				/* ... Values */
#define Mmc_TotFrmsInt		0x00000001
#define Mmc_GoodFrmsInt		0x00000002
#define Mmc_CtrlFrmsInt		0x00000004
#define Mmc_BadCtrlFrmsInt	0x00000008
#define Mmc_TotBytesInt		0x00000010


/* MMC Statistic TotFramesRX Registers*/

#define Mmc_TotFramesRX		((volatile unsigned int *) (MAC_Base + 0x200))
#define Mmc_TotFramesRX_Msk	0xffffffff


/* MMC Statistic TotBytesRX Registers*/

#define Mmc_TotBytesRX		((volatile unsigned int *) (MAC_Base + 0x210))
#define Mmc_TotBytesRX_Msk	0xffffffff

//*****************************************************************************
//* ICS1893 PHY Layer
//*****************************************************************************

/*
 * CONTROL Register (0x0)
 *
 * [15] Reset 
 *         		1 = PHY reset
 *         		0 = normal operation
 * [14] Loopback 
 *         		1 = enable loopback mode
 *         		0 = disable loopback mode
 * [13] Speed Selection (LSB) 
 *         		[6]    [13]
 *         		-----------
 *         		1       1 = Reserved
 *         		1       0 = 1000 Mb/s
 *         		0       1 = 100 Mb/s
 *         		0       0 = 10 Mb/s
 * [12] Auto-Negotiation Enable 
 *         		1 = Enable Auto-Negotiation Process
 *         		0 = Disable Auto-Negotiation Process
 * [11] Power Down 
 *         		1 = power down
 *         		0 = normal operation
 * [10] Isolate 
 *        		1 = electrically Isolate PHY from MII or GMII
 *         		0 = normal operation
 * [9] Restart Auto-Negotiation 
 *         		1 = Restart Auto-Negotiation Process
 *         		0 = normal operation
 * [8] Duplex Mode 
 *         		1 = Full Duplex
 *         		0 = Half Duplex
 * [7] Collision Test 
 *         		1 = enable COL signal test
 *         		0 = disable COL signal test
 * [6] Speed Selection (MSB) (see above ...)
 * [5:0] Reserved Write as 0, ignore on Read R/W
 *
 */
#define Phy_CtrlReg               0x00

#define Phy_Reset               0x8000
#define Phy_Loopback            0x4000
#define Phy_Speed_10Mbs         0x0000
#define Phy_Speed_100Mbs        0x2000
#define Phy_Speed_1000Mbs       0x0040
#define Phy_Speed_Msk           0x2040 
#define Phy_AutoNego    	0x1000 
#define Phy_PowerDown   	0x0800
#define Phy_Isolate     	0x0400
#define Phy_AutoNegoRestart     0x0200
#define Phy_DuplexMode  	0x0100
#define Phy_CollTest    	0x0080

/*
 * STATUS Register (0x1)
 */
#define Phy_StatReg               0x01

#define Phy_AutoNego_Done	0x0020

/*
 * AUTO-NEGOTIATION ADVERTISEMENT Register (0x4)
 *
 * [15] Next Page 
 * [14] IEEE reserved
 * [13] Remote fault Locally
 * [12:10] IEEE reserved
 * [ 9] 100Base-T4 
 * [ 8] 100Base-TX
 * [ 7] 100Base-TX
 * [ 6] 10Base-T
 * [ 5] 10Base-T
 * [4:0] Selector Field
 */   
#define Phy_ANADReg               0x04

#define Phy_Next_Page		0x8000
#define Phy_Remote_fault	0x4000
#define Phy_100Base_T4		0x0200
#define Phy_100Base_TX_Full	0x0100
#define Phy_100Base_TX_Half	0x0080
#define Phy_10Base_T_Full	0x0040
#define Phy_10Base_T_Half	0x0020
#define Phy_Selector		0x0001

/*
 * AUTO-NEGOTIATION Link Partner Ability Register (0x5)
 */
#define Phy_ANLPAReg               0x5

/*
 * AUTO-NEGOTIATION Expansion Register (0x6)
 */
#define Phy_ANEXReg               0x6

/*
 * QUICK POLL DETAILED STATUS Register (0x11)
 */
#define Phy_QPDSReg               0x11

void mac_init(void);

void mac_test (void);
#endif	// __PNCU_DMAMAC_HEADER