addb.s

gdb-6.8 Linux下的调试程序 最新版本

	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	sub.b	r0l, r0l
	mov.b	@byte_dest, r0l
	cmp.b	#50, r0l
	beq	.L10
	fail
.L10:

.endif

add_b_reg8_reg8:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	;;  fixme set ccr

	;;  add.b Rs,Rd
	mov.b	#5, r0h
	add.b	r0h, r0l	; Register operand

	;; fixme test ccr	; H=0 N=1 Z=0 V=0 C=0
	test_h_gr16 0x05aa r0	; add result:	a5 + 5
.if (sim_cpu)			; non-zero means h8300h, s, or sx
	test_h_gr32 0xa5a505aa er0	; add result:	a5 + 5
.endif
	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

.if (sim_cpu == h8sx)
add_b_reg8_rdind:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  add.b rs8,@eRd	; Add to register indirect
	mov	#byte_dest, er0
	mov	#5, r1l
	add.b	r1l, @er0	; reg8 src, reg indirect dest
;;; 	.word	0x7d00
;;; 	.word	0x0890

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 byte_dest er0	; er0 still contains address
	test_h_gr32 0xa5a5a505 er1	; er1 has the test load

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	sub.b	r0l, r0l
	mov.b	@byte_dest, r0l
	cmp.b	#55, r0l
	beq	.L11
	fail
.L11:

add_b_reg8_rdpostinc:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  add.b rs8,@eRd+	; Add to register post-increment
	mov	#byte_dest, er0
	mov	#5, r1l
	add.b	r1l, @er0+	; reg8 src, reg post-incr dest
;;; 	.word	0x0179
;;; 	.word	0x8019

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 post_byte er0	; er0 contains address plus one
	test_h_gr32 0xa5a5a505 er1	; er1 has the test load

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	sub.b	r0l, r0l
	mov.b	@byte_dest, r0l
	cmp.b	#60, r0l
	beq	.L12
	fail
.L12:

add_b_reg8_rdpostdec:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  add.b rs8,@eRd-	; Add to register post-decrement
	mov	#byte_dest, er0
	mov	#5, r1l
	add.b	r1l, @er0-	; reg8 src, reg post-decr dest
;;; 	.word	0x0179
;;; 	.word	0xa019

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 pre_byte er0	; er0 contains address minus one
	test_h_gr32 0xa5a5a505 er1	; er1 has the test load

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	sub.b	r0l, r0l
	mov.b	@byte_dest, r0l
	cmp.b	#65, r0l
	beq	.L13
	fail
.L13:

add_b_reg8_rdpreinc:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  add.b rs8,@+eRd	; Add to register pre-increment
	mov	#pre_byte, er0
	mov	#5, r1l
	add.b	r1l, @+er0	; reg8 src, reg pre-incr dest
;;; 	.word	0x0179
;;; 	.word	0x9019

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 byte_dest er0	; er0 contains destination address 
	test_h_gr32 0xa5a5a505 er1	; er1 has the test load

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	sub.b	r0l, r0l
	mov.b	@byte_dest, r0l
	cmp.b	#70, r0l
	beq	.L14
	fail
.L14:

add_b_reg8_rdpredec:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  add.b rs8,@-eRd	; Add to register pre-decrement
	mov	#post_byte, er0
	mov	#5, r1l
	add.b	r1l, @-er0	; reg8 src, reg pre-decr dest
;;; 	.word	0x0179
;;; 	.word	0xb019

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 byte_dest er0	; er0 contains destination address 
	test_h_gr32 0xa5a5a505 er1	; er1 has the test load

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	sub.b	r0l, r0l
	mov.b	@byte_dest, r0l
	cmp.b	#75, r0l
	beq	.L15
	fail
.L15:

add_b_reg8_disp16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  add.b rs8,@(dd:16, eRd)	; Add to register + 16-bit displacement
	mov	#pre_byte, er0
	mov	#5, r1l
	add.b	r1l, @(1:16, er0)	; reg8 src, 16-bit reg disp dest
;;;  	.word	0x0179
;;;  	.word	0xc019
;;;  	.word	0x0001

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 pre_byte er0	; er0 contains address minus one
	test_h_gr32 0xa5a5a505 er1	; er1 has the test load

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	sub.b	r0l, r0l
	mov.b	@byte_dest, r0l
	cmp.b	#80, r0l
	beq	.L16
	fail
.L16:

add_b_reg8_disp32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  add.b rs8,@-eRd	; Add to register plus 32-bit displacement
	mov	#post_byte, er0
	mov	#5, r1l
	add.b	r1l, @(-1:32, er0)	; reg8 src, 32-bit reg disp dest
;;; 	.word	0x0179
;;; 	.word	0xd819
;;; 	.word	0xffff
;;; 	.word	0xffff

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 post_byte er0	; er0 contains address plus one
	test_h_gr32 0xa5a5a505 er1	; er1 has the test load

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	sub.b	r0l, r0l
	mov.b	@byte_dest, r0l
	cmp.b	#85, r0l
	beq	.L17
	fail
.L17:

add_b_reg8_abs8:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  add.b reg8,@aa:8
	;; NOTE: for abs8, we will use the SBR register as a base,
	;; since otherwise we would have to make sure that the destination
	;; was in the zero page.
	;;
	mov	#byte_dest-100, er0
	ldc	er0, sbr
	mov	#5, r1l
	add.b	r1l, @100:8	; 8-bit reg src, 8-bit absolute dest
;;; 	.word	0x7f64
;;; 	.word	0x0890

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear
	
	test_h_gr32  byte_dest-100, er0	; reg 0 has base address
	test_h_gr32  0xa5a5a505 er1	; reg 1 has test load
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	sub.b	r0l, r0l
	mov.b	@byte_dest, r0l
	cmp.b	#90, r0l
	beq	.L18
	fail
.L18:

add_b_reg8_abs16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  add.b reg8,@aa:16
	mov	#5, r0l
	add.b	r0l, @byte_dest:16	; 8-bit reg src, 16-bit absolute dest
;;; 	.word	0x6a18
;;; 	.word	byte_dest
;;; 	.word	0x0880

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear
	
	test_h_gr32  0xa5a5a505 er0	; reg 0 has test load
	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	sub.b	r0l, r0l
	mov.b	@byte_dest, r0l
	cmp.b	#95, r0l
	beq	.L19
	fail
.L19:

add_b_reg8_abs32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  add.b reg8,@aa:32
	mov	#5, r0l
	add.b	r0l, @byte_dest:32	; 8-bit reg src, 32-bit absolute dest
;;; 	.word	0x6a38
;;; 	.long	byte_dest
;;; 	.word	0x0880

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32  0xa5a5a505 er0	; reg 0 has test load
	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	sub.b	r0l, r0l
	mov.b	@byte_dest, r0l
	cmp.b	#100, r0l
	beq	.L20
	fail
.L20:

.endif

	pass

	exit 0