📄 cmpb.s
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fail.Leq11: test_h_gr32 byte_dst er0 ; er0 contains destination address mov #pre_byte er0 mov #0xa6, r1l set_ccr_zero cmp.b r1l, @+er0;;; .word 0x0179;;; .word 0x9029 blt .Llt11 fail.Llt11: test_h_gr32 byte_dst er0 ; er0 contains destination address mov #pre_byte er0 mov #0xa4, r1l set_ccr_zero cmp.b r1l, @+er0;;; .word 0x0179;;; .word 0x9029 bgt .Lgt11 fail.Lgt11: test_carry_clear ; H=0 N=0 Z=0 V=0 C=0 test_ovf_clear test_zero_clear test_neg_clear test_h_gr32 byte_dst er0 ; er0 contains destination address test_h_gr32 0xa5a5a5a4 er1 ; er1 contains test load test_gr_a5a5 2 ; Make sure other general regs not disturbed test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 ;; Now check the result of the cmp to memory (memory unchanged). sub.b r0l, r0l mov.b @byte_dst, r0l cmp.b #0xa5, r0l beq .L11 fail.L11:cmp_b_reg8_rdpredec: set_grs_a5a5 ; Fill all general regs with a fixed pattern set_ccr_zero ;; cmp.b reg8,@-eRd mov #post_byte, er0 mov #0xa5, r1l cmp.b r1l, @-er0 ; Immediate 8-bit src, reg postdec dst;;; .word 0x0179;;; .word 0xb029 beq .Leq12 fail.Leq12: test_h_gr32 byte_dst er0 ; er0 contains destination address mov #post_byte er0 mov #0xa6, r1l set_ccr_zero cmp.b r1l, @-er0;;; .word 0x0179;;; .word 0xb029 blt .Llt12 fail.Llt12: test_h_gr32 byte_dst er0 ; er0 contains destination address mov #post_byte er0 mov #0xa4, r1l set_ccr_zero cmp.b r1l, @-er0;;; .word 0x0179;;; .word 0xb029 bgt .Lgt12 fail.Lgt12: test_carry_clear ; H=0 N=0 Z=0 V=0 C=0 test_ovf_clear test_zero_clear test_neg_clear test_h_gr32 byte_dst er0 ; er0 contains destination address test_h_gr32 0xa5a5a5a4 er1 ; er1 contains test load test_gr_a5a5 2 ; Make sure other general regs not disturbed test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 ;; Now check the result of the cmp to memory (memory unchanged). sub.b r0l, r0l mov.b @byte_dst, r0l cmp.b #0xa5, r0l beq .L12 fail.L12:cmp_b_rsind_rdind: set_grs_a5a5 ; Fill all general regs with a fixed pattern mov #byte_src, er1 mov #byte_dst, er2 set_ccr_zero cmp.b @er1, @er2 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_gr_a5a5 0 test_h_gr32 byte_src er1 test_h_gr32 byte_dst er2 test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1.if 1 ; ambiguouscmp_b_rspostinc_rdpostinc: set_grs_a5a5 ; Fill all general regs with a fixed pattern mov #byte_src, er1 mov #byte_dst, er2 set_ccr_zero cmp.b @er1+, @er2+;;; .word 0x0174;;; .word 0x6c1c;;; .word 0x8220 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_gr_a5a5 0 test_h_gr32 byte_src+1 er1 test_h_gr32 byte_dst+1 er2 test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1.endif.if 1 ; ambiguouscmp_b_rspostdec_rdpostdec: set_grs_a5a5 ; Fill all general regs with a fixed pattern mov #byte_src, er1 mov #byte_dst, er2 set_ccr_zero cmp.b @er1-, @er2-;;; .word 0x0176;;; .word 0x6c1c;;; .word 0xa220 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_gr_a5a5 0 test_h_gr32 byte_src-1 er1 test_h_gr32 byte_dst-1 er2 test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1.endifcmp_b_rspreinc_rdpreinc: set_grs_a5a5 ; Fill all general regs with a fixed pattern mov #byte_src-1, er1 mov #byte_dst-1, er2 set_ccr_zero cmp.b @+er1, @+er2;;; .word 0x0175;;; .word 0x6c1c;;; .word 0x9220 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_gr_a5a5 0 test_h_gr32 byte_src er1 test_h_gr32 byte_dst er2 test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1cmp_b_rspredec_predec: set_grs_a5a5 ; Fill all general regs with a fixed pattern mov #byte_src+1, er1 mov #byte_dst+1, er2 set_ccr_zero cmp.b @-er1, @-er2;;; .word 0x0177;;; .word 0x6c1c;;; .word 0xb220 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_gr_a5a5 0 test_h_gr32 byte_src er1 test_h_gr32 byte_dst er2 test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1cmp_b_disp2_disp2: set_grs_a5a5 ; Fill all general regs with a fixed pattern mov #byte_src-1, er1 mov #byte_dst-2, er2 set_ccr_zero cmp.b @(1:2, er1), @(2:2, er2);;; .word 0x0175;;; .word 0x681c;;; .word 0x2220 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_gr_a5a5 0 test_h_gr32 byte_src-1 er1 test_h_gr32 byte_dst-2 er2 test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1cmp_b_disp16_disp16: set_grs_a5a5 ; Fill all general regs with a fixed pattern mov #byte_src-3, er1 mov #byte_dst-4, er2 set_ccr_zero cmp.b @(3:16, er1), @(4:16, er2);;; .word 0x0174;;; .word 0x6e1c;;; .word 3;;; .word 0xc220;;; .word 4 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_gr_a5a5 0 test_h_gr32 byte_src-3 er1 test_h_gr32 byte_dst-4 er2 test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1cmp_b_disp32_disp32: set_grs_a5a5 ; Fill all general regs with a fixed pattern mov #byte_src+5, er1 mov #byte_dst+6, er2 set_ccr_zero cmp.b @(-5:32, er1), @(-6:32, er2);;; .word 0x7814;;; .word 0x6a2c;;; .long -5;;; .word 0xca20;;; .long -6 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_gr_a5a5 0 test_h_gr32 byte_src+5 er1 test_h_gr32 byte_dst+6 er2 test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1cmp_b_indexb16_indexb16: set_grs_a5a5 ; Fill all general regs with a fixed pattern mov #0xffffff01, er1 mov #0xffffff02, er2 set_ccr_zero cmp.b @(byte_src-1:16, r1.b), @(byte_dst-2:16, r2.b);;; .word 0x0175;;; .word 0x6e1c;;; .word byte_src-1;;; .word 0xd220;;; .word byte_dst-2 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_gr_a5a5 0 test_h_gr32 0xffffff01 er1 test_h_gr32 0xffffff02 er2 test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1.if 1 ; ambiguouscmp_b_indexw16_indexw16: set_grs_a5a5 ; Fill all general regs with a fixed pattern mov #0xffff0003, er1 mov #0xffff0004, er2 set_ccr_zero cmp.b @(byte_src-3:16, r1.w), @(byte_dst-4:16, r2.w);;; .word 0x0176;;; .word 0x6e1c;;; .word byte_src-3;;; .word 0xe220;;; .word byte_dst-4 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_gr_a5a5 0 test_h_gr32 0xffff0003 er1 test_h_gr32 0xffff0004 er2 test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1.endifcmp_b_indexl16_indexl16: set_grs_a5a5 ; Fill all general regs with a fixed pattern mov #0x00000005, er1 mov #0x00000006, er2 set_ccr_zero cmp.b @(byte_src-5:16, er1.l), @(byte_dst-6:16, er2.l);;; .word 0x0177;;; .word 0x6e1c;;; .word byte_src-5;;; .word 0xf220;;; .word byte_dst-6 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_gr_a5a5 0 test_h_gr32 0x00000005 er1 test_h_gr32 0x00000006 er2 test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1cmp_b_indexb32_indexb32: set_grs_a5a5 ; Fill all general regs with a fixed pattern mov #0xffffff01, er1 mov #0xffffff02, er2 set_ccr_zero cmp.b @(byte_src-1:32, r1.b), @(byte_dst-2:32, r2.b);;; .word 0x7815;;; .word 0x6a2c;;; .long byte_src-1;;; .word 0xda20;;; .long byte_dst-2 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_gr_a5a5 0 test_h_gr32 0xffffff01 er1 test_h_gr32 0xffffff02 er2 test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1.if 1 ; ambiguouscmp_b_indexw32_indexw32: set_grs_a5a5 ; Fill all general regs with a fixed pattern mov #0xffff0003, er1 mov #0xffff0004, er2 set_ccr_zero cmp.b @(byte_src-3:32, r1.w), @(byte_dst-4:32, r2.w);;; .word 0x7816;;; .word 0x6a2c;;; .long byte_src-3;;; .word 0xea20;;; .long byte_dst-4 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_gr_a5a5 0 test_h_gr32 0xffff0003 er1 test_h_gr32 0xffff0004 er2 test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1.endifcmp_b_indexl32_indexl32: set_grs_a5a5 ; Fill all general regs with a fixed pattern mov #0x00000005, er1 mov #0x00000006, er2 set_ccr_zero cmp.b @(byte_src-5:32, er1.l), @(byte_dst-6:32, er2.l);;; .word 0x7817;;; .word 0x6a2c;;; .long byte_src-5;;; .word 0xfa20;;; .long byte_dst-6 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_gr_a5a5 0 test_h_gr32 0x00000005 er1 test_h_gr32 0x00000006 er2 test_gr_a5a5 3 test_gr_a5a5 4 test_gr_a5a5 5 test_gr_a5a5 6 test_gr_a5a5 7 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1cmp_b_abs16_abs16: set_grs_a5a5 ; Fill all general regs with a fixed pattern set_ccr_zero cmp.b @byte_src:16, @byte_dst:16 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_grs_a5a5 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1cmp_b_abs32_abs32: set_grs_a5a5 ; Fill all general regs with a fixed pattern set_ccr_zero cmp.b @byte_src:32, @byte_dst:32 test_neg_clear ; N=0, Z=0, V=1, C=0 test_zero_clear test_ovf_set test_carry_clear test_grs_a5a5 cmp.b #0x5a, @byte_src:16 bne fail1 cmp.b #0xa5, @byte_dst:16 bne fail1.endif pass exit 0fail1: fail⌨️ 快捷键说明
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