extl.s

gdb-6.8 Linux下的调试程序 最新版本

	fail
.Lulabs32n:
;;;  Note:	 leave the value as 0x00008000, so that extu has work to do.



	#
	# exts #2, nn
	#

exts_l_reg32_2_p:
	set_grs_a5a5
	set_ccr_zero
	;; exts.l #2, ern32
	mov.b	#1, r0l
	exts.l	#2, er0

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  0x00000001 er0	; result of sign extend
	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

exts_l_reg32_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; exts.l #2, ern32
	mov.b	#0xff, r0l
	exts.l	#2, er0

	;; Test ccr		H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_ovf_clear
	test_zero_clear
	test_carry_clear

	test_h_gr32  0xffffffff er0	; result of sign extend
	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

extu_l_reg32_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; extu.l #2, ern32
	mov.b	#0xff, r0l
	extu.l	#2, er0

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  0x000000ff er0	; result of zero extend
	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

exts_l_ind_2_p:
	set_grs_a5a5
	set_ccr_zero
	;; exts.l #2, @ern32
	mov.l	#pos2, er1
	exts.l	#2, @er1

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  pos2 er1	; result of sign extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
	cmp.l	#0x00000001, @pos2
	beq	.Lslindp2
	fail
.Lslindp2:
	mov.l	#0xffffff01, @pos2	; Restore initial value

exts_l_ind_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; exts.l #2, @ern32
	mov.l	#neg2, er1
	exts.l	#2, @er1

	;; Test ccr		H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_ovf_clear
	test_zero_clear
	test_carry_clear

	test_h_gr32  neg2 er1	; result of sign extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0xffffff80, @neg2
	beq     .Lslindn2
	fail
.Lslindn2:
;;;  Note:	 leave the value as 0xffffff80, so that extu has work to do.

extu_l_ind_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; extu.l #2, @ern32
	mov.l	#neg2, er1
	extu.l	#2, @er1

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  neg2 er1	; result of zero extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0x00000080, @neg2
	beq     .Lulindn2
	fail
.Lulindn2:
;;;  Note:	 leave the value as 0x00000080, like it started out.

exts_l_postinc_2_p:
	set_grs_a5a5
	set_ccr_zero
	;; exts.l #2, @ern32+
	mov.l	#pos2, er1
	exts.l	#2, @er1+

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  pos2+4 er1	; result of sign extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
	cmp.l	#0x00000001, @pos2
	beq	.Lslpostincp2
	fail
.Lslpostincp2:
	mov.l	#0xffffff01, @pos2	; Restore initial value

exts_l_postinc_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; exts.l #2, @ern32+
	mov.l	#neg2, er1
	exts.l	#2, @er1+

	;; Test ccr		H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_ovf_clear
	test_zero_clear
	test_carry_clear

	test_h_gr32  neg2+4 er1	; result of sign extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0xffffff80, @neg2
	beq     .Lslpostincn2
	fail
.Lslpostincn2:
;;;  Note:	 leave the value as 0xffffff80, so that extu has work to do.

extu_l_postinc_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; extu.l #2, @ern32+
	mov.l	#neg2, er1
	extu.l	#2, @er1+

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  neg2+4 er1	; result of zero extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0x00000080, @neg2
	beq     .Lulpostincn2
	fail
.Lulpostincn2:
;;;  Note:	 leave the value as 0x00000080, like it started out.

exts_l_postdec_2_p:
	set_grs_a5a5
	set_ccr_zero
	;; exts.l #2, @ern32-
	mov.l	#pos2, er1
	exts.l	#2, @er1-

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  pos2-4 er1	; result of sign extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
	cmp.l	#0x00000001, @pos2
	beq	.Lslpostdecp2
	fail
.Lslpostdecp2:
	mov.l	#0xffffff01, @pos2	; Restore initial value

exts_l_postdec_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; exts.l #2, @ern32-
	mov.l	#neg2, er1
	exts.l	#2, @er1-

	;; Test ccr		H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_ovf_clear
	test_zero_clear
	test_carry_clear

	test_h_gr32  neg2-4 er1	; result of sign extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0xffffff80, @neg2
	beq     .Lslpostdecn2
	fail
.Lslpostdecn2:
;;;  Note:	 leave the value as 0xffffff80, so that extu has work to do.

extu_l_postdec_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; extu.l #2, @ern32-
	mov.l	#neg2, er1
	extu.l	#2, @er1-

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  neg2-4 er1	; result of zero extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0x00000080, @neg2
	beq     .Lulpostdecn2
	fail
.Lulpostdecn2:
;;;  Note:	 leave the value as 0x00000080, like it started out.

exts_l_preinc_2_p:
	set_grs_a5a5
	set_ccr_zero
	;; exts.l #2, @+ern32
	mov.l	#pos2-4, er1
	exts.l	#2, @+er1

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  pos2 er1	; result of sign extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
	cmp.l	#0x00000001, @pos2
	beq	.Lslpreincp2
	fail
.Lslpreincp2:
	mov.l	#0xffffff01, @pos2	; Restore initial value

exts_l_preinc_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; exts.l #2, @+ern32
	mov.l	#neg2-4, er1
	exts.l	#2, @+er1

	;; Test ccr		H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_ovf_clear
	test_zero_clear
	test_carry_clear

	test_h_gr32  neg2 er1	; result of sign extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0xffffff80, @neg2
	beq     .Lslpreincn2
	fail
.Lslpreincn2:
;;;  Note:	 leave the value as 0xffffff80, so that extu has work to do.

extu_l_preinc_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; extu.l #2, @+ern32
	mov.l	#neg2-4, er1
	extu.l	#2, @+er1

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  neg2 er1	; result of zero extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0x00000080, @neg2
	beq     .Lulpreincn2
	fail
.Lulpreincn2:
;;;  Note:	 leave the value as 0x00000080, like it started out.

exts_l_predec_2_p:
	set_grs_a5a5
	set_ccr_zero
	;; exts.l #2, @-ern32
	mov.l	#pos2+4, er1
	exts.l	#2, @-er1

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  pos2 er1	; result of sign extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
	cmp.l	#0x00000001, @pos2
	beq	.Lslpredecp2
	fail
.Lslpredecp2:
	mov.l	#0xffffff01, @pos2	; Restore initial value

exts_l_predec_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; exts.l #2, @-ern32
	mov.l	#neg2+4, er1
	exts.l	#2, @-er1

	;; Test ccr		H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_ovf_clear
	test_zero_clear
	test_carry_clear

	test_h_gr32  neg2 er1	; result of sign extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0xffffff80, @neg2
	beq     .Lslpredecn2
	fail
.Lslpredecn2:
;;;  Note:	 leave the value as 0xffffff80, so that extu has work to do.

extu_l_predec_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; extu.l #2, @-ern32
	mov.l	#neg2+4, er1
	extu.l	#2, @-er1

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  neg2 er1	; result of zero extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0x00000080, @neg2
	beq     .Lulpredecn2
	fail
.Lulpredecn2:
;;;  Note:	 leave the value as 0x00000080, like it started out.

extu_l_disp2_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; extu.l #2, @(dd:2, ern32)
	mov.l	#neg2-8, er1
	extu.l	#2, @(8:2, er1)

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  neg2-8 er1	; result of zero extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0x00000080, @neg2
	beq     .Luldisp2n2
	fail
.Luldisp2n2:
;;;  Note:	 leave the value as 0x00000080, like it started out.

extu_l_disp16_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; extu.l #2, @(dd:16, ern32)
	mov.l	#neg2-44, er1
	extu.l	#2, @(44:16, er1)

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  neg2-44 er1	; result of zero extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0x00000080, @neg2
	beq     .Luldisp16n2
	fail
.Luldisp16n2:
;;;  Note:	 leave the value as 0x00000080, like it started out.

extu_l_disp32_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; extu.l #2, @(dd:32, ern32)
	mov.l	#neg2+444, er1
	extu.l	#2, @(-444:32, er1)

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_h_gr32  neg2+444 er1	; result of zero extend
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0x00000080, @neg2
	beq     .Luldisp32n2
	fail
.Luldisp32n2:
;;;  Note:	 leave the value as 0x00000080, like it started out.

extu_l_abs16_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; extu.l #2, @aa:16
	extu.l	#2, @neg2:16

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0x00000080, @neg2
	beq     .Lulabs16n2
	fail
.Lulabs16n2:
;;;  Note:	 leave the value as 0x00000080, like it started out.

extu_l_abs32_2_n:
	set_grs_a5a5
	set_ccr_zero
	;; extu.l #2, @aa:32
	extu.l	#2, @neg2:32

	;; Test ccr		H=0 N=0 Z=0 V=0 C=0
	test_cc_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
        cmp.l   #0x00000080, @neg2
	beq     .Lulabs32n2
	fail
.Lulabs32n2:
;;;  Note:	 leave the value as 0x00000080, like it started out.

.endif

	pass

	exit 0