addl.s

gdb-6.8 Linux下的调试程序 最新版本

	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xb7d9fc1d er0

	test_h_gr32	long_src-4, er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

add_l_preinc_to_reg32:		; pre-increment from mem to register
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @+ers, erd
	mov.l	#long_src-4, er1
	add.l	@+er1, er0	; Register pre-incr operand
;;;	.word	0x010a
;;;	.word	0x9110

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xb7d9fc1d er0

	test_h_gr32	long_src, er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

add_l_predec_to_reg32:		; pre-decrement from mem to register
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @-ers, erd
	mov.l	#long_src+4, er1
	add.l	@-er1, er0	; Register pre-decr operand
;;;	.word	0x010a
;;;	.word	0xb110

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xb7d9fc1d er0

	test_h_gr32	long_src, er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	
add_l_disp2_to_reg32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @(dd:2, ers), erd
	mov.l	#long_src-4, er1
	add.l	@(4:2, er1), er0	; Register plus 2-bit disp. operand
;;; 	.word	0x010a
;;; 	.word	0x1110

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xb7d9fc1d er0	; mov result:	a5a5 | 7777

	test_h_gr32	long_src-4, er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

add_l_disp16_to_reg32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @(dd:16, ers), erd
	mov.l	#long_src+0x1234, er1
	add.l	@(-0x1234:16, er1), er0	; Register plus 16-bit disp. operand
;;;	.word	0x010a
;;;	.word	0xc110
;;;	.word	-0x1234

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xb7d9fc1d er0	; mov result:	a5a5 | 7777

	test_h_gr32	long_src+0x1234, er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

add_l_disp32_to_reg32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @(dd:32, ers), erd
	mov.l	#long_src+65536, er1
	add.l	@(-65536:32, er1), er0	; Register plus 32-bit disp. operand
;;;	.word	0x010a
;;;	.word	0xc910
;;;	.long	-65536

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xb7d9fc1d er0	; mov result:	a5a5 | 7777

	test_h_gr32	long_src+65536, er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

add_l_abs16_to_reg32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @aa:16, erd
	add.l	@long_src:16, er0	; 16-bit address-direct operand
;;;	.word	0x010a
;;;	.word	0x4010
;;;	.word	@long_src

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xb7d9fc1d er0

	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

add_l_abs32_to_reg32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @aa:32, erd
	add.l	@long_src:32, er0	; 32-bit address-direct operand
;;;	.word	0x010a
;;;	.word	0x4810
;;;	.long	@long_src

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xb7d9fc1d er0

	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7


	;;
	;; Add long from memory to memory
	;; 

add_l_indirect_to_indirect:	; reg indirect, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @ers, @erd
	mov.l	#long_src, er1
	mov.l	#long_dst, er0
	add.l	@er1, @er0
;;;	.word	0x0104
;;;	.word	0x691c
;;;	.word	0x0010

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  long_dst er0
	test_h_gr32  long_src er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.l	#0x99999999, @long_dst	; FIXME
	beq	.Lnext55
	fail
.Lnext55:
	;; Now clear the destination location, and verify that.
	mov.l	#0x87654321, @long_dst
	cmp.l	#0x99999999, @long_dst
	bne	.Lnext56
	fail
.Lnext56:			; OK, pass on.

add_l_postinc_to_postinc:	; reg post-increment, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @ers+, @erd+
	mov.l	#long_src, er1
	mov.l	#long_dst, er0
	add.l	@er1+, @er0+
;;;	.word	0x0104
;;;	.word	0x6d1c
;;;	.word	0x8010

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  long_dst+4 er0
	test_h_gr32  long_src+4 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.l	#0x99999999, @long_dst
	beq	.Lnext65
	fail
.Lnext65:
	;; Now clear the destination location, and verify that.
	mov.l	#0x87654321, @long_dst
	cmp.l	#0x99999999, @long_dst
	bne	.Lnext66
	fail
.Lnext66:			; OK, pass on.

add_l_postdec_to_postdec:	; reg post-decrement, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @ers-, @erd-
	mov.l	#long_src, er1
	mov.l	#long_dst, er0
	add.l	@er1-, @er0-
;;;	.word	0x0106
;;;	.word	0x6d1c
;;;	.word	0xa010

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  long_dst-4 er0
	test_h_gr32  long_src-4 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.l	#0x99999999, @long_dst
	beq	.Lnext75
	fail
.Lnext75:
	;; Now clear the destination location, and verify that.
	mov.l	#0x87654321, @long_dst
	cmp.l	#0x99999999, @long_dst
	bne	.Lnext76
	fail
.Lnext76:			; OK, pass on.

add_l_preinc_to_preinc:		; reg pre-increment, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @+ers, @+erd
	mov.l	#long_src-4, er1
	mov.l	#long_dst-4, er0
	add.l	@+er1, @+er0
;;;	.word	0x0105
;;;	.word	0x6d1c
;;;	.word	0x9010

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  long_dst er0
	test_h_gr32  long_src er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.l	#0x99999999, @long_dst
	beq	.Lnext85
	fail
.Lnext85:
	;; Now clear the destination location, and verify that.
	mov.l	#0x87654321, @long_dst
	cmp.l	#0x99999999, @long_dst
	bne	.Lnext86
	fail
.Lnext86:				; OK, pass on.

add_l_predec_to_predec:		; reg pre-decrement, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @-ers, @-erd
	mov.l	#long_src+4, er1
	mov.l	#long_dst+4, er0
	add.l	@-er1, @-er0
;;;	.word	0x0107
;;;	.word	0x6d1c
;;;	.word	0xb010

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  long_dst er0
	test_h_gr32  long_src er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.l	#0x99999999, @long_dst
	beq	.Lnext95
	fail
.Lnext95:
	;; Now clear the destination location, and verify that.
	mov.l	#0x87654321, @long_dst
	cmp.l	#0x99999999, @long_dst
	bne	.Lnext96
	fail
.Lnext96:			; OK, pass on.

add_l_disp2_to_disp2:		; reg 2-bit disp, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @(dd:2, ers), @(dd:2, erd)
	mov.l	#long_src-4, er1
	mov.l	#long_dst-8, er0
	add.l	@(4:2, er1), @(8:2, er0)
;;; 	.word	0x0105
;;;	.word	0x691c
;;; 	.word	0x2010

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  long_dst-8 er0
	test_h_gr32  long_src-4 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.l	#0x99999999, @long_dst
	beq	.Lnext105
	fail
.Lnext105:
	;; Now clear the destination location, and verify that.
	mov.l	#0x87654321, @long_dst
	cmp.l	#0x99999999, @long_dst
	bne	.Lnext106
	fail
.Lnext106:			; OK, pass on.

add_l_disp16_to_disp16:		; reg 16-bit disp, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @(dd:16, ers), @(dd:16, erd)
	mov.l	#long_src-1, er1
	mov.l	#long_dst-2, er0
	add.l	@(1:16, er1), @(2:16, er0)
;;; 	.word	0x0104
;;;	.word	0x6f1c
;;; 	.word	0x0001
;;; 	.word	0xc010
;;; 	.word	0x0002

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  long_dst-2 er0
	test_h_gr32  long_src-1 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.l	#0x99999999, @long_dst
	beq	.Lnext115
	fail
.Lnext115:
	;; Now clear the destination location, and verify that.
	mov.l	#0x87654321, @long_dst
	cmp.l	#0x99999999, @long_dst
	bne	.Lnext116
	fail
.Lnext116:			; OK, pass on.

add_l_disp32_to_disp32:		; reg 32-bit disp, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @(dd:32, ers), @(dd:32, erd)
	mov.l	#long_src-1, er1
	mov.l	#long_dst-2, er0
	add.l	@(1:32, er1), @(2:32, er0)
;;; 	.word	0x7894
;;;	.word	0x6b2c
;;; 	.word	0xc9c8
;;;	.long	1
;;;	.word	0xc810
;;;	.long	2

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  long_dst-2 er0
	test_h_gr32  long_src-1 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.l	#0x99999999, @long_dst
	beq	.Lnext125
	fail
.Lnext125:
	;; Now clear the destination location, and verify that.
	mov.l	#0x87654321, @long_dst
	cmp.l	#0x99999999, @long_dst
	bne	.Lnext126
	fail
.Lnext126:				; OK, pass on.

add_l_abs16_to_abs16:		; 16-bit absolute addr, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @aa:16, @aa:16
	add.l	@long_src:16, @long_dst:16
;;; 	.word	0x0104
;;;	.word	0x6b0c
;;;	.word	@long_src
;;; 	.word	0x4010
;;;	.word	@long_dst

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear


	test_gr_a5a5 0		; Make sure *NO* general registers are changed
	test_gr_a5a5 1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.l	#0x99999999, @long_dst
	beq	.Lnext135
	fail
.Lnext135:
	;; Now clear the destination location, and verify that.
	mov.l	#0x87654321, @long_dst
	cmp.l	#0x99999999, @long_dst
	bne	.Lnext136
	fail
.Lnext136:				; OK, pass on.

add_l_abs32_to_abs32:		; 32-bit absolute addr, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; add.l @aa:32, @aa:32
	add.l	@long_src:32, @long_dst:32
;;; 	.word	0x0104
;;;	.word	0x6b2c
;;;	.long	@long_src
;;; 	.word	0x4810
;;;	.long	@long_dst

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure *NO* general registers are changed
	test_gr_a5a5 1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.l	#0x99999999, @long_dst
	beq	.Lnext145
	fail
.Lnext145:
	;; Now clear the destination location, and verify that.
	mov.l	#0x87654321, @long_dst
	cmp.l	#0x99999999, @long_dst
	bne	.Lnext146
	fail
.Lnext146:				; OK, pass on.

.endif

	pass

	exit 0